440 #define sControllerEOI(CTLP) sOutB((CTLP)->MReg2IO,(CTLP)->MReg2 | INT_STROB)  argument
450 #define sPCIControllerEOI(CTLP) \  argument
452     if ((CTLP)->isUPCI) { \
453 	Word_t w = sInW((CTLP)->PCIIO); \
454 	sOutW((CTLP)->PCIIO, (w ^ PCI_INT_CTRL_AIOP)); \
455 	sOutW((CTLP)->PCIIO, w); \
458 	sOutW((CTLP)->PCIIO, PCI_STROB); \
469 #define sDisAiop(CTLP,AIOPNUM) \  argument
471    (CTLP)->MReg3 &= sBitMapClrTbl[AIOPNUM]; \
472    sOutB((CTLP)->MReg3IO,(CTLP)->MReg3); \
584 #define sEnAiop(CTLP,AIOPNUM) \  argument
586    (CTLP)->MReg3 |= sBitMapSetTbl[AIOPNUM]; \
587    sOutB((CTLP)->MReg3IO,(CTLP)->MReg3); \
728 #define sGetAiopIntStatus(CTLP,AIOPNUM) sInB((CTLP)->AiopIntChanIO[AIOPNUM])  argument
738 #define sGetAiopNumChan(CTLP,AIOPNUM) (CTLP)->AiopNumChan[AIOPNUM]  argument
833 #define sGetControllerIntStatus(CTLP) (sInB((CTLP)->MReg1IO) & 0x0f)  argument
846 #define sPCIGetControllerIntStatus(CTLP) \  argument
847 	((CTLP)->isUPCI ? \
848 	  (sInW((CTLP)->PCIIO2) & UPCI_AIOP_INTR_BITS) : \
849 	  ((sInW((CTLP)->PCIIO) >> 8) & AIOP_INTR_BITS))
907 #define sResetAiopByNum(CTLP,AIOPNUM) \  argument
909    sOutB((CTLP)->AiopIO[(AIOPNUM)]+_CMD_REG,RESET_ALL); \
910    sOutB((CTLP)->AiopIO[(AIOPNUM)]+_CMD_REG,0x0); \