300 	void (*hwinit)(struct sirfsoc_spi *sspi);
303 static void sirfsoc_usp_hwinit(struct sirfsoc_spi *sspi)  in sirfsoc_usp_hwinit()  argument
306 	writel(readl(sspi->base + sspi->regs->usp_mode1) &  in sirfsoc_usp_hwinit()
307 		~SIRFSOC_USP_EN, sspi->base + sspi->regs->usp_mode1);  in sirfsoc_usp_hwinit()
308 	writel(readl(sspi->base + sspi->regs->usp_mode1) |  in sirfsoc_usp_hwinit()
309 		SIRFSOC_USP_EN, sspi->base + sspi->regs->usp_mode1);  in sirfsoc_usp_hwinit()
312 static void spi_sirfsoc_rx_word_u8(struct sirfsoc_spi *sspi)  in spi_sirfsoc_rx_word_u8()  argument
315 	u8 *rx = sspi->rx;  in spi_sirfsoc_rx_word_u8()
317 	data = readl(sspi->base + sspi->regs->rxfifo_data);  in spi_sirfsoc_rx_word_u8()
321 		sspi->rx = rx;  in spi_sirfsoc_rx_word_u8()
324 	sspi->left_rx_word--;  in spi_sirfsoc_rx_word_u8()
327 static void spi_sirfsoc_tx_word_u8(struct sirfsoc_spi *sspi)  in spi_sirfsoc_tx_word_u8()  argument
330 	const u8 *tx = sspi->tx;  in spi_sirfsoc_tx_word_u8()
334 		sspi->tx = tx;  in spi_sirfsoc_tx_word_u8()
336 	writel(data, sspi->base + sspi->regs->txfifo_data);  in spi_sirfsoc_tx_word_u8()
337 	sspi->left_tx_word--;  in spi_sirfsoc_tx_word_u8()
340 static void spi_sirfsoc_rx_word_u16(struct sirfsoc_spi *sspi)  in spi_sirfsoc_rx_word_u16()  argument
343 	u16 *rx = sspi->rx;  in spi_sirfsoc_rx_word_u16()
345 	data = readl(sspi->base + sspi->regs->rxfifo_data);  in spi_sirfsoc_rx_word_u16()
349 		sspi->rx = rx;  in spi_sirfsoc_rx_word_u16()
352 	sspi->left_rx_word--;  in spi_sirfsoc_rx_word_u16()
355 static void spi_sirfsoc_tx_word_u16(struct sirfsoc_spi *sspi)  in spi_sirfsoc_tx_word_u16()  argument
358 	const u16 *tx = sspi->tx;  in spi_sirfsoc_tx_word_u16()
362 		sspi->tx = tx;  in spi_sirfsoc_tx_word_u16()
365 	writel(data, sspi->base + sspi->regs->txfifo_data);  in spi_sirfsoc_tx_word_u16()
366 	sspi->left_tx_word--;  in spi_sirfsoc_tx_word_u16()
369 static void spi_sirfsoc_rx_word_u32(struct sirfsoc_spi *sspi)  in spi_sirfsoc_rx_word_u32()  argument
372 	u32 *rx = sspi->rx;  in spi_sirfsoc_rx_word_u32()
374 	data = readl(sspi->base + sspi->regs->rxfifo_data);  in spi_sirfsoc_rx_word_u32()
378 		sspi->rx = rx;  in spi_sirfsoc_rx_word_u32()
381 	sspi->left_rx_word--;  in spi_sirfsoc_rx_word_u32()
385 static void spi_sirfsoc_tx_word_u32(struct sirfsoc_spi *sspi)  in spi_sirfsoc_tx_word_u32()  argument
388 	const u32 *tx = sspi->tx;  in spi_sirfsoc_tx_word_u32()
392 		sspi->tx = tx;  in spi_sirfsoc_tx_word_u32()
395 	writel(data, sspi->base + sspi->regs->txfifo_data);  in spi_sirfsoc_tx_word_u32()
396 	sspi->left_tx_word--;  in spi_sirfsoc_tx_word_u32()
401 	struct sirfsoc_spi *sspi = dev_id;  in spi_sirfsoc_irq()  local
404 	spi_stat = readl(sspi->base + sspi->regs->int_st);  in spi_sirfsoc_irq()
405 	if (sspi->tx_by_cmd && sspi->type == SIRF_REAL_SPI  in spi_sirfsoc_irq()
407 		complete(&sspi->tx_done);  in spi_sirfsoc_irq()
408 		writel(0x0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_irq()
409 		writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_irq()
410 				sspi->base + sspi->regs->int_st);  in spi_sirfsoc_irq()
416 		complete(&sspi->tx_done);  in spi_sirfsoc_irq()
417 		complete(&sspi->rx_done);  in spi_sirfsoc_irq()
418 		switch (sspi->type) {  in spi_sirfsoc_irq()
421 			writel(0x0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_irq()
424 			writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);  in spi_sirfsoc_irq()
427 		writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_irq()
428 				sspi->base + sspi->regs->int_st);  in spi_sirfsoc_irq()
432 		complete(&sspi->tx_done);  in spi_sirfsoc_irq()
433 	while (!(readl(sspi->base + sspi->regs->int_st) &  in spi_sirfsoc_irq()
436 	complete(&sspi->rx_done);  in spi_sirfsoc_irq()
437 	switch (sspi->type) {  in spi_sirfsoc_irq()
440 		writel(0x0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_irq()
443 		writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);  in spi_sirfsoc_irq()
446 	writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_irq()
447 			sspi->base + sspi->regs->int_st);  in spi_sirfsoc_irq()
462 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_cmd_transfer()  local
466 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_cmd_transfer()
467 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_cmd_transfer()
468 	writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_cmd_transfer()
469 	memcpy(&cmd, sspi->tx, t->len);  in spi_sirfsoc_cmd_transfer()
470 	if (sspi->word_width == 1 && !(spi->mode & SPI_LSB_FIRST))  in spi_sirfsoc_cmd_transfer()
473 	if (sspi->word_width == 2 && t->len == 4 &&  in spi_sirfsoc_cmd_transfer()
476 	writel(cmd, sspi->base + sspi->regs->spi_cmd);  in spi_sirfsoc_cmd_transfer()
478 		sspi->base + sspi->regs->int_en);  in spi_sirfsoc_cmd_transfer()
480 		sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_cmd_transfer()
481 	if (wait_for_completion_timeout(&sspi->tx_done, timeout) == 0) {  in spi_sirfsoc_cmd_transfer()
485 	sspi->left_rx_word -= t->len;  in spi_sirfsoc_cmd_transfer()
491 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_dma_transfer()  local
495 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_dma_transfer()
496 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
497 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
498 	switch (sspi->type) {  in spi_sirfsoc_dma_transfer()
501 			sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
503 			sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
504 		writel(0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_dma_transfer()
507 		writel(0x0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
508 		writel(0x0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
509 		writel(0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_dma_transfer()
512 		writel(0x0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
513 		writel(0x0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
514 		writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);  in spi_sirfsoc_dma_transfer()
517 	writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_dma_transfer()
518 		sspi->base + sspi->regs->int_st);  in spi_sirfsoc_dma_transfer()
519 	if (sspi->left_tx_word < sspi->dat_max_frm_len) {  in spi_sirfsoc_dma_transfer()
520 		switch (sspi->type) {  in spi_sirfsoc_dma_transfer()
522 			writel(readl(sspi->base + sspi->regs->spi_ctrl) |  in spi_sirfsoc_dma_transfer()
525 				sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_dma_transfer()
526 			writel(sspi->left_tx_word - 1,  in spi_sirfsoc_dma_transfer()
527 				sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_dma_transfer()
528 			writel(sspi->left_tx_word - 1,  in spi_sirfsoc_dma_transfer()
529 				sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_dma_transfer()
534 			writel(sspi->left_tx_word * sspi->word_width,  in spi_sirfsoc_dma_transfer()
535 				sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_dma_transfer()
536 			writel(sspi->left_tx_word * sspi->word_width,  in spi_sirfsoc_dma_transfer()
537 				sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_dma_transfer()
541 		if (sspi->type == SIRF_REAL_SPI)  in spi_sirfsoc_dma_transfer()
542 			writel(readl(sspi->base + sspi->regs->spi_ctrl),  in spi_sirfsoc_dma_transfer()
543 				sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_dma_transfer()
544 		writel(0, sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_dma_transfer()
545 		writel(0, sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_dma_transfer()
547 	sspi->dst_start = dma_map_single(&spi->dev, sspi->rx, t->len,  in spi_sirfsoc_dma_transfer()
550 	rx_desc = dmaengine_prep_slave_single(sspi->rx_chan,  in spi_sirfsoc_dma_transfer()
551 		sspi->dst_start, t->len, DMA_DEV_TO_MEM,  in spi_sirfsoc_dma_transfer()
554 	rx_desc->callback_param = &sspi->rx_done;  in spi_sirfsoc_dma_transfer()
556 	sspi->src_start = dma_map_single(&spi->dev, (void *)sspi->tx, t->len,  in spi_sirfsoc_dma_transfer()
559 	tx_desc = dmaengine_prep_slave_single(sspi->tx_chan,  in spi_sirfsoc_dma_transfer()
560 		sspi->src_start, t->len, DMA_MEM_TO_DEV,  in spi_sirfsoc_dma_transfer()
563 	tx_desc->callback_param = &sspi->tx_done;  in spi_sirfsoc_dma_transfer()
567 	dma_async_issue_pending(sspi->tx_chan);  in spi_sirfsoc_dma_transfer()
568 	dma_async_issue_pending(sspi->rx_chan);  in spi_sirfsoc_dma_transfer()
570 			sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_dma_transfer()
571 	if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_dma_transfer()
572 		sspi->type == SIRF_USP_SPI_A7) {  in spi_sirfsoc_dma_transfer()
574 			sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
576 			sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
578 	if (wait_for_completion_timeout(&sspi->rx_done, timeout) == 0) {  in spi_sirfsoc_dma_transfer()
580 		dmaengine_terminate_all(sspi->rx_chan);  in spi_sirfsoc_dma_transfer()
582 		sspi->left_rx_word = 0;  in spi_sirfsoc_dma_transfer()
588 	if (wait_for_completion_timeout(&sspi->tx_done, timeout) == 0) {  in spi_sirfsoc_dma_transfer()
590 		if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_dma_transfer()
591 			sspi->type == SIRF_USP_SPI_A7)  in spi_sirfsoc_dma_transfer()
592 			writel(0, sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_dma_transfer()
593 		dmaengine_terminate_all(sspi->tx_chan);  in spi_sirfsoc_dma_transfer()
595 	dma_unmap_single(&spi->dev, sspi->src_start, t->len, DMA_TO_DEVICE);  in spi_sirfsoc_dma_transfer()
596 	dma_unmap_single(&spi->dev, sspi->dst_start, t->len, DMA_FROM_DEVICE);  in spi_sirfsoc_dma_transfer()
598 	writel(0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
599 	writel(0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
600 	if (sspi->left_tx_word >= sspi->dat_max_frm_len)  in spi_sirfsoc_dma_transfer()
601 		writel(0, sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_dma_transfer()
602 	if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_dma_transfer()
603 		sspi->type == SIRF_USP_SPI_A7)  in spi_sirfsoc_dma_transfer()
604 		writel(0, sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_dma_transfer()
610 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_pio_transfer()  local
614 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_pio_transfer()
617 			sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
619 			sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
620 		switch (sspi->type) {  in spi_sirfsoc_pio_transfer()
622 			writel(0x0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
623 			writel(0x0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
624 			writel(0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_pio_transfer()
625 			writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_pio_transfer()
626 				sspi->base + sspi->regs->int_st);  in spi_sirfsoc_pio_transfer()
627 			writel(min((sspi->left_tx_word * sspi->word_width),  in spi_sirfsoc_pio_transfer()
628 				sspi->fifo_size),  in spi_sirfsoc_pio_transfer()
629 				sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_pio_transfer()
630 			writel(min((sspi->left_rx_word * sspi->word_width),  in spi_sirfsoc_pio_transfer()
631 				sspi->fifo_size),  in spi_sirfsoc_pio_transfer()
632 				sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_pio_transfer()
635 			writel(0x0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
636 			writel(0x0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
637 			writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);  in spi_sirfsoc_pio_transfer()
638 			writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_pio_transfer()
639 				sspi->base + sspi->regs->int_st);  in spi_sirfsoc_pio_transfer()
640 			writel(min((sspi->left_tx_word * sspi->word_width),  in spi_sirfsoc_pio_transfer()
641 				sspi->fifo_size),  in spi_sirfsoc_pio_transfer()
642 				sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_pio_transfer()
643 			writel(min((sspi->left_rx_word * sspi->word_width),  in spi_sirfsoc_pio_transfer()
644 				sspi->fifo_size),  in spi_sirfsoc_pio_transfer()
645 				sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_pio_transfer()
649 				sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
651 				sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
652 			writel(0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_pio_transfer()
653 			writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_pio_transfer()
654 				sspi->base + sspi->regs->int_st);  in spi_sirfsoc_pio_transfer()
655 			writel(readl(sspi->base + sspi->regs->spi_ctrl) |  in spi_sirfsoc_pio_transfer()
658 				sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_pio_transfer()
659 			data_units = sspi->fifo_size / sspi->word_width;  in spi_sirfsoc_pio_transfer()
660 			writel(min(sspi->left_tx_word, data_units) - 1,  in spi_sirfsoc_pio_transfer()
661 				sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_pio_transfer()
662 			writel(min(sspi->left_rx_word, data_units) - 1,  in spi_sirfsoc_pio_transfer()
663 				sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_pio_transfer()
666 		while (!((readl(sspi->base + sspi->regs->txfifo_st)  in spi_sirfsoc_pio_transfer()
667 			& SIRFSOC_SPI_FIFO_FULL_MASK(sspi))) &&  in spi_sirfsoc_pio_transfer()
668 			sspi->left_tx_word)  in spi_sirfsoc_pio_transfer()
669 			sspi->tx_word(sspi);  in spi_sirfsoc_pio_transfer()
674 			sspi->base + sspi->regs->int_en);  in spi_sirfsoc_pio_transfer()
676 			sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_pio_transfer()
677 		if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_pio_transfer()
678 			sspi->type == SIRF_USP_SPI_A7) {  in spi_sirfsoc_pio_transfer()
680 				sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
682 				sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
684 		if (!wait_for_completion_timeout(&sspi->tx_done, timeout) ||  in spi_sirfsoc_pio_transfer()
685 			!wait_for_completion_timeout(&sspi->rx_done, timeout)) {  in spi_sirfsoc_pio_transfer()
687 			if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_pio_transfer()
688 				sspi->type == SIRF_USP_SPI_A7)  in spi_sirfsoc_pio_transfer()
689 				writel(0, sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_pio_transfer()
692 		while (!((readl(sspi->base + sspi->regs->rxfifo_st)  in spi_sirfsoc_pio_transfer()
693 			& SIRFSOC_SPI_FIFO_EMPTY_MASK(sspi))) &&  in spi_sirfsoc_pio_transfer()
694 			sspi->left_rx_word)  in spi_sirfsoc_pio_transfer()
695 			sspi->rx_word(sspi);  in spi_sirfsoc_pio_transfer()
696 		if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_pio_transfer()
697 			sspi->type == SIRF_USP_SPI_A7)  in spi_sirfsoc_pio_transfer()
698 			writel(0, sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_pio_transfer()
699 		writel(0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
700 		writel(0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
701 	} while (sspi->left_tx_word != 0 || sspi->left_rx_word != 0);  in spi_sirfsoc_pio_transfer()
706 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_transfer()  local
708 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_transfer()
709 	sspi->tx = t->tx_buf;  in spi_sirfsoc_transfer()
710 	sspi->rx = t->rx_buf;  in spi_sirfsoc_transfer()
711 	sspi->left_tx_word = sspi->left_rx_word = t->len / sspi->word_width;  in spi_sirfsoc_transfer()
712 	reinit_completion(&sspi->rx_done);  in spi_sirfsoc_transfer()
713 	reinit_completion(&sspi->tx_done);  in spi_sirfsoc_transfer()
719 	if (sspi->type == SIRF_REAL_SPI && sspi->tx_by_cmd)  in spi_sirfsoc_transfer()
726 	return t->len - sspi->left_rx_word * sspi->word_width;  in spi_sirfsoc_transfer()
731 	struct sirfsoc_spi *sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_chipselect()  local
733 	if (sspi->hw_cs) {  in spi_sirfsoc_chipselect()
736 		switch (sspi->type) {  in spi_sirfsoc_chipselect()
738 			regval = readl(sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_chipselect()
753 			writel(regval, sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_chipselect()
757 			regval = readl(sspi->base +  in spi_sirfsoc_chipselect()
758 					sspi->regs->usp_pin_io_data);  in spi_sirfsoc_chipselect()
774 				sspi->base + sspi->regs->usp_pin_io_data);  in spi_sirfsoc_chipselect()
793 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_config_mode()  local
796 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_config_mode()
797 	regval = readl(sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_config_mode()
798 	usp_mode1 = readl(sspi->base + sspi->regs->usp_mode1);  in spi_sirfsoc_config_mode()
834 	writel((SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, sspi->fifo_size - 2) <<  in spi_sirfsoc_config_mode()
836 		(SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, sspi->fifo_size / 2) <<  in spi_sirfsoc_config_mode()
838 		(SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, 2) <<  in spi_sirfsoc_config_mode()
840 		sspi->base + sspi->regs->txfifo_level_chk);  in spi_sirfsoc_config_mode()
841 	writel((SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, 2) <<  in spi_sirfsoc_config_mode()
843 		(SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, sspi->fifo_size / 2) <<  in spi_sirfsoc_config_mode()
845 		(SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, sspi->fifo_size - 2) <<  in spi_sirfsoc_config_mode()
847 		sspi->base + sspi->regs->rxfifo_level_chk);  in spi_sirfsoc_config_mode()
852 	switch (sspi->type) {  in spi_sirfsoc_config_mode()
855 		writel(regval, sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_config_mode()
862 		writel(usp_mode1, sspi->base + sspi->regs->usp_mode1);  in spi_sirfsoc_config_mode()
872 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_setup_transfer()  local
877 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_setup_transfer()
882 	usp_mode2 = regval = (sspi->ctrl_freq / (2 * hz)) - 1;  in spi_sirfsoc_setup_transfer()
890 		sspi->rx_word = spi_sirfsoc_rx_word_u8;  in spi_sirfsoc_setup_transfer()
891 		sspi->tx_word = spi_sirfsoc_tx_word_u8;  in spi_sirfsoc_setup_transfer()
898 		sspi->rx_word = spi_sirfsoc_rx_word_u16;  in spi_sirfsoc_setup_transfer()
899 		sspi->tx_word = spi_sirfsoc_tx_word_u16;  in spi_sirfsoc_setup_transfer()
903 		sspi->rx_word = spi_sirfsoc_rx_word_u32;  in spi_sirfsoc_setup_transfer()
904 		sspi->tx_word = spi_sirfsoc_tx_word_u32;  in spi_sirfsoc_setup_transfer()
910 	sspi->word_width = DIV_ROUND_UP(bits_per_word, 8);  in spi_sirfsoc_setup_transfer()
911 	txfifo_ctrl = (((sspi->fifo_size / 2) &  in spi_sirfsoc_setup_transfer()
912 			SIRFSOC_SPI_FIFO_THD_MASK(sspi))  in spi_sirfsoc_setup_transfer()
914 			(sspi->word_width >> 1);  in spi_sirfsoc_setup_transfer()
915 	rxfifo_ctrl = (((sspi->fifo_size / 2) &  in spi_sirfsoc_setup_transfer()
916 			SIRFSOC_SPI_FIFO_THD_MASK(sspi))  in spi_sirfsoc_setup_transfer()
918 			(sspi->word_width >> 1);  in spi_sirfsoc_setup_transfer()
919 	writel(txfifo_ctrl, sspi->base + sspi->regs->txfifo_ctrl);  in spi_sirfsoc_setup_transfer()
920 	writel(rxfifo_ctrl, sspi->base + sspi->regs->rxfifo_ctrl);  in spi_sirfsoc_setup_transfer()
921 	if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_setup_transfer()
922 		sspi->type == SIRF_USP_SPI_A7) {  in spi_sirfsoc_setup_transfer()
947 			sspi->base + sspi->regs->usp_tx_frame_ctrl);  in spi_sirfsoc_setup_transfer()
951 			sspi->base + sspi->regs->usp_rx_frame_ctrl);  in spi_sirfsoc_setup_transfer()
952 		writel(readl(sspi->base + sspi->regs->usp_mode2) |  in spi_sirfsoc_setup_transfer()
959 			sspi->base + sspi->regs->usp_mode2);  in spi_sirfsoc_setup_transfer()
961 	if (sspi->type == SIRF_REAL_SPI)  in spi_sirfsoc_setup_transfer()
962 		writel(regval, sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_setup_transfer()
964 	if (sspi->type == SIRF_REAL_SPI) {  in spi_sirfsoc_setup_transfer()
967 			sspi->tx_by_cmd = true;  in spi_sirfsoc_setup_transfer()
968 			writel(readl(sspi->base + sspi->regs->spi_ctrl) |  in spi_sirfsoc_setup_transfer()
971 				sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_setup_transfer()
973 			sspi->tx_by_cmd = false;  in spi_sirfsoc_setup_transfer()
974 			writel(readl(sspi->base + sspi->regs->spi_ctrl) &  in spi_sirfsoc_setup_transfer()
976 				sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_setup_transfer()
981 		writel(0, sspi->base + sspi->regs->tx_dma_io_ctrl);  in spi_sirfsoc_setup_transfer()
983 			sspi->base + sspi->regs->rx_dma_io_ctrl);  in spi_sirfsoc_setup_transfer()
987 			sspi->base + sspi->regs->tx_dma_io_ctrl);  in spi_sirfsoc_setup_transfer()
989 			sspi->base + sspi->regs->rx_dma_io_ctrl);  in spi_sirfsoc_setup_transfer()
996 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_setup()  local
999 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_setup()
1001 		sspi->hw_cs = true;  in spi_sirfsoc_setup()
1003 		sspi->hw_cs = false;  in spi_sirfsoc_setup()
1071 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_probe()  local
1084 	master = spi_alloc_master(&pdev->dev, sizeof(*sspi));  in spi_sirfsoc_probe()
1091 	sspi = spi_master_get_devdata(master);  in spi_sirfsoc_probe()
1092 	sspi->fifo_full_offset = ilog2(sspi->fifo_size);  in spi_sirfsoc_probe()
1094 	sspi->regs = spi_comp_data->regs;  in spi_sirfsoc_probe()
1095 	sspi->type = spi_comp_data->type;  in spi_sirfsoc_probe()
1096 	sspi->fifo_level_chk_mask = (sspi->fifo_size / 4) - 1;  in spi_sirfsoc_probe()
1097 	sspi->dat_max_frm_len = spi_comp_data->dat_max_frm_len;  in spi_sirfsoc_probe()
1098 	sspi->fifo_size = spi_comp_data->fifo_size;  in spi_sirfsoc_probe()
1099 	sspi->base = devm_platform_ioremap_resource(pdev, 0);  in spi_sirfsoc_probe()
1100 	if (IS_ERR(sspi->base)) {  in spi_sirfsoc_probe()
1101 		ret = PTR_ERR(sspi->base);  in spi_sirfsoc_probe()
1110 				DRIVER_NAME, sspi);  in spi_sirfsoc_probe()
1114 	sspi->bitbang.master = master;  in spi_sirfsoc_probe()
1115 	sspi->bitbang.chipselect = spi_sirfsoc_chipselect;  in spi_sirfsoc_probe()
1116 	sspi->bitbang.setup_transfer = spi_sirfsoc_setup_transfer;  in spi_sirfsoc_probe()
1117 	sspi->bitbang.txrx_bufs = spi_sirfsoc_transfer;  in spi_sirfsoc_probe()
1118 	sspi->bitbang.master->setup = spi_sirfsoc_setup;  in spi_sirfsoc_probe()
1119 	sspi->bitbang.master->cleanup = spi_sirfsoc_cleanup;  in spi_sirfsoc_probe()
1126 	sspi->bitbang.master->dev.of_node = pdev->dev.of_node;  in spi_sirfsoc_probe()
1129 	sspi->rx_chan = dma_request_chan(&pdev->dev, "rx");  in spi_sirfsoc_probe()
1130 	if (IS_ERR(sspi->rx_chan)) {  in spi_sirfsoc_probe()
1132 		ret = PTR_ERR(sspi->rx_chan);  in spi_sirfsoc_probe()
1135 	sspi->tx_chan = dma_request_chan(&pdev->dev, "tx");  in spi_sirfsoc_probe()
1136 	if (IS_ERR(sspi->tx_chan)) {  in spi_sirfsoc_probe()
1138 		ret = PTR_ERR(sspi->tx_chan);  in spi_sirfsoc_probe()
1142 	sspi->clk = clk_get(&pdev->dev, NULL);  in spi_sirfsoc_probe()
1143 	if (IS_ERR(sspi->clk)) {  in spi_sirfsoc_probe()
1144 		ret = PTR_ERR(sspi->clk);  in spi_sirfsoc_probe()
1147 	clk_prepare_enable(sspi->clk);  in spi_sirfsoc_probe()
1149 		spi_comp_data->hwinit(sspi);  in spi_sirfsoc_probe()
1150 	sspi->ctrl_freq = clk_get_rate(sspi->clk);  in spi_sirfsoc_probe()
1152 	init_completion(&sspi->rx_done);  in spi_sirfsoc_probe()
1153 	init_completion(&sspi->tx_done);  in spi_sirfsoc_probe()
1155 	ret = spi_bitbang_start(&sspi->bitbang);  in spi_sirfsoc_probe()
1162 	clk_disable_unprepare(sspi->clk);  in spi_sirfsoc_probe()
1163 	clk_put(sspi->clk);  in spi_sirfsoc_probe()
1165 	dma_release_channel(sspi->tx_chan);  in spi_sirfsoc_probe()
1167 	dma_release_channel(sspi->rx_chan);  in spi_sirfsoc_probe()
1177 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_remove()  local
1180 	sspi = spi_master_get_devdata(master);  in spi_sirfsoc_remove()
1181 	spi_bitbang_stop(&sspi->bitbang);  in spi_sirfsoc_remove()
1182 	clk_disable_unprepare(sspi->clk);  in spi_sirfsoc_remove()
1183 	clk_put(sspi->clk);  in spi_sirfsoc_remove()
1184 	dma_release_channel(sspi->rx_chan);  in spi_sirfsoc_remove()
1185 	dma_release_channel(sspi->tx_chan);  in spi_sirfsoc_remove()
1194 	struct sirfsoc_spi *sspi = spi_master_get_devdata(master);  in spi_sirfsoc_suspend()  local
1201 	clk_disable(sspi->clk);  in spi_sirfsoc_suspend()
1208 	struct sirfsoc_spi *sspi = spi_master_get_devdata(master);  in spi_sirfsoc_resume()  local
1210 	clk_enable(sspi->clk);  in spi_sirfsoc_resume()
1211 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_resume()
1212 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_resume()
1213 	writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_resume()
1214 	writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_resume()