Lines Matching +full:tx +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the Diolan DLN-2 USB-SPI adapter
98 * Enable/Disable SPI module. The disable command will wait for transfers to
101 static int dln2_spi_enable(struct dln2_spi *dln2, bool enable) in dln2_spi_enable() argument
107 } tx; in dln2_spi_enable() local
108 unsigned len = sizeof(tx); in dln2_spi_enable()
110 tx.port = dln2->port; in dln2_spi_enable()
112 if (enable) { in dln2_spi_enable()
114 len -= sizeof(tx.wait_for_completion); in dln2_spi_enable()
116 tx.wait_for_completion = DLN2_TRANSFERS_WAIT_COMPLETE; in dln2_spi_enable()
120 return dln2_transfer_tx(dln2->pdev, cmd, &tx, len); in dln2_spi_enable()
128 * Ex: cs_mask = 0x03 -> CS0 & CS1 will be selected and the next WR/RD operation
136 } tx; in dln2_spi_cs_set() local
138 tx.port = dln2->port; in dln2_spi_cs_set()
145 tx.cs = ~cs_mask; in dln2_spi_cs_set()
147 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_SET_SS, &tx, sizeof(tx)); in dln2_spi_cs_set()
151 * Select one CS line. The other lines will be un-selected.
159 * Enable/disable CS lines for usage. The module has to be disabled first.
161 static int dln2_spi_cs_enable(struct dln2_spi *dln2, u8 cs_mask, bool enable) in dln2_spi_cs_enable() argument
166 } tx; in dln2_spi_cs_enable() local
169 tx.port = dln2->port; in dln2_spi_cs_enable()
170 tx.cs = cs_mask; in dln2_spi_cs_enable()
171 cmd = enable ? DLN2_SPI_SS_MULTI_ENABLE : DLN2_SPI_SS_MULTI_DISABLE; in dln2_spi_cs_enable()
173 return dln2_transfer_tx(dln2->pdev, cmd, &tx, sizeof(tx)); in dln2_spi_cs_enable()
176 static int dln2_spi_cs_enable_all(struct dln2_spi *dln2, bool enable) in dln2_spi_cs_enable_all() argument
178 u8 cs_mask = GENMASK(dln2->master->num_chipselect - 1, 0); in dln2_spi_cs_enable_all()
180 return dln2_spi_cs_enable(dln2, cs_mask, enable); in dln2_spi_cs_enable_all()
188 } tx; in dln2_spi_get_cs_num() local
194 tx.port = dln2->port; in dln2_spi_get_cs_num()
195 ret = dln2_transfer(dln2->pdev, DLN2_SPI_GET_SS_COUNT, &tx, sizeof(tx), in dln2_spi_get_cs_num()
200 return -EPROTO; in dln2_spi_get_cs_num()
204 dev_dbg(&dln2->pdev->dev, "cs_num = %d\n", *cs_num); in dln2_spi_get_cs_num()
214 } tx; in dln2_spi_get_speed() local
220 tx.port = dln2->port; in dln2_spi_get_speed()
222 ret = dln2_transfer(dln2->pdev, cmd, &tx, sizeof(tx), &rx, &rx_len); in dln2_spi_get_speed()
226 return -EPROTO; in dln2_spi_get_speed()
248 dev_dbg(&dln2->pdev->dev, "freq_min = %d, freq_max = %d\n", in dln2_spi_get_speed_range()
264 } __packed tx; in dln2_spi_set_speed() local
270 tx.port = dln2->port; in dln2_spi_set_speed()
271 tx.speed = cpu_to_le32(speed); in dln2_spi_set_speed()
273 ret = dln2_transfer(dln2->pdev, DLN2_SPI_SET_FREQUENCY, &tx, sizeof(tx), in dln2_spi_set_speed()
278 return -EPROTO; in dln2_spi_set_speed()
291 } tx; in dln2_spi_set_mode() local
293 tx.port = dln2->port; in dln2_spi_set_mode()
294 tx.mode = mode; in dln2_spi_set_mode()
296 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_SET_MODE, &tx, sizeof(tx)); in dln2_spi_set_mode()
307 } tx; in dln2_spi_set_bpw() local
309 tx.port = dln2->port; in dln2_spi_set_bpw()
310 tx.bpw = bpw; in dln2_spi_set_bpw()
312 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_SET_FRAME_SIZE, in dln2_spi_set_bpw()
313 &tx, sizeof(tx)); in dln2_spi_set_bpw()
322 } tx; in dln2_spi_get_supported_frame_sizes() local
326 } *rx = dln2->buf; in dln2_spi_get_supported_frame_sizes()
330 tx.port = dln2->port; in dln2_spi_get_supported_frame_sizes()
332 ret = dln2_transfer(dln2->pdev, DLN2_SPI_GET_SUPPORTED_FRAME_SIZES, in dln2_spi_get_supported_frame_sizes()
333 &tx, sizeof(tx), rx, &rx_len); in dln2_spi_get_supported_frame_sizes()
337 return -EPROTO; in dln2_spi_get_supported_frame_sizes()
338 if (rx->count > ARRAY_SIZE(rx->frame_sizes)) in dln2_spi_get_supported_frame_sizes()
339 return -EPROTO; in dln2_spi_get_supported_frame_sizes()
342 for (i = 0; i < rx->count; i++) in dln2_spi_get_supported_frame_sizes()
343 *bpw_mask |= BIT(rx->frame_sizes[i] - 1); in dln2_spi_get_supported_frame_sizes()
345 dev_dbg(&dln2->pdev->dev, "bpw_mask = 0x%X\n", *bpw_mask); in dln2_spi_get_supported_frame_sizes()
367 while (len--) in dln2_spi_copy_to_buf()
374 while (len--) in dln2_spi_copy_to_buf()
400 while (len--) in dln2_spi_copy_from_buf()
407 while (len--) in dln2_spi_copy_from_buf()
426 } __packed *tx = dln2->buf; in dln2_spi_write_one() local
429 BUILD_BUG_ON(sizeof(*tx) > DLN2_SPI_BUF_SIZE); in dln2_spi_write_one()
432 return -EINVAL; in dln2_spi_write_one()
434 tx->port = dln2->port; in dln2_spi_write_one()
435 tx->size = cpu_to_le16(data_len); in dln2_spi_write_one()
436 tx->attr = attr; in dln2_spi_write_one()
438 dln2_spi_copy_to_buf(tx->buf, data, data_len, dln2->bpw); in dln2_spi_write_one()
440 tx_len = sizeof(*tx) + data_len - DLN2_SPI_MAX_XFER_SIZE; in dln2_spi_write_one()
441 return dln2_transfer_tx(dln2->pdev, DLN2_SPI_WRITE, tx, tx_len); in dln2_spi_write_one()
455 } __packed tx; in dln2_spi_read_one() local
459 } __packed *rx = dln2->buf; in dln2_spi_read_one()
465 return -EINVAL; in dln2_spi_read_one()
467 tx.port = dln2->port; in dln2_spi_read_one()
468 tx.size = cpu_to_le16(data_len); in dln2_spi_read_one()
469 tx.attr = attr; in dln2_spi_read_one()
471 ret = dln2_transfer(dln2->pdev, DLN2_SPI_READ, &tx, sizeof(tx), in dln2_spi_read_one()
475 if (rx_len < sizeof(rx->size) + data_len) in dln2_spi_read_one()
476 return -EPROTO; in dln2_spi_read_one()
477 if (le16_to_cpu(rx->size) != data_len) in dln2_spi_read_one()
478 return -EPROTO; in dln2_spi_read_one()
480 dln2_spi_copy_from_buf(data, rx->buf, data_len, dln2->bpw); in dln2_spi_read_one()
497 } __packed *tx; in dln2_spi_read_write_one() local
504 BUILD_BUG_ON(sizeof(*tx) > DLN2_SPI_BUF_SIZE || in dln2_spi_read_write_one()
508 return -EINVAL; in dln2_spi_read_write_one()
511 * Since this is a pseudo full-duplex communication, we're perfectly in dln2_spi_read_write_one()
512 * safe to use the same buffer for both tx and rx. When DLN2 sends the in dln2_spi_read_write_one()
513 * response back, with the rx data, we don't need the tx buffer anymore. in dln2_spi_read_write_one()
515 tx = dln2->buf; in dln2_spi_read_write_one()
516 rx = dln2->buf; in dln2_spi_read_write_one()
518 tx->port = dln2->port; in dln2_spi_read_write_one()
519 tx->size = cpu_to_le16(data_len); in dln2_spi_read_write_one()
520 tx->attr = attr; in dln2_spi_read_write_one()
522 dln2_spi_copy_to_buf(tx->buf, tx_data, data_len, dln2->bpw); in dln2_spi_read_write_one()
524 tx_len = sizeof(*tx) + data_len - DLN2_SPI_MAX_XFER_SIZE; in dln2_spi_read_write_one()
527 ret = dln2_transfer(dln2->pdev, DLN2_SPI_READ_WRITE, tx, tx_len, in dln2_spi_read_write_one()
531 if (rx_len < sizeof(rx->size) + data_len) in dln2_spi_read_write_one()
532 return -EPROTO; in dln2_spi_read_write_one()
533 if (le16_to_cpu(rx->size) != data_len) in dln2_spi_read_write_one()
534 return -EPROTO; in dln2_spi_read_write_one()
536 dln2_spi_copy_from_buf(rx_data, rx->buf, data_len, dln2->bpw); in dln2_spi_read_write_one()
562 offset = data_len - remaining; in dln2_spi_rdwr()
578 return -EINVAL; in dln2_spi_rdwr()
584 remaining -= len; in dln2_spi_rdwr()
595 struct spi_device *spi = message->spi; in dln2_spi_prepare_message()
597 if (dln2->cs != spi->chip_select) { in dln2_spi_prepare_message()
598 ret = dln2_spi_cs_set_one(dln2, spi->chip_select); in dln2_spi_prepare_message()
602 dln2->cs = spi->chip_select; in dln2_spi_prepare_message()
614 bus_setup_change = dln2->speed != speed || dln2->mode != mode || in dln2_spi_transfer_setup()
615 dln2->bpw != bpw; in dln2_spi_transfer_setup()
624 if (dln2->speed != speed) { in dln2_spi_transfer_setup()
629 dln2->speed = speed; in dln2_spi_transfer_setup()
632 if (dln2->mode != mode) { in dln2_spi_transfer_setup()
637 dln2->mode = mode; in dln2_spi_transfer_setup()
640 if (dln2->bpw != bpw) { in dln2_spi_transfer_setup()
645 dln2->bpw = bpw; in dln2_spi_transfer_setup()
659 status = dln2_spi_transfer_setup(dln2, xfer->speed_hz, in dln2_spi_transfer_one()
660 xfer->bits_per_word, in dln2_spi_transfer_one()
661 spi->mode); in dln2_spi_transfer_one()
663 dev_err(&dln2->pdev->dev, "Cannot setup transfer\n"); in dln2_spi_transfer_one()
667 if (!xfer->cs_change && !spi_transfer_is_last(master, xfer)) in dln2_spi_transfer_one()
670 status = dln2_spi_rdwr(dln2, xfer->tx_buf, xfer->rx_buf, in dln2_spi_transfer_one()
671 xfer->len, attr); in dln2_spi_transfer_one()
673 dev_err(&dln2->pdev->dev, "write/read failed!\n"); in dln2_spi_transfer_one()
682 struct dln2_platform_data *pdata = dev_get_platdata(&pdev->dev); in dln2_spi_probe()
683 struct device *dev = &pdev->dev; in dln2_spi_probe()
686 master = spi_alloc_master(&pdev->dev, sizeof(*dln2)); in dln2_spi_probe()
688 return -ENOMEM; in dln2_spi_probe()
694 dln2->buf = devm_kmalloc(&pdev->dev, DLN2_SPI_BUF_SIZE, GFP_KERNEL); in dln2_spi_probe()
695 if (!dln2->buf) { in dln2_spi_probe()
696 ret = -ENOMEM; in dln2_spi_probe()
700 dln2->master = master; in dln2_spi_probe()
701 dln2->master->dev.of_node = dev->of_node; in dln2_spi_probe()
702 dln2->pdev = pdev; in dln2_spi_probe()
703 dln2->port = pdata->port; in dln2_spi_probe()
705 dln2->cs = 0xff; in dln2_spi_probe()
706 dln2->mode = 0xff; in dln2_spi_probe()
711 dev_err(&pdev->dev, "Failed to disable SPI module\n"); in dln2_spi_probe()
715 ret = dln2_spi_get_cs_num(dln2, &master->num_chipselect); in dln2_spi_probe()
717 dev_err(&pdev->dev, "Failed to get number of CS pins\n"); in dln2_spi_probe()
722 &master->min_speed_hz, in dln2_spi_probe()
723 &master->max_speed_hz); in dln2_spi_probe()
725 dev_err(&pdev->dev, "Failed to read bus min/max freqs\n"); in dln2_spi_probe()
730 &master->bits_per_word_mask); in dln2_spi_probe()
732 dev_err(&pdev->dev, "Failed to read supported frame sizes\n"); in dln2_spi_probe()
738 dev_err(&pdev->dev, "Failed to enable CS pins\n"); in dln2_spi_probe()
742 master->bus_num = -1; in dln2_spi_probe()
743 master->mode_bits = SPI_CPOL | SPI_CPHA; in dln2_spi_probe()
744 master->prepare_message = dln2_spi_prepare_message; in dln2_spi_probe()
745 master->transfer_one = dln2_spi_transfer_one; in dln2_spi_probe()
746 master->auto_runtime_pm = true; in dln2_spi_probe()
748 /* enable SPI module, we're good to go */ in dln2_spi_probe()
751 dev_err(&pdev->dev, "Failed to enable SPI module\n"); in dln2_spi_probe()
755 pm_runtime_set_autosuspend_delay(&pdev->dev, in dln2_spi_probe()
757 pm_runtime_use_autosuspend(&pdev->dev); in dln2_spi_probe()
758 pm_runtime_set_active(&pdev->dev); in dln2_spi_probe()
759 pm_runtime_enable(&pdev->dev); in dln2_spi_probe()
761 ret = devm_spi_register_master(&pdev->dev, master); in dln2_spi_probe()
763 dev_err(&pdev->dev, "Failed to register master\n"); in dln2_spi_probe()
770 pm_runtime_disable(&pdev->dev); in dln2_spi_probe()
771 pm_runtime_set_suspended(&pdev->dev); in dln2_spi_probe()
774 dev_err(&pdev->dev, "Failed to disable SPI module\n"); in dln2_spi_probe()
786 pm_runtime_disable(&pdev->dev); in dln2_spi_remove()
789 dev_err(&pdev->dev, "Failed to disable SPI module\n"); in dln2_spi_remove()
815 dln2->cs = 0xff; in dln2_spi_suspend()
816 dln2->speed = 0; in dln2_spi_suspend()
817 dln2->bpw = 0; in dln2_spi_suspend()
818 dln2->mode = 0xff; in dln2_spi_suspend()
869 .name = "dln2-spi",
880 MODULE_ALIAS("platform:dln2-spi");