1 // SPDX-License-Identifier: GPL-2.0-only
5  * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
39 /* minimum number of bytes to do dma on */
46 #define NCR5380_read(reg)               in_8(hostdata->io + (reg))
47 #define NCR5380_write(reg, value)       out_8(hostdata->io + (reg), value)
61 /* dma regs start at regbase + 8, directly after the NCR regs */
67 	unsigned short udc_data; /* udc dma data reg (obio only) */
68 	unsigned short udc_addr; /* uda dma addr reg (obio only) */
70 	                           * holds extra byte on odd dma reads
80 /* ucd chip specific regs - live in dvma space */
124 #define CSR_DMA_INT 0x100 /* dma interrupt pending */
143 static int setup_can_queue = -1;
145 static int setup_cmd_per_lun = -1;
147 static int setup_sg_tablesize = -1;
149 static int setup_hostid = -1;
152 /* ms to wait after hitting dma regs */
155 /* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
167 /* dma controller register access functions */
173 	dregs->udc_addr = UDC_CSR;  in sun3_udc_read()
175 	ret = dregs->udc_data;  in sun3_udc_read()
183 	dregs->udc_addr = reg;  in sun3_udc_write()
185 	dregs->udc_data = val;  in sun3_udc_write()
196 	unsigned short csr = dregs->csr;  in scsi_sun3_intr()
200 	dregs->csr &= ~CSR_DMA_ENABLE;  in scsi_sun3_intr()
205 			shost_printk(KERN_ERR, instance, "bus error in DMA\n");  in scsi_sun3_intr()
207 			shost_printk(KERN_ERR, instance, "DMA conflict\n");  in scsi_sun3_intr()
219 /* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
238 	dregs->fifo_count = 0;  in sun3scsi_dma_setup()
242 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_setup()
243 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_setup()
248 		dregs->csr |= CSR_SEND;  in sun3scsi_dma_setup()
250 		dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_setup()
253 	dregs->csr |= CSR_PACK_ENABLE;  in sun3scsi_dma_setup()
255 	dregs->dma_addr_hi = ((unsigned long)addr >> 16);  in sun3scsi_dma_setup()
256 	dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);  in sun3scsi_dma_setup()
258 	dregs->dma_count_hi = 0;  in sun3scsi_dma_setup()
259 	dregs->dma_count_lo = 0;  in sun3scsi_dma_setup()
260 	dregs->fifo_count_hi = 0;  in sun3scsi_dma_setup()
261 	dregs->fifo_count = 0;  in sun3scsi_dma_setup()
264 	dregs->fifo_count = count;  in sun3scsi_dma_setup()
269 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_setup()
270 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_setup()
272 	if(dregs->fifo_count != count) {   in sun3scsi_dma_setup()
273 		shost_printk(KERN_ERR, hostdata->host,  in sun3scsi_dma_setup()
275 		             dregs->fifo_count, (unsigned int) count);  in sun3scsi_dma_setup()
276 		NCR5380_dprint(NDEBUG_DMA, hostdata->host);  in sun3scsi_dma_setup()
280 	udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);  in sun3scsi_dma_setup()
281 	udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);  in sun3scsi_dma_setup()
282 	udc_regs->count = count/2; /* count in words */  in sun3scsi_dma_setup()
283 	udc_regs->mode_hi = UDC_MODE_HIWORD;  in sun3scsi_dma_setup()
286 			udc_regs->count++;  in sun3scsi_dma_setup()
287 		udc_regs->mode_lo = UDC_MODE_LSEND;  in sun3scsi_dma_setup()
288 		udc_regs->rsel = UDC_RSEL_SEND;  in sun3scsi_dma_setup()
290 		udc_regs->mode_lo = UDC_MODE_LRECV;  in sun3scsi_dma_setup()
291 		udc_regs->rsel = UDC_RSEL_RECV;  in sun3scsi_dma_setup()
300 	/* set dma master on */  in sun3scsi_dma_setup()
337 	int wanted_len = cmd->SCp.this_residual;  in sun3scsi_dma_xfer_len()
339 	if (wanted_len < DMA_MIN_SIZE || blk_rq_is_passthrough(cmd->request))  in sun3scsi_dma_xfer_len()
350 	csr = dregs->csr;  in sun3scsi_dma_start()
352 	dregs->dma_count_hi = (sun3_dma_orig_count >> 16);  in sun3scsi_dma_start()
353 	dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);  in sun3scsi_dma_start()
355 	dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);  in sun3scsi_dma_start()
356 	dregs->fifo_count = (sun3_dma_orig_count & 0xffff);  in sun3scsi_dma_start()
359  *		dregs->csr |= CSR_DMA_ENABLE;  in sun3scsi_dma_start()
368 /* clean up after our dma is done */
378 	dregs->csr &= ~CSR_DMA_ENABLE;  in sun3scsi_dma_finish()
380 	fifo = dregs->fifo_count;  in sun3scsi_dma_finish()
388 	if ((!write_flag) && (dregs->csr & CSR_LEFT)) {  in sun3scsi_dma_finish()
393 		vaddr += (sun3_dma_orig_count - fifo);  in sun3scsi_dma_finish()
394 		vaddr--;  in sun3scsi_dma_finish()
396 		switch (dregs->csr & CSR_LEFT) {  in sun3scsi_dma_finish()
398 			*vaddr = (dregs->bpack_lo & 0xff00) >> 8;  in sun3scsi_dma_finish()
399 			vaddr--;  in sun3scsi_dma_finish()
403 			*vaddr = (dregs->bpack_hi & 0x00ff);  in sun3scsi_dma_finish()
404 			vaddr--;  in sun3scsi_dma_finish()
408 			*vaddr = (dregs->bpack_hi & 0xff00) >> 8;  in sun3scsi_dma_finish()
418 			if(dregs->csr & CSR_FIFO_EMPTY)  in sun3scsi_dma_finish()
421 			if(--tmo <= 0) {  in sun3scsi_dma_finish()
429 	dregs->udc_addr = 0x32;  in sun3scsi_dma_finish()
431 	count = 2 * dregs->udc_data;  in sun3scsi_dma_finish()
434 	fifo = dregs->fifo_count;  in sun3scsi_dma_finish()
438 	if((!write_flag) && (count - fifo) == 2) {  in sun3scsi_dma_finish()
442 		data = dregs->fifo_data;  in sun3scsi_dma_finish()
445 		vaddr += (sun3_dma_orig_count - fifo);  in sun3scsi_dma_finish()
447 		vaddr[-2] = (data & 0xff00) >> 8;  in sun3scsi_dma_finish()
448 		vaddr[-1] = (data & 0xff);  in sun3scsi_dma_finish()
456 	dregs->dma_addr_hi = 0;  in sun3scsi_dma_finish()
457 	dregs->dma_addr_lo = 0;  in sun3scsi_dma_finish()
458 	dregs->dma_count_hi = 0;  in sun3scsi_dma_finish()
459 	dregs->dma_count_lo = 0;  in sun3scsi_dma_finish()
461 	dregs->fifo_count = 0;  in sun3scsi_dma_finish()
462 	dregs->fifo_count_hi = 0;  in sun3scsi_dma_finish()
464 	dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_finish()
465 /*	dregs->csr |= CSR_DMA_ENABLE; */  in sun3scsi_dma_finish()
468 	dregs->fifo_count = 0;  in sun3scsi_dma_finish()
469 	dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_finish()
472 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_finish()
473 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_finish()
506 	.dma_boundary		= PAGE_SIZE - 1,
515 	struct resource *irq, *mem;  in sun3_scsi_probe()  local
537 		mem = platform_get_resource(pdev, IORESOURCE_MEM, i);  in sun3_scsi_probe()
538 		if (!irq || !mem)  in sun3_scsi_probe()
541 		ioaddr = sun3_ioremap(mem->start, resource_size(mem),  in sun3_scsi_probe()
548 			oldcsr = dregs->csr;  in sun3_scsi_probe()
549 			dregs->csr = 0;  in sun3_scsi_probe()
551 			if (dregs->csr == 0x1400)  in sun3_scsi_probe()
554 			dregs->csr = oldcsr;  in sun3_scsi_probe()
561 		return -ENODEV;  in sun3_scsi_probe()
564 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);  in sun3_scsi_probe()
565 	if (!irq || !mem)  in sun3_scsi_probe()
566 		return -ENODEV;  in sun3_scsi_probe()
568 	ioaddr = ioremap(mem->start, resource_size(mem));  in sun3_scsi_probe()
575 		return -ENOMEM;  in sun3_scsi_probe()
582 		error = -ENOMEM;  in sun3_scsi_probe()
586 	instance->irq = irq->start;  in sun3_scsi_probe()
589 	hostdata->base = mem->start;  in sun3_scsi_probe()
590 	hostdata->io = ioaddr;  in sun3_scsi_probe()
596 	error = request_irq(instance->irq, scsi_sun3_intr, 0,  in sun3_scsi_probe()
600 		       instance->host_no, instance->irq);  in sun3_scsi_probe()
604 	dregs->csr = 0;  in sun3_scsi_probe()
606 	dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;  in sun3_scsi_probe()
608 	dregs->fifo_count = 0;  in sun3_scsi_probe()
610 	dregs->fifo_count_hi = 0;  in sun3_scsi_probe()
611 	dregs->dma_addr_hi = 0;  in sun3_scsi_probe()
612 	dregs->dma_addr_lo = 0;  in sun3_scsi_probe()
613 	dregs->dma_count_hi = 0;  in sun3_scsi_probe()
614 	dregs->dma_count_lo = 0;  in sun3_scsi_probe()
616 	dregs->ivect = VME_DATA24 | (instance->irq & 0xff);  in sun3_scsi_probe()
631 	free_irq(instance->irq, instance);  in sun3_scsi_probe()
647 	void __iomem *ioaddr = hostdata->io;  in sun3_scsi_remove()
650 	free_irq(instance->irq, instance);  in sun3_scsi_remove()