307 		reg_val = readw(&ha->reg->ctrl_status);  in qla4xxx_isp_check_reg()
4667 	uint32_t ctrl_status;  in qla4xxx_hw_reset()  local
4681 	ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4682 	if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0)  in qla4xxx_hw_reset()
4683 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4686 	writel(set_rmask(CSR_SOFT_RESET), &ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4687 	readl(&ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4702 	uint32_t ctrl_status;  in qla4xxx_soft_reset()  local
4713 		ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4716 		if ((ctrl_status & CSR_NET_RESET_INTR) == 0)  in qla4xxx_soft_reset()
4722 	if ((ctrl_status & CSR_NET_RESET_INTR) != 0) {  in qla4xxx_soft_reset()
4728 		writel(set_rmask(CSR_NET_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4729 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4737 		ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4740 		if ((ctrl_status & CSR_SOFT_RESET) == 0) {  in qla4xxx_soft_reset()
4753 	ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4754 	if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0) {  in qla4xxx_soft_reset()
4755 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4756 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4769 		writel(set_rmask(CSR_FORCE_SOFT_RESET), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4770 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4776 			ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4779 			if ((ctrl_status & CSR_FORCE_SOFT_RESET) == 0) {  in qla4xxx_soft_reset()
5406 			while ((readw(&ha->reg->ctrl_status) &  in qla4xxx_do_dpc()
5483 		       &ha->reg->ctrl_status);  in qla4xxx_free_adapter()
5484 		readl(&ha->reg->ctrl_status);  in qla4xxx_free_adapter()