Lines Matching refs:ha
360 qla82xx_pci_set_crbwindow_2M(struct qla_hw_data *ha, ulong off_in, in qla82xx_pci_set_crbwindow_2M() argument
364 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_crbwindow_2M()
366 ha->crb_win = CRB_HI(off_in); in qla82xx_pci_set_crbwindow_2M()
367 writel(ha->crb_win, CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
372 win_read = rd_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
373 if (win_read != ha->crb_win) { in qla82xx_pci_set_crbwindow_2M()
377 __func__, ha->crb_win, win_read, off_in); in qla82xx_pci_set_crbwindow_2M()
379 *off_out = (off_in & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla82xx_pci_set_crbwindow_2M()
383 qla82xx_pci_get_crb_addr_2M(struct qla_hw_data *ha, ulong off_in, in qla82xx_pci_get_crb_addr_2M() argument
393 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
406 *off_out = off_in + m->start_2M - m->start_128M + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
415 static int qla82xx_crb_win_lock(struct qla_hw_data *ha) in qla82xx_crb_win_lock() argument
421 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_LOCK)); in qla82xx_crb_win_lock()
428 qla82xx_wr_32(ha, QLA82XX_CRB_WIN_LOCK_ID, ha->portnum); in qla82xx_crb_win_lock()
433 qla82xx_wr_32(struct qla_hw_data *ha, ulong off_in, u32 data) in qla82xx_wr_32() argument
439 rv = qla82xx_pci_get_crb_addr_2M(ha, off_in, &off); in qla82xx_wr_32()
445 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_wr_32()
447 qla82xx_crb_win_lock(ha); in qla82xx_wr_32()
448 qla82xx_pci_set_crbwindow_2M(ha, off_in, &off); in qla82xx_wr_32()
454 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); in qla82xx_wr_32()
456 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_wr_32()
463 qla82xx_rd_32(struct qla_hw_data *ha, ulong off_in) in qla82xx_rd_32() argument
470 rv = qla82xx_pci_get_crb_addr_2M(ha, off_in, &off); in qla82xx_rd_32()
476 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_rd_32()
478 qla82xx_crb_win_lock(ha); in qla82xx_rd_32()
479 qla82xx_pci_set_crbwindow_2M(ha, off_in, &off); in qla82xx_rd_32()
484 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); in qla82xx_rd_32()
486 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_rd_32()
493 int qla82xx_idc_lock(struct qla_hw_data *ha) in qla82xx_idc_lock() argument
500 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_LOCK)); in qla82xx_idc_lock()
520 void qla82xx_idc_unlock(struct qla_hw_data *ha) in qla82xx_idc_unlock() argument
522 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_UNLOCK)); in qla82xx_idc_unlock()
530 qla82xx_pci_mem_bound_check(struct qla_hw_data *ha, in qla82xx_pci_mem_bound_check() argument
546 qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr) in qla82xx_pci_set_window() argument
550 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_window()
556 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
557 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
558 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
559 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
560 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
577 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
578 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
579 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
580 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
581 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
595 ha->qdr_sn_window = window; in qla82xx_pci_set_window()
596 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
597 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
598 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
599 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
623 static int qla82xx_pci_is_same_window(struct qla_hw_data *ha, in qla82xx_pci_is_same_window() argument
644 if (ha->qdr_sn_window == window) in qla82xx_pci_is_same_window()
650 static int qla82xx_pci_mem_read_direct(struct qla_hw_data *ha, in qla82xx_pci_mem_read_direct() argument
660 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_read_direct()
662 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
668 start = qla82xx_pci_set_window(ha, off); in qla82xx_pci_mem_read_direct()
670 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_read_direct()
671 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
679 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
680 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_read_direct()
695 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
714 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
722 qla82xx_pci_mem_write_direct(struct qla_hw_data *ha, in qla82xx_pci_mem_write_direct() argument
732 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_write_direct()
734 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
740 start = qla82xx_pci_set_window(ha, off); in qla82xx_pci_mem_write_direct()
742 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_write_direct()
743 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
751 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
752 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_write_direct()
766 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
785 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
820 qla82xx_rom_lock(struct qla_hw_data *ha) in qla82xx_rom_lock() argument
824 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock()
828 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_LOCK)); in qla82xx_rom_lock()
832 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_lock()
835 __func__, ha->portnum, lock_owner); in qla82xx_rom_lock()
840 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, ha->portnum); in qla82xx_rom_lock()
845 qla82xx_rom_unlock(struct qla_hw_data *ha) in qla82xx_rom_unlock() argument
847 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, 0xffffffff); in qla82xx_rom_unlock()
848 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK)); in qla82xx_rom_unlock()
852 qla82xx_wait_rom_busy(struct qla_hw_data *ha) in qla82xx_wait_rom_busy() argument
856 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_busy()
859 done = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); in qla82xx_wait_rom_busy()
873 qla82xx_wait_rom_done(struct qla_hw_data *ha) in qla82xx_wait_rom_done() argument
877 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_done()
880 done = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); in qla82xx_wait_rom_done()
894 qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag) in qla82xx_md_rw_32() argument
898 wrt_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase, off & 0xFFFF0000); in qla82xx_md_rw_32()
901 rd_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_md_rw_32()
905 wrt_reg_dword(off_value + CRB_INDIRECT_2M + ha->nx_pcibase, in qla82xx_md_rw_32()
909 ha->nx_pcibase); in qla82xx_md_rw_32()
915 qla82xx_do_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp) in qla82xx_do_rom_fast_read() argument
918 qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, (addr & 0xFFFF0000), 1); in qla82xx_do_rom_fast_read()
919 *valp = qla82xx_md_rw_32(ha, MD_DIRECT_ROM_READ_BASE + in qla82xx_do_rom_fast_read()
926 qla82xx_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp) in qla82xx_rom_fast_read() argument
930 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_fast_read()
932 while ((qla82xx_rom_lock(ha) != 0) && (loops < 50000)) { in qla82xx_rom_fast_read()
938 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_fast_read()
944 ret = qla82xx_do_rom_fast_read(ha, addr, valp); in qla82xx_rom_fast_read()
945 qla82xx_rom_unlock(ha); in qla82xx_rom_fast_read()
950 qla82xx_read_status_reg(struct qla_hw_data *ha, uint32_t *val) in qla82xx_read_status_reg() argument
952 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_read_status_reg()
954 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_RDSR); in qla82xx_read_status_reg()
955 qla82xx_wait_rom_busy(ha); in qla82xx_read_status_reg()
956 if (qla82xx_wait_rom_done(ha)) { in qla82xx_read_status_reg()
961 *val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_ROM_RDATA); in qla82xx_read_status_reg()
966 qla82xx_flash_wait_write_finish(struct qla_hw_data *ha) in qla82xx_flash_wait_write_finish() argument
970 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_flash_wait_write_finish()
972 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); in qla82xx_flash_wait_write_finish()
974 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_flash_wait_write_finish()
986 qla82xx_flash_set_write_enable(struct qla_hw_data *ha) in qla82xx_flash_set_write_enable() argument
990 qla82xx_wait_rom_busy(ha); in qla82xx_flash_set_write_enable()
991 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); in qla82xx_flash_set_write_enable()
992 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WREN); in qla82xx_flash_set_write_enable()
993 qla82xx_wait_rom_busy(ha); in qla82xx_flash_set_write_enable()
994 if (qla82xx_wait_rom_done(ha)) in qla82xx_flash_set_write_enable()
996 if (qla82xx_read_status_reg(ha, &val) != 0) in qla82xx_flash_set_write_enable()
1004 qla82xx_write_status_reg(struct qla_hw_data *ha, uint32_t val) in qla82xx_write_status_reg() argument
1006 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_status_reg()
1008 if (qla82xx_flash_set_write_enable(ha)) in qla82xx_write_status_reg()
1010 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_WDATA, val); in qla82xx_write_status_reg()
1011 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, 0x1); in qla82xx_write_status_reg()
1012 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_status_reg()
1017 return qla82xx_flash_wait_write_finish(ha); in qla82xx_write_status_reg()
1021 qla82xx_write_disable_flash(struct qla_hw_data *ha) in qla82xx_write_disable_flash() argument
1023 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_disable_flash()
1025 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WRDI); in qla82xx_write_disable_flash()
1026 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_disable_flash()
1035 ql82xx_rom_lock_d(struct qla_hw_data *ha) in ql82xx_rom_lock_d() argument
1039 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in ql82xx_rom_lock_d()
1041 while ((qla82xx_rom_lock(ha) != 0) && (loops < 50000)) { in ql82xx_rom_lock_d()
1047 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in ql82xx_rom_lock_d()
1056 qla82xx_write_flash_dword(struct qla_hw_data *ha, uint32_t flashaddr, in qla82xx_write_flash_dword() argument
1060 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_flash_dword()
1062 ret = ql82xx_rom_lock_d(ha); in qla82xx_write_flash_dword()
1069 if (qla82xx_flash_set_write_enable(ha)) in qla82xx_write_flash_dword()
1072 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_WDATA, data); in qla82xx_write_flash_dword()
1073 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, flashaddr); in qla82xx_write_flash_dword()
1074 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); in qla82xx_write_flash_dword()
1075 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_PP); in qla82xx_write_flash_dword()
1076 qla82xx_wait_rom_busy(ha); in qla82xx_write_flash_dword()
1077 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_flash_dword()
1084 ret = qla82xx_flash_wait_write_finish(ha); in qla82xx_write_flash_dword()
1087 qla82xx_rom_unlock(ha); in qla82xx_write_flash_dword()
1102 struct qla_hw_data *ha = vha->hw; in qla82xx_pinit_from_rom() local
1110 qla82xx_rom_lock(ha); in qla82xx_pinit_from_rom()
1113 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x10, 0x0); in qla82xx_pinit_from_rom()
1114 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x14, 0x0); in qla82xx_pinit_from_rom()
1115 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x18, 0x0); in qla82xx_pinit_from_rom()
1116 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x1c, 0x0); in qla82xx_pinit_from_rom()
1117 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x20, 0x0); in qla82xx_pinit_from_rom()
1118 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x24, 0x0); in qla82xx_pinit_from_rom()
1121 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff); in qla82xx_pinit_from_rom()
1123 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00); in qla82xx_pinit_from_rom()
1125 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00); in qla82xx_pinit_from_rom()
1127 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x90000, 0x00); in qla82xx_pinit_from_rom()
1129 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xa0000, 0x00); in qla82xx_pinit_from_rom()
1131 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xb0000, 0x00); in qla82xx_pinit_from_rom()
1134 val = qla82xx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000); in qla82xx_pinit_from_rom()
1135 qla82xx_wr_32(ha, QLA82XX_CRB_SRE + 0x1000, val & (~(0x1))); in qla82xx_pinit_from_rom()
1138 qla82xx_wr_32(ha, QLA82XX_CRB_EPG + 0x1300, 0x1); in qla82xx_pinit_from_rom()
1141 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x0, 0x0); in qla82xx_pinit_from_rom()
1142 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x8, 0x0); in qla82xx_pinit_from_rom()
1143 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0); in qla82xx_pinit_from_rom()
1144 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0); in qla82xx_pinit_from_rom()
1145 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0); in qla82xx_pinit_from_rom()
1146 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x200, 0x0); in qla82xx_pinit_from_rom()
1149 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1); in qla82xx_pinit_from_rom()
1150 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1 + 0x3c, 1); in qla82xx_pinit_from_rom()
1151 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1); in qla82xx_pinit_from_rom()
1152 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1); in qla82xx_pinit_from_rom()
1153 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1); in qla82xx_pinit_from_rom()
1159 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff); in qla82xx_pinit_from_rom()
1161 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xffffffff); in qla82xx_pinit_from_rom()
1162 qla82xx_rom_unlock(ha); in qla82xx_pinit_from_rom()
1170 if (qla82xx_rom_fast_read(ha, 0, &n) != 0 || n != 0xcafecafeUL || in qla82xx_pinit_from_rom()
1171 qla82xx_rom_fast_read(ha, 4, &n) != 0) { in qla82xx_pinit_from_rom()
1201 if (qla82xx_rom_fast_read(ha, 8*i + 4*offset, &val) != 0 || in qla82xx_pinit_from_rom()
1202 qla82xx_rom_fast_read(ha, 8*i + 4*offset + 4, &addr) != 0) { in qla82xx_pinit_from_rom()
1252 qla82xx_wr_32(ha, off, buf[i].data); in qla82xx_pinit_from_rom()
1269 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0xec, 0x1e); in qla82xx_pinit_from_rom()
1270 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0x4c, 8); in qla82xx_pinit_from_rom()
1271 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_I+0x4c, 8); in qla82xx_pinit_from_rom()
1274 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0x8, 0); in qla82xx_pinit_from_rom()
1275 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0xc, 0); in qla82xx_pinit_from_rom()
1276 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0x8, 0); in qla82xx_pinit_from_rom()
1277 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0xc, 0); in qla82xx_pinit_from_rom()
1278 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0x8, 0); in qla82xx_pinit_from_rom()
1279 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0xc, 0); in qla82xx_pinit_from_rom()
1280 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0x8, 0); in qla82xx_pinit_from_rom()
1281 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0xc, 0); in qla82xx_pinit_from_rom()
1286 qla82xx_pci_mem_write_2M(struct qla_hw_data *ha, in qla82xx_pci_mem_write_2M() argument
1301 if (qla82xx_pci_mem_bound_check(ha, off, size) == 0) in qla82xx_pci_mem_write_2M()
1302 return qla82xx_pci_mem_write_direct(ha, in qla82xx_pci_mem_write_2M()
1317 if (qla82xx_pci_mem_read_2M(ha, off8 + in qla82xx_pci_mem_write_2M()
1352 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp); in qla82xx_pci_mem_write_2M()
1354 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp); in qla82xx_pci_mem_write_2M()
1356 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp); in qla82xx_pci_mem_write_2M()
1358 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp); in qla82xx_pci_mem_write_2M()
1360 qla82xx_wr_32(ha, mem_crb + in qla82xx_pci_mem_write_2M()
1363 qla82xx_wr_32(ha, mem_crb + in qla82xx_pci_mem_write_2M()
1367 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_write_2M()
1369 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_write_2M()
1372 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); in qla82xx_pci_mem_write_2M()
1379 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_write_2M()
1390 qla82xx_fw_load_from_flash(struct qla_hw_data *ha) in qla82xx_fw_load_from_flash() argument
1394 long flashaddr = ha->flt_region_bootload << 2; in qla82xx_fw_load_from_flash()
1402 if ((qla82xx_rom_fast_read(ha, flashaddr, (int *)&low)) || in qla82xx_fw_load_from_flash()
1403 (qla82xx_rom_fast_read(ha, flashaddr + 4, (int *)&high))) { in qla82xx_fw_load_from_flash()
1407 qla82xx_pci_mem_write_2M(ha, memaddr, &data, 8); in qla82xx_fw_load_from_flash()
1415 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1416 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); in qla82xx_fw_load_from_flash()
1417 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); in qla82xx_fw_load_from_flash()
1418 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1423 qla82xx_pci_mem_read_2M(struct qla_hw_data *ha, in qla82xx_pci_mem_read_2M() argument
1439 if (qla82xx_pci_mem_bound_check(ha, off, size) == 0) in qla82xx_pci_mem_read_2M()
1440 return qla82xx_pci_mem_read_direct(ha, in qla82xx_pci_mem_read_2M()
1454 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp); in qla82xx_pci_mem_read_2M()
1456 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp); in qla82xx_pci_mem_read_2M()
1458 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_read_2M()
1460 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_read_2M()
1463 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); in qla82xx_pci_mem_read_2M()
1470 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_read_2M()
1478 temp = qla82xx_rd_32(ha, in qla82xx_pci_mem_read_2M()
1535 qla82xx_get_data_desc(struct qla_hw_data *ha, in qla82xx_get_data_desc() argument
1538 const u8 *unirom = ha->hablob->fw->data; in qla82xx_get_data_desc()
1539 int idx = get_unaligned_le32((u32 *)&unirom[ha->file_prd_off] + in qla82xx_get_data_desc()
1555 qla82xx_get_bootld_offset(struct qla_hw_data *ha) in qla82xx_get_bootld_offset() argument
1560 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_bootld_offset()
1561 uri_desc = qla82xx_get_data_desc(ha, in qla82xx_get_bootld_offset()
1567 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_bootld_offset()
1570 static u32 qla82xx_get_fw_size(struct qla_hw_data *ha) in qla82xx_get_fw_size() argument
1574 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_size()
1575 uri_desc = qla82xx_get_data_desc(ha, QLA82XX_URI_DIR_SECT_FW, in qla82xx_get_fw_size()
1581 return get_unaligned_le32(&ha->hablob->fw->data[FW_SIZE_OFFSET]); in qla82xx_get_fw_size()
1585 qla82xx_get_fw_offs(struct qla_hw_data *ha) in qla82xx_get_fw_offs() argument
1590 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_offs()
1591 uri_desc = qla82xx_get_data_desc(ha, QLA82XX_URI_DIR_SECT_FW, in qla82xx_get_fw_offs()
1597 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_fw_offs()
1620 qla82xx_iospace_config(struct qla_hw_data *ha) in qla82xx_iospace_config() argument
1624 if (pci_request_regions(ha->pdev, QLA2XXX_DRIVER_NAME)) { in qla82xx_iospace_config()
1625 ql_log_pci(ql_log_fatal, ha->pdev, 0x000c, in qla82xx_iospace_config()
1631 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { in qla82xx_iospace_config()
1632 ql_log_pci(ql_log_fatal, ha->pdev, 0x000d, in qla82xx_iospace_config()
1637 len = pci_resource_len(ha->pdev, 0); in qla82xx_iospace_config()
1638 ha->nx_pcibase = ioremap(pci_resource_start(ha->pdev, 0), len); in qla82xx_iospace_config()
1639 if (!ha->nx_pcibase) { in qla82xx_iospace_config()
1640 ql_log_pci(ql_log_fatal, ha->pdev, 0x000e, in qla82xx_iospace_config()
1646 if (IS_QLA8044(ha)) { in qla82xx_iospace_config()
1647 ha->iobase = ha->nx_pcibase; in qla82xx_iospace_config()
1648 } else if (IS_QLA82XX(ha)) { in qla82xx_iospace_config()
1649 ha->iobase = ha->nx_pcibase + 0xbc000 + (ha->pdev->devfn << 11); in qla82xx_iospace_config()
1653 ha->nxdb_wr_ptr = ioremap((pci_resource_start(ha->pdev, 4) + in qla82xx_iospace_config()
1654 (ha->pdev->devfn << 12)), 4); in qla82xx_iospace_config()
1655 if (!ha->nxdb_wr_ptr) { in qla82xx_iospace_config()
1656 ql_log_pci(ql_log_fatal, ha->pdev, 0x000f, in qla82xx_iospace_config()
1664 ha->nxdb_rd_ptr = ha->nx_pcibase + (512 * 1024) + in qla82xx_iospace_config()
1665 (ha->pdev->devfn * 8); in qla82xx_iospace_config()
1667 ha->nxdb_wr_ptr = (void __iomem *)(ha->pdev->devfn == 6 ? in qla82xx_iospace_config()
1672 ha->max_req_queues = ha->max_rsp_queues = 1; in qla82xx_iospace_config()
1673 ha->msix_count = ha->max_rsp_queues + 1; in qla82xx_iospace_config()
1674 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc006, in qla82xx_iospace_config()
1677 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1678 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1679 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0010, in qla82xx_iospace_config()
1682 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1683 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1703 struct qla_hw_data *ha = vha->hw; in qla82xx_pci_config() local
1706 pci_set_master(ha->pdev); in qla82xx_pci_config()
1707 ret = pci_set_mwi(ha->pdev); in qla82xx_pci_config()
1708 ha->chip_revision = ha->pdev->revision; in qla82xx_pci_config()
1711 ha->chip_revision, ret); in qla82xx_pci_config()
1724 struct qla_hw_data *ha = vha->hw; in qla82xx_reset_chip() local
1726 ha->isp_ops->disable_intrs(ha); in qla82xx_reset_chip()
1733 struct qla_hw_data *ha = vha->hw; in qla82xx_config_rings() local
1734 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_config_rings()
1736 struct req_que *req = ha->req_q_map[0]; in qla82xx_config_rings()
1737 struct rsp_que *rsp = ha->rsp_q_map[0]; in qla82xx_config_rings()
1740 icb = (struct init_cb_81xx *)ha->init_cb; in qla82xx_config_rings()
1754 qla82xx_fw_load_from_blob(struct qla_hw_data *ha) in qla82xx_fw_load_from_blob() argument
1762 ptr64 = (u64 *)qla82xx_get_bootld_offset(ha); in qla82xx_fw_load_from_blob()
1767 if (qla82xx_pci_mem_write_2M(ha, flashaddr, &data, 8)) in qla82xx_fw_load_from_blob()
1773 size = qla82xx_get_fw_size(ha) / 8; in qla82xx_fw_load_from_blob()
1774 ptr64 = (u64 *)qla82xx_get_fw_offs(ha); in qla82xx_fw_load_from_blob()
1779 if (qla82xx_pci_mem_write_2M(ha, flashaddr, &data, 8)) in qla82xx_fw_load_from_blob()
1790 qla82xx_wr_32(ha, QLA82XX_CAM_RAM(0x1fc), QLA82XX_BDINFO_MAGIC); in qla82xx_fw_load_from_blob()
1792 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1793 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); in qla82xx_fw_load_from_blob()
1794 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); in qla82xx_fw_load_from_blob()
1795 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1800 qla82xx_set_product_offset(struct qla_hw_data *ha) in qla82xx_set_product_offset() argument
1803 const uint8_t *unirom = ha->hablob->fw->data; in qla82xx_set_product_offset()
1807 uint8_t chiprev = ha->chip_revision; in qla82xx_set_product_offset()
1830 ha->file_prd_off = offset; in qla82xx_set_product_offset()
1842 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_firmware_blob() local
1843 const struct firmware *fw = ha->hablob->fw; in qla82xx_validate_firmware_blob()
1845 ha->fw_type = fw_type; in qla82xx_validate_firmware_blob()
1848 if (qla82xx_set_product_offset(ha)) in qla82xx_validate_firmware_blob()
1866 qla82xx_check_cmdpeg_state(struct qla_hw_data *ha) in qla82xx_check_cmdpeg_state() argument
1870 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_cmdpeg_state()
1873 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1874 val = qla82xx_rd_32(ha, CRB_CMDPEG_STATE); in qla82xx_check_cmdpeg_state()
1875 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1897 val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_PEGTUNE_DONE); in qla82xx_check_cmdpeg_state()
1898 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1899 qla82xx_wr_32(ha, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); in qla82xx_check_cmdpeg_state()
1900 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1905 qla82xx_check_rcvpeg_state(struct qla_hw_data *ha) in qla82xx_check_rcvpeg_state() argument
1909 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_rcvpeg_state()
1912 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1913 val = qla82xx_rd_32(ha, CRB_RCVPEG_STATE); in qla82xx_check_rcvpeg_state()
1914 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1935 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1936 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, PHAN_INITIALIZE_FAILED); in qla82xx_check_rcvpeg_state()
1937 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1955 struct qla_hw_data *ha = vha->hw; in qla82xx_mbx_completion() local
1956 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_mbx_completion()
1961 ha->flags.mbox_int = 1; in qla82xx_mbx_completion()
1962 ha->mailbox_out[0] = mb0; in qla82xx_mbx_completion()
1964 for (cnt = 1; cnt < ha->mbx_count; cnt++) { in qla82xx_mbx_completion()
1965 ha->mailbox_out[cnt] = rd_reg_word(wptr); in qla82xx_mbx_completion()
1969 if (!ha->mcp) in qla82xx_mbx_completion()
1987 struct qla_hw_data *ha; in qla82xx_intr_handler() local
2002 ha = rsp->hw; in qla82xx_intr_handler()
2004 if (!ha->flags.msi_enabled) { in qla82xx_intr_handler()
2005 status = qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2006 if (!(status & ha->nx_legacy_intr.int_vec_bit)) in qla82xx_intr_handler()
2009 status1 = qla82xx_rd_32(ha, ISR_INT_STATE_REG); in qla82xx_intr_handler()
2015 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff); in qla82xx_intr_handler()
2018 qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2019 qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2021 reg = &ha->iobase->isp82; in qla82xx_intr_handler()
2023 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2024 vha = pci_get_drvdata(ha->pdev); in qla82xx_intr_handler()
2058 qla2x00_handle_mbx_completion(ha, status); in qla82xx_intr_handler()
2059 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2061 if (!ha->flags.msi_enabled) in qla82xx_intr_handler()
2062 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_intr_handler()
2071 struct qla_hw_data *ha; in qla82xx_msix_default() local
2086 ha = rsp->hw; in qla82xx_msix_default()
2088 reg = &ha->iobase->isp82; in qla82xx_msix_default()
2090 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_default()
2091 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_default()
2127 qla2x00_handle_mbx_completion(ha, status); in qla82xx_msix_default()
2128 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_default()
2137 struct qla_hw_data *ha; in qla82xx_msix_rsp_q() local
2150 ha = rsp->hw; in qla82xx_msix_rsp_q()
2151 reg = &ha->iobase->isp82; in qla82xx_msix_rsp_q()
2152 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2153 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_rsp_q()
2160 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2168 struct qla_hw_data *ha; in qla82xx_poll() local
2183 ha = rsp->hw; in qla82xx_poll()
2185 reg = &ha->iobase->isp82; in qla82xx_poll()
2186 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_poll()
2187 vha = pci_get_drvdata(ha->pdev); in qla82xx_poll()
2221 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_poll()
2225 qla82xx_enable_intrs(struct qla_hw_data *ha) in qla82xx_enable_intrs() argument
2227 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_enable_intrs()
2230 spin_lock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2231 if (IS_QLA8044(ha)) in qla82xx_enable_intrs()
2232 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 0); in qla82xx_enable_intrs()
2234 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_enable_intrs()
2235 spin_unlock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2236 ha->interrupts_on = 1; in qla82xx_enable_intrs()
2240 qla82xx_disable_intrs(struct qla_hw_data *ha) in qla82xx_disable_intrs() argument
2242 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_disable_intrs()
2244 if (ha->interrupts_on) in qla82xx_disable_intrs()
2247 spin_lock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2248 if (IS_QLA8044(ha)) in qla82xx_disable_intrs()
2249 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 1); in qla82xx_disable_intrs()
2251 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); in qla82xx_disable_intrs()
2252 spin_unlock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2253 ha->interrupts_on = 0; in qla82xx_disable_intrs()
2256 void qla82xx_init_flags(struct qla_hw_data *ha) in qla82xx_init_flags() argument
2261 rwlock_init(&ha->hw_lock); in qla82xx_init_flags()
2262 ha->qdr_sn_window = -1; in qla82xx_init_flags()
2263 ha->ddr_mn_window = -1; in qla82xx_init_flags()
2264 ha->curr_window = 255; in qla82xx_init_flags()
2265 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla82xx_init_flags()
2266 nx_legacy_intr = &legacy_intr[ha->portnum]; in qla82xx_init_flags()
2267 ha->nx_legacy_intr.int_vec_bit = nx_legacy_intr->int_vec_bit; in qla82xx_init_flags()
2268 ha->nx_legacy_intr.tgt_status_reg = nx_legacy_intr->tgt_status_reg; in qla82xx_init_flags()
2269 ha->nx_legacy_intr.tgt_mask_reg = nx_legacy_intr->tgt_mask_reg; in qla82xx_init_flags()
2270 ha->nx_legacy_intr.pci_int_reg = nx_legacy_intr->pci_int_reg; in qla82xx_init_flags()
2278 struct qla_hw_data *ha = vha->hw; in qla82xx_set_idc_version() local
2280 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_idc_version()
2281 if (drv_active == (QLA82XX_DRV_ACTIVE << (ha->portnum * 4))) { in qla82xx_set_idc_version()
2282 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, in qla82xx_set_idc_version()
2287 idc_ver = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_IDC_VERSION); in qla82xx_set_idc_version()
2300 struct qla_hw_data *ha = vha->hw; in qla82xx_set_drv_active() local
2302 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_drv_active()
2306 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, in qla82xx_set_drv_active()
2308 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_drv_active()
2310 drv_active |= (QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_set_drv_active()
2311 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active); in qla82xx_set_drv_active()
2315 qla82xx_clear_drv_active(struct qla_hw_data *ha) in qla82xx_clear_drv_active() argument
2319 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_clear_drv_active()
2320 drv_active &= ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_clear_drv_active()
2321 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active); in qla82xx_clear_drv_active()
2325 qla82xx_need_reset(struct qla_hw_data *ha) in qla82xx_need_reset() argument
2330 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset()
2333 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset()
2334 rval = drv_state & (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_need_reset()
2340 qla82xx_set_rst_ready(struct qla_hw_data *ha) in qla82xx_set_rst_ready() argument
2343 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_set_rst_ready()
2345 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_rst_ready()
2349 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, QLA82XX_DRVST_NOT_RDY); in qla82xx_set_rst_ready()
2350 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_rst_ready()
2352 drv_state |= (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_set_rst_ready()
2355 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state); in qla82xx_set_rst_ready()
2359 qla82xx_clear_rst_ready(struct qla_hw_data *ha) in qla82xx_clear_rst_ready() argument
2363 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_clear_rst_ready()
2364 drv_state &= ~(QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_clear_rst_ready()
2365 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state); in qla82xx_clear_rst_ready()
2369 qla82xx_set_qsnt_ready(struct qla_hw_data *ha) in qla82xx_set_qsnt_ready() argument
2373 qsnt_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_qsnt_ready()
2374 qsnt_state |= (QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_set_qsnt_ready()
2375 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, qsnt_state); in qla82xx_set_qsnt_ready()
2381 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_qsnt_ready() local
2384 qsnt_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_clear_qsnt_ready()
2385 qsnt_state &= ~(QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_clear_qsnt_ready()
2386 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, qsnt_state); in qla82xx_clear_qsnt_ready()
2394 struct qla_hw_data *ha = vha->hw; in qla82xx_load_fw() local
2404 rst = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET); in qla82xx_load_fw()
2406 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, rst); in qla82xx_load_fw()
2419 if (qla82xx_fw_load_from_flash(ha) == QLA_SUCCESS) { in qla82xx_load_fw()
2433 blob = ha->hablob = qla2x00_request_firmware(vha); in qla82xx_load_fw()
2452 if (qla82xx_fw_load_from_blob(ha) == QLA_SUCCESS) { in qla82xx_load_fw()
2471 struct qla_hw_data *ha = vha->hw; in qla82xx_start_firmware() local
2474 qla82xx_wr_32(ha, CRB_DMA_SHIFT, QLA82XX_DMA_SHIFT_VALUE); in qla82xx_start_firmware()
2479 qla82xx_wr_32(ha, CRB_CMDPEG_STATE, 0); in qla82xx_start_firmware()
2480 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, 0); in qla82xx_start_firmware()
2483 qla82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS1, 0); in qla82xx_start_firmware()
2484 qla82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS2, 0); in qla82xx_start_firmware()
2493 if (qla82xx_check_cmdpeg_state(ha) != QLA_SUCCESS) { in qla82xx_start_firmware()
2500 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk); in qla82xx_start_firmware()
2501 ha->link_width = (lnk >> 4) & 0x3f; in qla82xx_start_firmware()
2504 return qla82xx_check_rcvpeg_state(ha); in qla82xx_start_firmware()
2513 struct qla_hw_data *ha = vha->hw; in qla82xx_read_flash_data() local
2517 if (qla82xx_rom_fast_read(ha, faddr, &val)) { in qla82xx_read_flash_data()
2529 qla82xx_unprotect_flash(struct qla_hw_data *ha) in qla82xx_unprotect_flash() argument
2533 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_unprotect_flash()
2535 ret = ql82xx_rom_lock_d(ha); in qla82xx_unprotect_flash()
2542 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_unprotect_flash()
2547 ret = qla82xx_write_status_reg(ha, val); in qla82xx_unprotect_flash()
2550 qla82xx_write_status_reg(ha, val); in qla82xx_unprotect_flash()
2553 if (qla82xx_write_disable_flash(ha) != 0) in qla82xx_unprotect_flash()
2558 qla82xx_rom_unlock(ha); in qla82xx_unprotect_flash()
2563 qla82xx_protect_flash(struct qla_hw_data *ha) in qla82xx_protect_flash() argument
2567 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_protect_flash()
2569 ret = ql82xx_rom_lock_d(ha); in qla82xx_protect_flash()
2576 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_protect_flash()
2582 ret = qla82xx_write_status_reg(ha, val); in qla82xx_protect_flash()
2587 if (qla82xx_write_disable_flash(ha) != 0) in qla82xx_protect_flash()
2591 qla82xx_rom_unlock(ha); in qla82xx_protect_flash()
2596 qla82xx_erase_sector(struct qla_hw_data *ha, int addr) in qla82xx_erase_sector() argument
2599 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_erase_sector()
2601 ret = ql82xx_rom_lock_d(ha); in qla82xx_erase_sector()
2608 qla82xx_flash_set_write_enable(ha); in qla82xx_erase_sector()
2609 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, addr); in qla82xx_erase_sector()
2610 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); in qla82xx_erase_sector()
2611 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_SE); in qla82xx_erase_sector()
2613 if (qla82xx_wait_rom_done(ha)) { in qla82xx_erase_sector()
2619 ret = qla82xx_flash_wait_write_finish(ha); in qla82xx_erase_sector()
2621 qla82xx_rom_unlock(ha); in qla82xx_erase_sector()
2648 struct qla_hw_data *ha = vha->hw; in qla82xx_write_flash_data() local
2655 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, in qla82xx_write_flash_data()
2665 rest_addr = ha->fdt_block_size - 1; in qla82xx_write_flash_data()
2667 ret = qla82xx_unprotect_flash(ha); in qla82xx_write_flash_data()
2678 ret = qla82xx_erase_sector(ha, faddr); in qla82xx_write_flash_data()
2693 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2699 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2704 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2715 ret = qla82xx_write_flash_dword(ha, faddr, in qla82xx_write_flash_data()
2725 ret = qla82xx_protect_flash(ha); in qla82xx_write_flash_data()
2731 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2758 struct qla_hw_data *ha = vha->hw; in qla82xx_start_iocbs() local
2759 struct req_que *req = ha->req_q_map[0]; in qla82xx_start_iocbs()
2770 dbval = 0x04 | (ha->portnum << 5); in qla82xx_start_iocbs()
2774 qla82xx_wr_32(ha, (unsigned long)ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2776 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2778 while (rd_reg_dword(ha->nxdb_rd_ptr) != dbval) { in qla82xx_start_iocbs()
2779 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2786 qla82xx_rom_lock_recovery(struct qla_hw_data *ha) in qla82xx_rom_lock_recovery() argument
2788 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock_recovery()
2791 if (qla82xx_rom_lock(ha)) { in qla82xx_rom_lock_recovery()
2792 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_lock_recovery()
2802 qla82xx_rom_unlock(ha); in qla82xx_rom_lock_recovery()
2822 struct qla_hw_data *ha = vha->hw; in qla82xx_device_bootstrap() local
2825 need_reset = qla82xx_need_reset(ha); in qla82xx_device_bootstrap()
2829 if (ha->flags.isp82xx_fw_hung) in qla82xx_device_bootstrap()
2830 qla82xx_rom_lock_recovery(ha); in qla82xx_device_bootstrap()
2832 old_count = qla82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); in qla82xx_device_bootstrap()
2835 count = qla82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); in qla82xx_device_bootstrap()
2841 qla82xx_rom_lock_recovery(ha); in qla82xx_device_bootstrap()
2847 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_INITIALIZING); in qla82xx_device_bootstrap()
2849 qla82xx_idc_unlock(ha); in qla82xx_device_bootstrap()
2851 qla82xx_idc_lock(ha); in qla82xx_device_bootstrap()
2856 qla82xx_clear_drv_active(ha); in qla82xx_device_bootstrap()
2857 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_FAILED); in qla82xx_device_bootstrap()
2864 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_READY); in qla82xx_device_bootstrap()
2882 struct qla_hw_data *ha = vha->hw; in qla82xx_need_qsnt_handler() local
2892 qla82xx_set_qsnt_ready(ha); in qla82xx_need_qsnt_handler()
2897 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_qsnt_handler()
2898 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_qsnt_handler()
2912 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_need_qsnt_handler()
2916 qla82xx_idc_unlock(ha); in qla82xx_need_qsnt_handler()
2918 qla82xx_idc_lock(ha); in qla82xx_need_qsnt_handler()
2924 qla82xx_idc_unlock(ha); in qla82xx_need_qsnt_handler()
2926 qla82xx_idc_lock(ha); in qla82xx_need_qsnt_handler()
2928 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_qsnt_handler()
2929 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_qsnt_handler()
2932 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_qsnt_handler()
2937 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_QUIESCENT); in qla82xx_need_qsnt_handler()
2954 struct qla_hw_data *ha = vha->hw; in qla82xx_wait_for_state_change() local
2959 qla82xx_idc_lock(ha); in qla82xx_wait_for_state_change()
2960 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_wait_for_state_change()
2961 qla82xx_idc_unlock(ha); in qla82xx_wait_for_state_change()
2970 struct qla_hw_data *ha = vha->hw; in qla8xxx_dev_failed_handler() local
2976 if (IS_QLA82XX(ha)) { in qla8xxx_dev_failed_handler()
2977 qla82xx_clear_drv_active(ha); in qla8xxx_dev_failed_handler()
2978 qla82xx_idc_unlock(ha); in qla8xxx_dev_failed_handler()
2979 } else if (IS_QLA8044(ha)) { in qla8xxx_dev_failed_handler()
2980 qla8044_clear_drv_active(ha); in qla8xxx_dev_failed_handler()
2981 qla8044_idc_unlock(ha); in qla8xxx_dev_failed_handler()
3009 struct qla_hw_data *ha = vha->hw; in qla82xx_need_reset_handler() local
3010 struct req_que *req = ha->req_q_map[0]; in qla82xx_need_reset_handler()
3013 qla82xx_idc_unlock(ha); in qla82xx_need_reset_handler()
3015 ha->isp_ops->get_flash_version(vha, req->ring); in qla82xx_need_reset_handler()
3016 ha->isp_ops->nvram_config(vha); in qla82xx_need_reset_handler()
3017 qla82xx_idc_lock(ha); in qla82xx_need_reset_handler()
3020 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3021 if (!ha->flags.nic_core_reset_owner) { in qla82xx_need_reset_handler()
3023 "reset_acknowledged by 0x%x\n", ha->portnum); in qla82xx_need_reset_handler()
3024 qla82xx_set_rst_ready(ha); in qla82xx_need_reset_handler()
3026 active_mask = ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_need_reset_handler()
3033 reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); in qla82xx_need_reset_handler()
3035 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset_handler()
3036 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3037 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_reset_handler()
3051 qla82xx_idc_unlock(ha); in qla82xx_need_reset_handler()
3053 qla82xx_idc_lock(ha); in qla82xx_need_reset_handler()
3054 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset_handler()
3055 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3056 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset_handler()
3058 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_reset_handler()
3076 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_COLD); in qla82xx_need_reset_handler()
3077 qla82xx_set_rst_ready(ha); in qla82xx_need_reset_handler()
3091 struct qla_hw_data *ha = vha->hw; in qla82xx_check_md_needed() local
3095 fw_major_version = ha->fw_major_version; in qla82xx_check_md_needed()
3096 fw_minor_version = ha->fw_minor_version; in qla82xx_check_md_needed()
3097 fw_subminor_version = ha->fw_subminor_version; in qla82xx_check_md_needed()
3104 if (!ha->fw_dumped) { in qla82xx_check_md_needed()
3105 if ((fw_major_version != ha->fw_major_version || in qla82xx_check_md_needed()
3106 fw_minor_version != ha->fw_minor_version || in qla82xx_check_md_needed()
3107 fw_subminor_version != ha->fw_subminor_version) || in qla82xx_check_md_needed()
3108 (ha->prev_minidump_failed)) { in qla82xx_check_md_needed()
3113 ha->fw_major_version, in qla82xx_check_md_needed()
3114 ha->fw_minor_version, in qla82xx_check_md_needed()
3115 ha->fw_subminor_version, in qla82xx_check_md_needed()
3116 ha->prev_minidump_failed); in qla82xx_check_md_needed()
3179 struct qla_hw_data *ha = vha->hw; in qla82xx_device_state_handler() local
3182 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3188 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_device_state_handler()
3196 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3206 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_device_state_handler()
3221 ha->flags.nic_core_reset_owner = 0; in qla82xx_device_state_handler()
3227 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3229 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3235 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3237 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3240 (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3245 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout in qla82xx_device_state_handler()
3252 if (ha->flags.quiesce_owner) in qla82xx_device_state_handler()
3255 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3257 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3260 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout in qla82xx_device_state_handler()
3268 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3270 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3275 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3283 struct qla_hw_data *ha = vha->hw; in qla82xx_check_temp() local
3285 temp = qla82xx_rd_32(ha, CRB_TEMP_STATE); in qla82xx_check_temp()
3314 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_pending_mbx() local
3316 if (ha->flags.mbox_busy) { in qla82xx_clear_pending_mbx()
3317 ha->flags.mbox_int = 1; in qla82xx_clear_pending_mbx()
3318 ha->flags.mbox_busy = 0; in qla82xx_clear_pending_mbx()
3321 if (test_and_clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) in qla82xx_clear_pending_mbx()
3322 complete(&ha->mbx_intr_comp); in qla82xx_clear_pending_mbx()
3329 struct qla_hw_data *ha = vha->hw; in qla82xx_watchdog() local
3332 if (!ha->flags.nic_core_reset_hdlr_active) { in qla82xx_watchdog()
3333 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_watchdog()
3336 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3354 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3360 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, in qla82xx_watchdog()
3362 halt_status = qla82xx_rd_32(ha, in qla82xx_watchdog()
3370 qla82xx_rd_32(ha, QLA82XX_PEG_HALT_STATUS2), in qla82xx_watchdog()
3371 qla82xx_rd_32(ha, in qla82xx_watchdog()
3373 qla82xx_rd_32(ha, in qla82xx_watchdog()
3375 qla82xx_rd_32(ha, in qla82xx_watchdog()
3377 qla82xx_rd_32(ha, in qla82xx_watchdog()
3379 qla82xx_rd_32(ha, in qla82xx_watchdog()
3395 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3406 struct qla_hw_data *ha = vha->hw; in qla82xx_load_risc() local
3408 if (IS_QLA82XX(ha)) in qla82xx_load_risc()
3410 else if (IS_QLA8044(ha)) { in qla82xx_load_risc()
3411 qla8044_idc_lock(ha); in qla82xx_load_risc()
3414 qla8044_idc_unlock(ha); in qla82xx_load_risc()
3423 struct qla_hw_data *ha = vha->hw; in qla82xx_set_reset_owner() local
3426 if (IS_QLA82XX(ha)) in qla82xx_set_reset_owner()
3427 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_set_reset_owner()
3428 else if (IS_QLA8044(ha)) in qla82xx_set_reset_owner()
3434 if (IS_QLA82XX(ha)) { in qla82xx_set_reset_owner()
3435 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_set_reset_owner()
3437 ha->flags.nic_core_reset_owner = 1; in qla82xx_set_reset_owner()
3439 "reset_owner is 0x%x\n", ha->portnum); in qla82xx_set_reset_owner()
3440 } else if (IS_QLA8044(ha)) in qla82xx_set_reset_owner()
3464 struct qla_hw_data *ha = vha->hw; in qla82xx_abort_isp() local
3471 ha->flags.nic_core_reset_hdlr_active = 1; in qla82xx_abort_isp()
3473 qla82xx_idc_lock(ha); in qla82xx_abort_isp()
3475 qla82xx_idc_unlock(ha); in qla82xx_abort_isp()
3477 if (IS_QLA82XX(ha)) in qla82xx_abort_isp()
3479 else if (IS_QLA8044(ha)) { in qla82xx_abort_isp()
3480 qla8044_idc_lock(ha); in qla82xx_abort_isp()
3483 qla8044_idc_unlock(ha); in qla82xx_abort_isp()
3487 qla82xx_idc_lock(ha); in qla82xx_abort_isp()
3488 qla82xx_clear_rst_ready(ha); in qla82xx_abort_isp()
3489 qla82xx_idc_unlock(ha); in qla82xx_abort_isp()
3492 ha->flags.isp82xx_fw_hung = 0; in qla82xx_abort_isp()
3493 ha->flags.nic_core_reset_hdlr_active = 0; in qla82xx_abort_isp()
3500 if (ha->isp_abort_cnt == 0) { in qla82xx_abort_isp()
3508 ha->isp_ops->reset_adapter(vha); in qla82xx_abort_isp()
3514 ha->isp_abort_cnt--; in qla82xx_abort_isp()
3517 ha->isp_abort_cnt); in qla82xx_abort_isp()
3521 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; in qla82xx_abort_isp()
3524 ha->isp_abort_cnt); in qla82xx_abort_isp()
3607 struct qla_hw_data *ha = vha->hw; in qla82xx_chip_reset_cleanup() local
3613 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3616 if (IS_QLA82XX(ha)) in qla82xx_chip_reset_cleanup()
3618 else if (IS_QLA8044(ha)) in qla82xx_chip_reset_cleanup()
3621 ha->flags.isp82xx_fw_hung = 1; in qla82xx_chip_reset_cleanup()
3629 __func__, ha->flags.isp82xx_fw_hung); in qla82xx_chip_reset_cleanup()
3632 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3637 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3638 for (que = 0; que < ha->max_req_queues; que++) { in qla82xx_chip_reset_cleanup()
3639 req = ha->req_q_map[que]; in qla82xx_chip_reset_cleanup()
3648 !ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3650 &ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3651 if (ha->isp_ops->abort_command(sp)) { in qla82xx_chip_reset_cleanup()
3660 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3665 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3684 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_control() local
3693 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_minidump_process_control()
3700 qla82xx_md_rw_32(ha, crb_addr, in qla82xx_minidump_process_control()
3706 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3707 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3712 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3719 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3723 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3725 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3732 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3743 read_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_control()
3756 read_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_control()
3776 qla82xx_md_rw_32(ha, addr, read_value, 1); in qla82xx_minidump_process_control()
3801 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdocm() local
3812 r_value = rd_reg_dword(r_addr + ha->nx_pcibase); in qla82xx_minidump_process_rdocm()
3823 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmux() local
3836 qla82xx_md_rw_32(ha, s_addr, s_value, 1); in qla82xx_minidump_process_rdmux()
3837 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_rdmux()
3849 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdcrb() local
3860 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_rdcrb()
3872 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l2tag() local
3894 qla82xx_md_rw_32(ha, t_r_addr, t_value, 1); in qla82xx_minidump_process_l2tag()
3896 qla82xx_md_rw_32(ha, c_addr, c_value_w, 1); in qla82xx_minidump_process_l2tag()
3901 c_value_r = qla82xx_md_rw_32(ha, c_addr, 0, 0); in qla82xx_minidump_process_l2tag()
3917 r_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_l2tag()
3931 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l1cache() local
3949 qla82xx_md_rw_32(ha, t_r_addr, t_value, 1); in qla82xx_minidump_process_l1cache()
3950 qla82xx_md_rw_32(ha, c_addr, c_value_w, 1); in qla82xx_minidump_process_l1cache()
3953 r_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_l1cache()
3966 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_queue() local
3980 qla82xx_md_rw_32(ha, s_addr, qid, 1); in qla82xx_minidump_process_queue()
3983 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_queue()
3996 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdrom() local
4007 qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, in qla82xx_minidump_process_rdrom()
4009 r_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdrom()
4022 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmem() local
4051 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4053 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_LO, r_addr, 1); in qla82xx_minidump_process_rdmem()
4055 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_HI, r_value, 1); in qla82xx_minidump_process_rdmem()
4057 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1); in qla82xx_minidump_process_rdmem()
4059 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1); in qla82xx_minidump_process_rdmem()
4062 r_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdmem()
4071 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4076 r_data = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdmem()
4082 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4090 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_template_chksum() local
4092 uint32_t *d_ptr = (uint32_t *)ha->md_tmplt_hdr; in qla82xx_validate_template_chksum()
4093 int count = ha->md_template_size/sizeof(uint32_t); in qla82xx_validate_template_chksum()
4117 struct qla_hw_data *ha = vha->hw; in qla82xx_md_collect() local
4125 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_collect()
4126 data_ptr = ha->md_dump; in qla82xx_md_collect()
4128 if (ha->fw_dumped) { in qla82xx_md_collect()
4131 "-- ignoring request.\n", ha->fw_dump); in qla82xx_md_collect()
4135 ha->fw_dumped = false; in qla82xx_md_collect()
4137 if (!ha->md_tmplt_hdr || !ha->md_dump) { in qla82xx_md_collect()
4143 if (ha->flags.isp82xx_no_md_cap) { in qla82xx_md_collect()
4147 ha->flags.isp82xx_no_md_cap = 0; in qla82xx_md_collect()
4180 total_data_size = ha->md_dump_size; in qla82xx_md_collect()
4194 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); in qla82xx_md_collect()
4227 data_collected, (ha->md_dump_size - data_collected)); in qla82xx_md_collect()
4298 (uint8_t *)ha->md_dump; in qla82xx_md_collect()
4314 vha->host_no, ha->md_tmplt_hdr, vha->host_no, ha->md_dump); in qla82xx_md_collect()
4315 ha->fw_dumped = true; in qla82xx_md_collect()
4325 struct qla_hw_data *ha = vha->hw; in qla82xx_md_alloc() local
4329 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_alloc()
4340 ha->md_dump_size += tmplt_hdr->capture_size_array[k]; in qla82xx_md_alloc()
4343 if (ha->md_dump) { in qla82xx_md_alloc()
4349 ha->md_dump = vmalloc(ha->md_dump_size); in qla82xx_md_alloc()
4350 if (ha->md_dump == NULL) { in qla82xx_md_alloc()
4353 "(0x%x).\n", ha->md_dump_size); in qla82xx_md_alloc()
4362 struct qla_hw_data *ha = vha->hw; in qla82xx_md_free() local
4365 if (ha->md_tmplt_hdr) { in qla82xx_md_free()
4368 ha->md_tmplt_hdr, ha->md_template_size / 1024); in qla82xx_md_free()
4369 dma_free_coherent(&ha->pdev->dev, ha->md_template_size, in qla82xx_md_free()
4370 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_free()
4371 ha->md_tmplt_hdr = NULL; in qla82xx_md_free()
4375 if (ha->md_dump) { in qla82xx_md_free()
4378 ha->md_dump, ha->md_dump_size / 1024); in qla82xx_md_free()
4379 vfree(ha->md_dump); in qla82xx_md_free()
4380 ha->md_dump_size = 0; in qla82xx_md_free()
4381 ha->md_dump = NULL; in qla82xx_md_free()
4388 struct qla_hw_data *ha = vha->hw; in qla82xx_md_prep() local
4396 ha->md_template_size / 1024); in qla82xx_md_prep()
4399 if (IS_QLA8044(ha)) in qla82xx_md_prep()
4413 ha->md_dump_size / 1024); in qla82xx_md_prep()
4417 ha->md_tmplt_hdr, in qla82xx_md_prep()
4418 ha->md_template_size / 1024); in qla82xx_md_prep()
4419 dma_free_coherent(&ha->pdev->dev, in qla82xx_md_prep()
4420 ha->md_template_size, in qla82xx_md_prep()
4421 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_prep()
4422 ha->md_tmplt_hdr = NULL; in qla82xx_md_prep()
4434 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_on() local
4436 qla82xx_idc_lock(ha); in qla82xx_beacon_on()
4444 ha->beacon_blink_led = 1; in qla82xx_beacon_on()
4446 qla82xx_idc_unlock(ha); in qla82xx_beacon_on()
4455 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_off() local
4457 qla82xx_idc_lock(ha); in qla82xx_beacon_off()
4465 ha->beacon_blink_led = 0; in qla82xx_beacon_off()
4467 qla82xx_idc_unlock(ha); in qla82xx_beacon_off()
4474 struct qla_hw_data *ha = vha->hw; in qla82xx_fw_dump() local
4476 if (!ha->allow_cna_fw_dump) in qla82xx_fw_dump()
4480 ha->flags.isp82xx_no_md_cap = 1; in qla82xx_fw_dump()
4481 qla82xx_idc_lock(ha); in qla82xx_fw_dump()
4483 qla82xx_idc_unlock(ha); in qla82xx_fw_dump()