2369 	ha->pci_attr = rd_reg_word(&reg->ctrl_status);  in qla2100_pci_config()
2420 		wrt_reg_word(&reg->ctrl_status, 0x20);  in qla2300_pci_config()
2421 		rd_reg_word(&reg->ctrl_status);  in qla2300_pci_config()
2430 		wrt_reg_word(&reg->ctrl_status, 0x0);  in qla2300_pci_config()
2431 		rd_reg_word(&reg->ctrl_status);  in qla2300_pci_config()
2451 	ha->pci_attr = rd_reg_word(&reg->ctrl_status);  in qla2300_pci_config()
2495 	ha->pci_attr = rd_reg_dword(&reg->ctrl_status);  in qla24xx_pci_config()
2613 		wrt_reg_word(&reg->ctrl_status, 0x20);  in qla2x00_reset_chip()
2614 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2627 		wrt_reg_word(&reg->ctrl_status, 0x10);  in qla2x00_reset_chip()
2628 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2646 		wrt_reg_word(&reg->ctrl_status, 0);  in qla2x00_reset_chip()
2647 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2662 	wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_reset_chip()
2673 			if ((rd_reg_word(&reg->ctrl_status) &  in qla2x00_reset_chip()
2752 	wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);  in qla24xx_reset_risc()
2754 		if ((rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)  in qla24xx_reset_risc()
2760 	if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE))  in qla24xx_reset_risc()
2766 	    rd_reg_dword(&reg->ctrl_status),  in qla24xx_reset_risc()
2767 	    (rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE));  in qla24xx_reset_risc()
2769 	wrt_reg_dword(&reg->ctrl_status,  in qla24xx_reset_risc()
2795 	rd_reg_dword(&reg->ctrl_status);  in qla24xx_reset_risc()
2798 		if ((rd_reg_dword(&reg->ctrl_status) &  in qla24xx_reset_risc()
2804 	if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))  in qla24xx_reset_risc()
2810 	    rd_reg_dword(&reg->ctrl_status));  in qla24xx_reset_risc()
3000 	wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_chip_diag()
3007 	data = qla2x00_debounce_register(&reg->ctrl_status);  in qla2x00_chip_diag()
3010 		data = rd_reg_word(&reg->ctrl_status);  in qla2x00_chip_diag()
4606 		if ((rd_reg_word(&reg->ctrl_status) >> 14) == 1)  in qla2x00_nvram_config()