Lines Matching full:span
123 u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map) in MR_LdSpanArrayGet() argument
125 return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef); in MR_LdSpanArrayGet()
148 static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span, in MR_LdSpanPtrGet() argument
151 return &map->raidMap.ldSpanMap[ld].spanBlock[span].span; in MR_LdSpanPtrGet()
338 dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n", in MR_ValidateMapInfo()
375 u32 span, j; in MR_GetSpanBlock() local
377 for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) { in MR_GetSpanBlock()
394 return span; in MR_GetSpanBlock()
404 * This routine calculates the Span block for given row using spanset.
414 * span - Span number
426 u32 span, info; in mr_spanset_get_span_block() local
438 for (span = 0; span < raid->spanDepth; span++) in mr_spanset_get_span_block()
439 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. in mr_spanset_get_span_block()
442 spanBlock[span]. in mr_spanset_get_span_block()
459 return span; in mr_spanset_get_span_block()
489 u32 info, strip_offset, span, span_offset; in get_row_from_strip() local
505 for (span = 0, span_offset = 0; span < raid->spanDepth; span++) in get_row_from_strip()
506 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. in get_row_from_strip()
509 span_set->strip_offset[span]) in get_row_from_strip()
547 u32 span, info; in get_strip_from_row() local
558 for (span = 0; span < raid->spanDepth; span++) in get_strip_from_row()
559 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. in get_strip_from_row()
562 spanBlock[span].block_span_info.quad[info]; in get_strip_from_row()
573 strip += span_set->strip_offset[span]; in get_strip_from_row()
607 u32 info, strip_offset, span, span_offset, retval; in get_arm_from_strip() local
621 for (span = 0, span_offset = 0; span < raid->spanDepth; span++) in get_arm_from_strip()
622 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. in get_arm_from_strip()
625 span_set->strip_offset[span]) in get_arm_from_strip()
627 span_set->strip_offset[span]; in get_arm_from_strip()
644 static u8 get_arm(struct megasas_instance *instance, u32 ld, u8 span, u64 stripe, in get_arm() argument
655 arm = mega_mod64(stripe, SPAN_ROW_SIZE(map, ld, span)); in get_arm()
672 * This routine calculates the arm, span and block for the specified stripe and
683 * span - Span number
693 u8 physArm, span; in mr_spanset_get_phy_params() local
703 /*Get row and span from io_info for Uneven Span IO.*/ in mr_spanset_get_phy_params()
705 span = io_info->start_span; in mr_spanset_get_phy_params()
712 rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span)); in mr_spanset_get_phy_params()
713 armQ = SPAN_ROW_SIZE(map, ld, span) - 1 - rowMod; in mr_spanset_get_phy_params()
715 if (arm >= SPAN_ROW_SIZE(map, ld, span)) in mr_spanset_get_phy_params()
716 arm -= SPAN_ROW_SIZE(map, ld, span); in mr_spanset_get_phy_params()
720 physArm = get_arm(instance, ld, span, stripRow, map); in mr_spanset_get_phy_params()
724 arRef = MR_LdSpanArrayGet(ld, span, map); in mr_spanset_get_phy_params()
755 *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk); in mr_spanset_get_phy_params()
758 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; in mr_spanset_get_phy_params()
760 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; in mr_spanset_get_phy_params()
763 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; in mr_spanset_get_phy_params()
773 * This routine calculates the arm, span and block for the specified stripe and
784 * span - Span number
794 u8 physArm, span; in MR_GetPhyParams() local
828 span = 0; in MR_GetPhyParams()
831 span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map); in MR_GetPhyParams()
832 if (span == SPAN_INVALID) in MR_GetPhyParams()
836 /* Get the array on which this span is present */ in MR_GetPhyParams()
837 arRef = MR_LdSpanArrayGet(ld, span, map); in MR_GetPhyParams()
871 *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk); in MR_GetPhyParams()
874 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; in MR_GetPhyParams()
876 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; in MR_GetPhyParams()
879 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; in MR_GetPhyParams()
905 u8 span, dataArms, arms, dataArm, logArm; in mr_get_phy_params_r56_rmw() local
923 span = 0; in mr_get_phy_params_r56_rmw()
925 span = (u8)MR_GetSpanBlock(ld, rowNum, pdBlock, map); in mr_get_phy_params_r56_rmw()
926 if (span == SPAN_INVALID) in mr_get_phy_params_r56_rmw()
950 pRAID_Context->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | dataArm; in mr_get_phy_params_r56_rmw()
1002 * if rowDataSize @RAID map and spanRowDataSize @SPAN INFO are zero in MR_BuildRaidContext()
1012 "raid->rowDataSize is 0, but has SPAN[0]" in MR_BuildRaidContext()
1103 * For Even span region lock optimization. in MR_BuildRaidContext()
1124 * For Uneven span region lock optimization. in MR_BuildRaidContext()
1219 u8 span, count; in mr_update_span_set() local
1235 for (span = 0; span < raid->spanDepth; span++) { in mr_update_span_set()
1236 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. in mr_update_span_set()
1242 spanBlock[span].block_span_info. in mr_update_span_set()
1311 if (span == raid->spanDepth) in mr_update_span_set()
1353 u8 bestArm, pd0, pd1, span, arm; in megasas_get_best_arm_pd() local
1359 span = ((io_info->span_arm & RAID_CTX_SPANARM_SPAN_MASK) in megasas_get_best_arm_pd()
1366 SPAN_ROW_SIZE(drv_map, ld, span) : raid->rowSize; in megasas_get_best_arm_pd()
1368 arRef = MR_LdSpanArrayGet(ld, span, drv_map); in megasas_get_best_arm_pd()
1398 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm; in megasas_get_best_arm_pd()