Lines Matching +full:aac +full:- +full:mode
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Adaptec AAC series RAID controller driver
9 * Copyright (c) 2000-2010 Adaptec, Inc.
10 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
11 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com)
33 /*------------------------------------------------------------------------------
35 *----------------------------------------------------------------------------*/
60 /* Bit definitions in IOA->Host Interrupt Register */
89 # define AAC_DRIVER_BRANCH "-custom"
94 #define AAC_NUM_IO_FIB (1024 - AAC_NUM_MGT_FIB)
105 /* Thor: 5 phys. buses: #0: empty, 1-4: 256 targets each */
132 u32 addr_lo; /* Lower 32-bits of SGL element address */
133 u32 addr_hi; /* Upper 32-bits of SGL element address */
190 * [1:0] DIR - 0=No data, 0x1 = IN, 0x2 = OUT
191 * [2] TYPE - 0=PCI, 1=DDR
192 * [3] CRYPTO_ENABLE - 0=Crypto disabled, 1=Crypto enabled
199 /* Lower 32-bits of tweak value for crypto enabled IOs */
215 /* Lower 32-bits of reserved error data target location on the host */
218 /* Upper 32-bits of reserved error data target location on the host */
224 /* Upper 32-bits of tweak value for crypto enabled IOs */
231 * AAC_MAX_NATIVE_SIZE-FW_ERROR_BUFFER_SIZE
257 /* Lower 32-bits of reserved error data target location on the host */
259 /* Upper 32-bits of reserved error data target location on the host */
267 /* 0 - reset specified device, 1 - reset all devices */
274 /* Lower 32-bits of reserved error data target location on the host */
276 /* Upper 32-bits of reserved error data target location on the host */
289 u8 datapres; /* [1:0] - data present, [7:2] - reserved */
300 u8 cmd_bytes[AAC_MAX_NATIVE_SIZE-FW_ERROR_BUFFER_SIZE];
315 u8 list_length[4]; /* LUN list length (N-7, big endian) */
423 #define aac_logical_to_phys(x) ((x)?(x)-1:0)
429 #define AAC_CHARDEV_UNREGISTERED (-1)
430 #define AAC_CHARDEV_NEEDS_REINIT (-2)
449 #define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/id/lun */
458 __le32 addr; /* 32-bit address. */
463 u32 addr; /* 32-bit address. */
468 __le32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
473 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
504 * 32-bit addressing.
546 * unsigned Month :4; // 1 - 12
547 * unsigned Day :6; // 1 - 32
548 * unsigned Hour :6; // 0 - 23
549 * unsigned Minute :6; // 0 - 60
550 * unsigned Second :6; // 0 - 60
716 u8 data[512-sizeof(struct aac_fibhdr)]; // Command specific data
1021 __le32 reserved[10]; /* 00h-27h | Reserved */
1023 u8 reserved1[3]; /* 29h-2bh | Reserved */
1025 __le32 reserved2[26]; /* 30h-97h | Reserved */
1044 __le32 reserved3[12]; /* d0h-ffh | reserved */
1045 __le32 LUT[64]; /* 100h-1ffh | Lookup Table Entries */
1075 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */
1082 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
1083 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
1084 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
1085 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
1139 struct rx_mu_registers MUnit; /* 1300h - 1347h */
1140 __le32 reserved1[2]; /* 1348h - 134ch */
1144 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
1145 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
1146 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR))
1147 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR))
1157 struct rkt_mu_registers MUnit; /* 1300h - 1347h */
1158 __le32 reserved1[1006]; /* 1348h - 22fch */
1159 struct rkt_inbound IndexRegs; /* 2300h - */
1162 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR))
1163 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
1164 #define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR))
1165 #define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR))
1176 __le32 IOAR[2]; /* 18h | IOA->host interrupt register */
1197 struct src_mu_registers MUnit; /* 00h - cbh */
1200 __le32 reserved1[130786]; /* d8h - 7fc5fh */
1204 __le32 reserved1[970]; /* d8h - fffh */
1210 #define src_readb(AEP, CSR) readb(&((AEP)->regs.src.bar0->CSR))
1211 #define src_readl(AEP, CSR) readl(&((AEP)->regs.src.bar0->CSR))
1213 &((AEP)->regs.src.bar0->CSR))
1215 &((AEP)->regs.src.bar0->CSR))
1218 &((AEP)->regs.src.bar0->CSR))
1231 ulong jiffies; // used for cleanup - dmb changed to ulong
1243 * SCSI-2 Standard.
1249 u8 EOM:1; /* End Of Medium - reserved for random access devices */
1250 u8 filemark:1; /* Filemark - reserved for random access devices */
1252 u8 information[4]; /* for direct-access devices, contains the unsigned
1260 u8 FRUC; /* Field Replaceable Unit Code - not used */
1264 u8 BPV:1; /* bit pointer valid (BPV): 1- indicates that
1268 u8 CD:1; /* command data bit: 1- illegal parameter in CDB.
1269 * 0- illegal parameter in data.
1338 s8 reset_state; /* 0 - no reset, 1..x - */
1411 u8 max_rrc_drives; /* max. number of ITP-RRC drives/pool */
1420 u16 supported_cntlr_mode; /* identify supported controller mode */
1609 *This lock will protect the two 32-bit
1667 u32 max_msix; /* max. MSI-X vectors */
1668 u32 vector_cap; /* MSI-X vector capab.*/
1669 int msi_enabled; /* MSI/MSI-X enabled */
1683 (dev)->a_ops.adapter_interrupt(dev)
1686 (dev)->a_ops.adapter_notify(dev, event)
1689 (dev)->a_ops.adapter_disable_int(dev)
1692 (dev)->a_ops.adapter_enable_int(dev)
1695 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
1698 ((dev)->a_ops.adapter_restart(dev, bled, reset_type))
1701 ((dev)->a_ops.adapter_start(dev))
1704 (dev)->a_ops.adapter_ioremap(dev, size)
1707 ((fib)->dev)->a_ops.adapter_deliver(fib)
1710 dev->a_ops.adapter_bounds(dev,cmd,lba)
1713 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count)
1716 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua)
1719 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd)
1722 (dev)->a_ops.adapter_comm(dev, comm)
1944 __le32 count; /* sizeof(((struct aac_synchronize_reply *)NULL)->data) */
1981 __le32 count; /* sizeof(((struct aac_pause_reply *)NULL)->data) */
2047 * SRB Functions - set in aac_srb->function
2068 * SRB SCSI Status - set in aac_srb->scsi_status
2103 * Object-Server / Volume-Manager Dispatch Classes
2131 #define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */
2137 * of a content manager. Raw mode might be
2176 __le32 count; /* sizeof(((struct aac_get_config_status_resp *)NULL)->data) */
2199 * Accept the configuration as-is
2252 #define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */
2277 __le32 count; /* sizeof(((struct aac_get_name_resp *)NULL)->data) */
2350 * Ugly - non Linux like ioctl coding for back compat.
2404 * Statistical counters in debug mode
2544 #define DoorBellSyncCmdAvailable (1<<0) /* Host -> Adapter */
2545 #define DoorBellPrintfDone (1<<5) /* Host -> Adapter */
2546 #define DoorBellAdapterNormCmdReady (1<<1) /* Adapter -> Host */
2547 #define DoorBellAdapterNormRespReady (1<<2) /* Adapter -> Host */
2548 #define DoorBellAdapterNormCmdNotFull (1<<3) /* Adapter -> Host */
2549 #define DoorBellAdapterNormRespNotFull (1<<4) /* Adapter -> Host */
2550 #define DoorBellPrintfReady (1<<5) /* Adapter -> Host */
2551 #define DoorBellAifPending (1<<6) /* Adapter -> Host */
2554 #define PmDoorBellResponseSent (1<<1) /* Adapter -> Host */
2635 return pci_channel_offline(dev->pdev) || dev->handle_pci_error; in aac_pci_offline()
2641 return -1; in aac_adapter_check_health()
2643 return (dev)->a_ops.adapter_check_health(dev); in aac_adapter_check_health()
2651 schedule_delayed_work(&dev->safw_rescan_work, AAC_RESCAN_DELAY); in aac_schedule_safw_scan_worker()
2656 schedule_delayed_work(&dev->src_reinit_aif_worker, AAC_RESCAN_DELAY); in aac_schedule_src_reinit_aif_worker()
2664 wait_event(dev->scsi_host_ptr->host_wait, in aac_safw_rescan_worker()
2665 !scsi_host_in_recovery(dev->scsi_host_ptr)); in aac_safw_rescan_worker()
2672 cancel_delayed_work_sync(&dev->safw_rescan_work); in aac_cancel_rescan_worker()
2673 cancel_delayed_work_sync(&dev->src_reinit_aif_worker); in aac_cancel_rescan_worker()
2703 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data)
2705 void aac_src_access_devreg(struct aac_dev *dev, int mode);
2712 #define shost_to_class(shost) &shost->shost_dev
2741 void aac_reinit_aif(struct aac_dev *aac, unsigned int index);
2745 u16 device = dev->pdev->device; in aac_is_src()
2756 return (dev->adapter_info.options & AAC_OPT_NEW_COMM_64); in aac_supports_2T()