Lines Matching +full:modem +full:- +full:remoteproc
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm self-authenticating modem subsystem remoteproc driver
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
13 #include <linux/dma-mapping.h>
25 #include <linux/remoteproc.h>
233 if (rc != -EPROBE_DEFER) in q6v5_regulator_init()
257 dev_err(qproc->dev, in q6v5_regulator_enable()
268 dev_err(qproc->dev, in q6v5_regulator_enable()
276 dev_err(qproc->dev, "Regulator enable failed\n"); in q6v5_regulator_enable()
283 for (; i >= 0; i--) { in q6v5_regulator_enable()
328 for (i--; i >= 0; i--) in q6v5_clk_enable()
359 for (i--; i >= 0; i--) { in q6v5_pds_enable()
385 if (!qproc->need_mem_protection) in q6v5_xfer_mem_ownership()
412 if (request_firmware_direct(&dp_fw, "msadp", qproc->dev)) in q6v5_debug_policy_load()
415 if (SZ_1M + dp_fw->size <= qproc->mba_size) { in q6v5_debug_policy_load()
416 memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size); in q6v5_debug_policy_load()
417 qproc->dp_size = dp_fw->size; in q6v5_debug_policy_load()
425 struct q6v5 *qproc = rproc->priv; in q6v5_load()
428 if (fw->size > qproc->mba_size || fw->size > SZ_1M) { in q6v5_load()
429 dev_err(qproc->dev, "MBA firmware load failed\n"); in q6v5_load()
430 return -EINVAL; in q6v5_load()
433 memcpy(qproc->mba_region, fw->data, fw->size); in q6v5_load()
443 if (qproc->has_alt_reset) { in q6v5_reset_assert()
444 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
445 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_assert()
446 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
447 } else if (qproc->has_spare_reg) { in q6v5_reset_assert()
449 * When the AXI pipeline is being reset with the Q6 modem partly in q6v5_reset_assert()
457 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
458 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
460 reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
461 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
462 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
464 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_assert()
466 ret = reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
476 if (qproc->has_alt_reset) { in q6v5_reset_deassert()
477 reset_control_assert(qproc->pdc_reset); in q6v5_reset_deassert()
478 writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
479 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
480 writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
481 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_deassert()
482 } else if (qproc->has_spare_reg) { in q6v5_reset_deassert()
483 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
485 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_deassert()
498 val = readl(qproc->rmb_base + RMB_PBL_STATUS_REG); in q6v5_rmb_pbl_wait()
503 return -ETIMEDOUT; in q6v5_rmb_pbl_wait()
519 val = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_rmb_mba_wait()
529 return -ETIMEDOUT; in q6v5_rmb_mba_wait()
539 struct rproc *rproc = qproc->rproc; in q6v5_dump_mba_logs()
542 if (!qproc->has_mba_logs) in q6v5_dump_mba_logs()
545 if (q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, qproc->mba_phys, in q6v5_dump_mba_logs()
546 qproc->mba_size)) in q6v5_dump_mba_logs()
553 memcpy(data, qproc->mba_region, MBA_LOG_SIZE); in q6v5_dump_mba_logs()
554 dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL); in q6v5_dump_mba_logs()
563 if (qproc->version == MSS_SDM845) { in q6v5proc_reset()
564 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
566 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
568 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
572 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
573 return -ETIMEDOUT; in q6v5proc_reset()
576 /* De-assert QDSP6 stop core */ in q6v5proc_reset()
577 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
579 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
581 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
584 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
585 /* Reset the modem so that boot FSM is in reset state */ in q6v5proc_reset()
591 } else if (qproc->version == MSS_SC7180) { in q6v5proc_reset()
592 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
594 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
596 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
600 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
601 return -ETIMEDOUT; in q6v5proc_reset()
605 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
607 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
609 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
613 dev_err(qproc->dev, "QDSP6SS XO clock timed out\n"); in q6v5proc_reset()
614 return -ETIMEDOUT; in q6v5proc_reset()
617 /* Configure Q6 core CBCR to auto-enable after reset sequence */ in q6v5proc_reset()
618 val = readl(qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
620 writel(val, qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
622 /* De-assert the Q6 stop core signal */ in q6v5proc_reset()
623 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
628 /* Trigger the boot FSM to start the Q6 out-of-reset sequence */ in q6v5proc_reset()
629 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
632 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
635 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
636 /* Reset the modem so that boot FSM is in reset state */ in q6v5proc_reset()
641 } else if (qproc->version == MSS_MSM8996 || in q6v5proc_reset()
642 qproc->version == MSS_MSM8998) { in q6v5proc_reset()
647 qproc->reg_base + QDSP6SS_STRAP_ACC); in q6v5proc_reset()
650 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
652 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
655 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
657 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
660 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
664 dev_err(qproc->dev, in q6v5proc_reset()
669 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
671 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
672 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
677 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
680 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
682 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
686 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
689 if (qproc->version == MSS_MSM8996) { in q6v5proc_reset()
697 val = readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
698 for (; i >= 0; i--) { in q6v5proc_reset()
700 writel(val, qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
706 val |= readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
710 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
712 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
715 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
717 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
720 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
722 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
723 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
729 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
732 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
734 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
736 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
738 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
742 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
745 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
747 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
750 val = readl(qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
752 writel(val, qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
755 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
757 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
762 if (ret == -ETIMEDOUT) { in q6v5proc_reset()
763 dev_err(qproc->dev, "PBL boot timed out\n"); in q6v5proc_reset()
765 dev_err(qproc->dev, "PBL returned unexpected status %d\n", ret); in q6v5proc_reset()
766 ret = -EINVAL; in q6v5proc_reset()
795 dev_err(qproc->dev, "port failed halt\n"); in q6v5proc_halt_axi_port()
816 ptr = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); in q6v5_mpss_init_image()
819 dev_err(qproc->dev, "failed to allocate mdt buffer\n"); in q6v5_mpss_init_image()
820 return -ENOMEM; in q6v5_mpss_init_image()
825 /* Hypervisor mapping to access metadata by modem */ in q6v5_mpss_init_image()
830 dev_err(qproc->dev, in q6v5_mpss_init_image()
832 ret = -EAGAIN; in q6v5_mpss_init_image()
836 writel(phys, qproc->rmb_base + RMB_PMI_META_DATA_REG); in q6v5_mpss_init_image()
837 writel(RMB_CMD_META_DATA_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_init_image()
840 if (ret == -ETIMEDOUT) in q6v5_mpss_init_image()
841 dev_err(qproc->dev, "MPSS header authentication timed out\n"); in q6v5_mpss_init_image()
843 dev_err(qproc->dev, "MPSS header authentication failed: %d\n", ret); in q6v5_mpss_init_image()
845 /* Metadata authentication done, remove modem access */ in q6v5_mpss_init_image()
849 dev_warn(qproc->dev, in q6v5_mpss_init_image()
853 dma_free_attrs(qproc->dev, size, ptr, phys, dma_attrs); in q6v5_mpss_init_image()
861 if (phdr->p_type != PT_LOAD) in q6v5_phdr_valid()
864 if ((phdr->p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH) in q6v5_phdr_valid()
867 if (!phdr->p_memsz) in q6v5_phdr_valid()
879 qcom_q6v5_prepare(&qproc->q6v5); in q6v5_mba_load()
881 ret = q6v5_pds_enable(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_mba_load()
883 dev_err(qproc->dev, "failed to enable active power domains\n"); in q6v5_mba_load()
887 ret = q6v5_pds_enable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
889 dev_err(qproc->dev, "failed to enable proxy power domains\n"); in q6v5_mba_load()
893 ret = q6v5_regulator_enable(qproc, qproc->proxy_regs, in q6v5_mba_load()
894 qproc->proxy_reg_count); in q6v5_mba_load()
896 dev_err(qproc->dev, "failed to enable proxy supplies\n"); in q6v5_mba_load()
900 ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
901 qproc->proxy_clk_count); in q6v5_mba_load()
903 dev_err(qproc->dev, "failed to enable proxy clocks\n"); in q6v5_mba_load()
907 ret = q6v5_regulator_enable(qproc, qproc->active_regs, in q6v5_mba_load()
908 qproc->active_reg_count); in q6v5_mba_load()
910 dev_err(qproc->dev, "failed to enable supplies\n"); in q6v5_mba_load()
914 ret = q6v5_clk_enable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
915 qproc->reset_clk_count); in q6v5_mba_load()
917 dev_err(qproc->dev, "failed to enable reset clocks\n"); in q6v5_mba_load()
923 dev_err(qproc->dev, "failed to deassert mss restart\n"); in q6v5_mba_load()
927 ret = q6v5_clk_enable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
928 qproc->active_clk_count); in q6v5_mba_load()
930 dev_err(qproc->dev, "failed to enable clocks\n"); in q6v5_mba_load()
938 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mba_load()
939 qproc->mpss_phys, qproc->mpss_size); in q6v5_mba_load()
941 dev_err(qproc->dev, "assigning Q6 access to mpss memory failed: %d\n", ret); in q6v5_mba_load()
946 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, false, true, in q6v5_mba_load()
947 qproc->mba_phys, qproc->mba_size); in q6v5_mba_load()
949 dev_err(qproc->dev, in q6v5_mba_load()
954 writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG); in q6v5_mba_load()
955 if (qproc->dp_size) { in q6v5_mba_load()
956 writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mba_load()
957 writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mba_load()
965 if (ret == -ETIMEDOUT) { in q6v5_mba_load()
966 dev_err(qproc->dev, "MBA boot timed out\n"); in q6v5_mba_load()
970 dev_err(qproc->dev, "MBA returned unexpected status %d\n", ret); in q6v5_mba_load()
971 ret = -EINVAL; in q6v5_mba_load()
975 qproc->dump_mba_loaded = true; in q6v5_mba_load()
979 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_load()
980 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_load()
981 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_load()
984 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_mba_load()
985 false, qproc->mba_phys, in q6v5_mba_load()
986 qproc->mba_size); in q6v5_mba_load()
988 dev_err(qproc->dev, in q6v5_mba_load()
995 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
996 qproc->active_clk_count); in q6v5_mba_load()
1000 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
1001 qproc->reset_clk_count); in q6v5_mba_load()
1003 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_load()
1004 qproc->active_reg_count); in q6v5_mba_load()
1006 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
1007 qproc->proxy_clk_count); in q6v5_mba_load()
1009 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_load()
1010 qproc->proxy_reg_count); in q6v5_mba_load()
1012 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
1014 q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_mba_load()
1016 qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_load()
1026 qproc->dump_mba_loaded = false; in q6v5_mba_reclaim()
1027 qproc->dp_size = 0; in q6v5_mba_reclaim()
1029 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_reclaim()
1030 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_reclaim()
1031 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_reclaim()
1032 if (qproc->version == MSS_MSM8996) { in q6v5_mba_reclaim()
1036 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1039 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1044 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_reclaim()
1045 qproc->reset_clk_count); in q6v5_mba_reclaim()
1046 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_reclaim()
1047 qproc->active_clk_count); in q6v5_mba_reclaim()
1048 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_reclaim()
1049 qproc->active_reg_count); in q6v5_mba_reclaim()
1050 q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_mba_reclaim()
1055 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, in q6v5_mba_reclaim()
1056 qproc->mba_phys, in q6v5_mba_reclaim()
1057 qproc->mba_size); in q6v5_mba_reclaim()
1060 ret = qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_reclaim()
1062 q6v5_pds_disable(qproc, qproc->proxy_pds, in q6v5_mba_reclaim()
1063 qproc->proxy_pd_count); in q6v5_mba_reclaim()
1064 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_reclaim()
1065 qproc->proxy_clk_count); in q6v5_mba_reclaim()
1066 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_reclaim()
1067 qproc->proxy_reg_count); in q6v5_mba_reclaim()
1073 struct q6v5 *qproc = rproc->priv; in q6v5_reload_mba()
1077 ret = request_firmware(&fw, rproc->firmware, qproc->dev); in q6v5_reload_mba()
1109 fw_name_len = strlen(qproc->hexagon_mdt_image); in q6v5_mpss_load()
1111 return -EINVAL; in q6v5_mpss_load()
1113 fw_name = kstrdup(qproc->hexagon_mdt_image, GFP_KERNEL); in q6v5_mpss_load()
1115 return -ENOMEM; in q6v5_mpss_load()
1117 ret = request_firmware(&fw, fw_name, qproc->dev); in q6v5_mpss_load()
1119 dev_err(qproc->dev, "unable to load %s\n", fw_name); in q6v5_mpss_load()
1124 writel(0, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1130 ehdr = (struct elf32_hdr *)fw->data; in q6v5_mpss_load()
1133 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1139 if (phdr->p_flags & QCOM_MDT_RELOCATABLE) in q6v5_mpss_load()
1142 if (phdr->p_paddr < min_addr) in q6v5_mpss_load()
1143 min_addr = phdr->p_paddr; in q6v5_mpss_load()
1145 if (phdr->p_paddr + phdr->p_memsz > max_addr) in q6v5_mpss_load()
1146 max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K); in q6v5_mpss_load()
1150 * In case of a modem subsystem restart on secure devices, the modem in q6v5_mpss_load()
1153 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, false, in q6v5_mpss_load()
1154 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1157 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, true, in q6v5_mpss_load()
1158 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1160 dev_err(qproc->dev, in q6v5_mpss_load()
1162 ret = -EAGAIN; in q6v5_mpss_load()
1166 mpss_reloc = relocate ? min_addr : qproc->mpss_phys; in q6v5_mpss_load()
1167 qproc->mpss_reloc = mpss_reloc; in q6v5_mpss_load()
1169 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1175 offset = phdr->p_paddr - mpss_reloc; in q6v5_mpss_load()
1176 if (offset < 0 || offset + phdr->p_memsz > qproc->mpss_size) { in q6v5_mpss_load()
1177 dev_err(qproc->dev, "segment outside memory range\n"); in q6v5_mpss_load()
1178 ret = -EINVAL; in q6v5_mpss_load()
1182 ptr = ioremap_wc(qproc->mpss_phys + offset, phdr->p_memsz); in q6v5_mpss_load()
1184 dev_err(qproc->dev, in q6v5_mpss_load()
1185 "unable to map memory region: %pa+%zx-%x\n", in q6v5_mpss_load()
1186 &qproc->mpss_phys, offset, phdr->p_memsz); in q6v5_mpss_load()
1190 if (phdr->p_filesz && phdr->p_offset < fw->size) { in q6v5_mpss_load()
1191 /* Firmware is large enough to be non-split */ in q6v5_mpss_load()
1192 if (phdr->p_offset + phdr->p_filesz > fw->size) { in q6v5_mpss_load()
1193 dev_err(qproc->dev, in q6v5_mpss_load()
1196 ret = -EINVAL; in q6v5_mpss_load()
1201 memcpy(ptr, fw->data + phdr->p_offset, phdr->p_filesz); in q6v5_mpss_load()
1202 } else if (phdr->p_filesz) { in q6v5_mpss_load()
1204 sprintf(fw_name + fw_name_len - 3, "b%02d", i); in q6v5_mpss_load()
1205 ret = request_firmware_into_buf(&seg_fw, fw_name, qproc->dev, in q6v5_mpss_load()
1206 ptr, phdr->p_filesz); in q6v5_mpss_load()
1208 dev_err(qproc->dev, "failed to load %s\n", fw_name); in q6v5_mpss_load()
1216 if (phdr->p_memsz > phdr->p_filesz) { in q6v5_mpss_load()
1217 memset(ptr + phdr->p_filesz, 0, in q6v5_mpss_load()
1218 phdr->p_memsz - phdr->p_filesz); in q6v5_mpss_load()
1221 size += phdr->p_memsz; in q6v5_mpss_load()
1223 code_length = readl(qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1225 boot_addr = relocate ? qproc->mpss_phys : min_addr; in q6v5_mpss_load()
1226 writel(boot_addr, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mpss_load()
1227 writel(RMB_CMD_LOAD_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_load()
1229 writel(size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1231 ret = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_mpss_load()
1233 dev_err(qproc->dev, "MPSS authentication failed: %d\n", in q6v5_mpss_load()
1239 /* Transfer ownership of modem ddr region to q6 */ in q6v5_mpss_load()
1240 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mpss_load()
1241 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1243 dev_err(qproc->dev, in q6v5_mpss_load()
1245 ret = -EAGAIN; in q6v5_mpss_load()
1250 if (ret == -ETIMEDOUT) in q6v5_mpss_load()
1251 dev_err(qproc->dev, "MPSS authentication timed out\n"); in q6v5_mpss_load()
1253 dev_err(qproc->dev, "MPSS authentication failed: %d\n", ret); in q6v5_mpss_load()
1255 qcom_pil_info_store("modem", qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1270 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_dump_segment()
1271 int offset = segment->da - qproc->mpss_reloc; in qcom_q6v5_dump_segment()
1275 if (!qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1279 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1281 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1282 qproc->mpss_size); in qcom_q6v5_dump_segment()
1287 ptr = ioremap_wc(qproc->mpss_phys + offset + cp_offset, size); in qcom_q6v5_dump_segment()
1296 qproc->current_dump_size += size; in qcom_q6v5_dump_segment()
1299 if (qproc->current_dump_size == qproc->total_dump_size) { in qcom_q6v5_dump_segment()
1300 if (qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1302 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1304 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1305 qproc->mpss_size); in qcom_q6v5_dump_segment()
1313 struct q6v5 *qproc = (struct q6v5 *)rproc->priv; in q6v5_start()
1321 dev_info(qproc->dev, "MBA booted with%s debug policy, loading mpss\n", in q6v5_start()
1322 qproc->dp_size ? "" : "out"); in q6v5_start()
1328 ret = qcom_q6v5_wait_for_start(&qproc->q6v5, msecs_to_jiffies(5000)); in q6v5_start()
1329 if (ret == -ETIMEDOUT) { in q6v5_start()
1330 dev_err(qproc->dev, "start timed out\n"); in q6v5_start()
1334 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_start()
1335 false, qproc->mba_phys, in q6v5_start()
1336 qproc->mba_size); in q6v5_start()
1338 dev_err(qproc->dev, in q6v5_start()
1342 qproc->current_dump_size = 0; in q6v5_start()
1355 struct q6v5 *qproc = (struct q6v5 *)rproc->priv; in q6v5_stop()
1358 ret = qcom_q6v5_request_stop(&qproc->q6v5); in q6v5_stop()
1359 if (ret == -ETIMEDOUT) in q6v5_stop()
1360 dev_err(qproc->dev, "timed out on wait\n"); in q6v5_stop()
1374 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_register_dump_segments()
1378 ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev); in qcom_q6v5_register_dump_segments()
1380 dev_err(qproc->dev, "unable to load %s\n", in qcom_q6v5_register_dump_segments()
1381 qproc->hexagon_mdt_image); in qcom_q6v5_register_dump_segments()
1387 ehdr = (struct elf32_hdr *)fw->data; in qcom_q6v5_register_dump_segments()
1389 qproc->total_dump_size = 0; in qcom_q6v5_register_dump_segments()
1391 for (i = 0; i < ehdr->e_phnum; i++) { in qcom_q6v5_register_dump_segments()
1397 ret = rproc_coredump_add_custom_segment(rproc, phdr->p_paddr, in qcom_q6v5_register_dump_segments()
1398 phdr->p_memsz, in qcom_q6v5_register_dump_segments()
1404 qproc->total_dump_size += phdr->p_memsz; in qcom_q6v5_register_dump_segments()
1422 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in qcom_msa_handover()
1423 qproc->proxy_clk_count); in qcom_msa_handover()
1424 q6v5_regulator_disable(qproc, qproc->proxy_regs, in qcom_msa_handover()
1425 qproc->proxy_reg_count); in qcom_msa_handover()
1426 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in qcom_msa_handover()
1436 qproc->reg_base = devm_ioremap_resource(&pdev->dev, res); in q6v5_init_mem()
1437 if (IS_ERR(qproc->reg_base)) in q6v5_init_mem()
1438 return PTR_ERR(qproc->reg_base); in q6v5_init_mem()
1441 qproc->rmb_base = devm_ioremap_resource(&pdev->dev, res); in q6v5_init_mem()
1442 if (IS_ERR(qproc->rmb_base)) in q6v5_init_mem()
1443 return PTR_ERR(qproc->rmb_base); in q6v5_init_mem()
1445 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1446 "qcom,halt-regs", 3, 0, &args); in q6v5_init_mem()
1448 dev_err(&pdev->dev, "failed to parse qcom,halt-regs\n"); in q6v5_init_mem()
1449 return -EINVAL; in q6v5_init_mem()
1452 qproc->halt_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1454 if (IS_ERR(qproc->halt_map)) in q6v5_init_mem()
1455 return PTR_ERR(qproc->halt_map); in q6v5_init_mem()
1457 qproc->halt_q6 = args.args[0]; in q6v5_init_mem()
1458 qproc->halt_modem = args.args[1]; in q6v5_init_mem()
1459 qproc->halt_nc = args.args[2]; in q6v5_init_mem()
1461 if (qproc->has_spare_reg) { in q6v5_init_mem()
1462 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1463 "qcom,spare-regs", in q6v5_init_mem()
1466 dev_err(&pdev->dev, "failed to parse spare-regs\n"); in q6v5_init_mem()
1467 return -EINVAL; in q6v5_init_mem()
1470 qproc->conn_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1472 if (IS_ERR(qproc->conn_map)) in q6v5_init_mem()
1473 return PTR_ERR(qproc->conn_map); in q6v5_init_mem()
1475 qproc->conn_box = args.args[0]; in q6v5_init_mem()
1494 if (rc != -EPROBE_DEFER) in q6v5_init_clocks()
1520 ret = PTR_ERR(devs[i]) ? : -ENODATA; in q6v5_pds_attach()
1528 for (i--; i >= 0; i--) in q6v5_pds_attach()
1545 qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1547 if (IS_ERR(qproc->mss_restart)) { in q6v5_init_reset()
1548 dev_err(qproc->dev, "failed to acquire mss restart\n"); in q6v5_init_reset()
1549 return PTR_ERR(qproc->mss_restart); in q6v5_init_reset()
1552 if (qproc->has_alt_reset || qproc->has_spare_reg) { in q6v5_init_reset()
1553 qproc->pdc_reset = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1555 if (IS_ERR(qproc->pdc_reset)) { in q6v5_init_reset()
1556 dev_err(qproc->dev, "failed to acquire pdc reset\n"); in q6v5_init_reset()
1557 return PTR_ERR(qproc->pdc_reset); in q6v5_init_reset()
1572 * In the absence of mba/mpss sub-child, extract the mba and mpss in q6v5_alloc_memory_region()
1573 * reserved memory regions from device's memory-region property. in q6v5_alloc_memory_region()
1575 child = of_get_child_by_name(qproc->dev->of_node, "mba"); in q6v5_alloc_memory_region()
1577 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1578 "memory-region", 0); in q6v5_alloc_memory_region()
1580 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1584 dev_err(qproc->dev, "unable to resolve mba region\n"); in q6v5_alloc_memory_region()
1589 qproc->mba_phys = r.start; in q6v5_alloc_memory_region()
1590 qproc->mba_size = resource_size(&r); in q6v5_alloc_memory_region()
1591 qproc->mba_region = devm_ioremap_wc(qproc->dev, qproc->mba_phys, qproc->mba_size); in q6v5_alloc_memory_region()
1592 if (!qproc->mba_region) { in q6v5_alloc_memory_region()
1593 dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", in q6v5_alloc_memory_region()
1594 &r.start, qproc->mba_size); in q6v5_alloc_memory_region()
1595 return -EBUSY; in q6v5_alloc_memory_region()
1599 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1600 "memory-region", 1); in q6v5_alloc_memory_region()
1602 child = of_get_child_by_name(qproc->dev->of_node, "mpss"); in q6v5_alloc_memory_region()
1603 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1608 dev_err(qproc->dev, "unable to resolve mpss region\n"); in q6v5_alloc_memory_region()
1613 qproc->mpss_phys = qproc->mpss_reloc = r.start; in q6v5_alloc_memory_region()
1614 qproc->mpss_size = resource_size(&r); in q6v5_alloc_memory_region()
1627 desc = of_device_get_match_data(&pdev->dev); in q6v5_probe()
1629 return -EINVAL; in q6v5_probe()
1631 if (desc->need_mem_protection && !qcom_scm_is_available()) in q6v5_probe()
1632 return -EPROBE_DEFER; in q6v5_probe()
1634 mba_image = desc->hexagon_mba_image; in q6v5_probe()
1635 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
1637 if (ret < 0 && ret != -EINVAL) in q6v5_probe()
1640 rproc = rproc_alloc(&pdev->dev, pdev->name, &q6v5_ops, in q6v5_probe()
1643 dev_err(&pdev->dev, "failed to allocate rproc\n"); in q6v5_probe()
1644 return -ENOMEM; in q6v5_probe()
1647 rproc->auto_boot = false; in q6v5_probe()
1650 qproc = (struct q6v5 *)rproc->priv; in q6v5_probe()
1651 qproc->dev = &pdev->dev; in q6v5_probe()
1652 qproc->rproc = rproc; in q6v5_probe()
1653 qproc->hexagon_mdt_image = "modem.mdt"; in q6v5_probe()
1654 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
1655 1, &qproc->hexagon_mdt_image); in q6v5_probe()
1656 if (ret < 0 && ret != -EINVAL) in q6v5_probe()
1661 qproc->has_spare_reg = desc->has_spare_reg; in q6v5_probe()
1670 ret = q6v5_init_clocks(&pdev->dev, qproc->proxy_clks, in q6v5_probe()
1671 desc->proxy_clk_names); in q6v5_probe()
1673 dev_err(&pdev->dev, "Failed to get proxy clocks.\n"); in q6v5_probe()
1676 qproc->proxy_clk_count = ret; in q6v5_probe()
1678 ret = q6v5_init_clocks(&pdev->dev, qproc->reset_clks, in q6v5_probe()
1679 desc->reset_clk_names); in q6v5_probe()
1681 dev_err(&pdev->dev, "Failed to get reset clocks.\n"); in q6v5_probe()
1684 qproc->reset_clk_count = ret; in q6v5_probe()
1686 ret = q6v5_init_clocks(&pdev->dev, qproc->active_clks, in q6v5_probe()
1687 desc->active_clk_names); in q6v5_probe()
1689 dev_err(&pdev->dev, "Failed to get active clocks.\n"); in q6v5_probe()
1692 qproc->active_clk_count = ret; in q6v5_probe()
1694 ret = q6v5_regulator_init(&pdev->dev, qproc->proxy_regs, in q6v5_probe()
1695 desc->proxy_supply); in q6v5_probe()
1697 dev_err(&pdev->dev, "Failed to get proxy regulators.\n"); in q6v5_probe()
1700 qproc->proxy_reg_count = ret; in q6v5_probe()
1702 ret = q6v5_regulator_init(&pdev->dev, qproc->active_regs, in q6v5_probe()
1703 desc->active_supply); in q6v5_probe()
1705 dev_err(&pdev->dev, "Failed to get active regulators.\n"); in q6v5_probe()
1708 qproc->active_reg_count = ret; in q6v5_probe()
1710 ret = q6v5_pds_attach(&pdev->dev, qproc->active_pds, in q6v5_probe()
1711 desc->active_pd_names); in q6v5_probe()
1713 dev_err(&pdev->dev, "Failed to attach active power domains\n"); in q6v5_probe()
1716 qproc->active_pd_count = ret; in q6v5_probe()
1718 ret = q6v5_pds_attach(&pdev->dev, qproc->proxy_pds, in q6v5_probe()
1719 desc->proxy_pd_names); in q6v5_probe()
1721 dev_err(&pdev->dev, "Failed to init power domains\n"); in q6v5_probe()
1724 qproc->proxy_pd_count = ret; in q6v5_probe()
1726 qproc->has_alt_reset = desc->has_alt_reset; in q6v5_probe()
1731 qproc->version = desc->version; in q6v5_probe()
1732 qproc->need_mem_protection = desc->need_mem_protection; in q6v5_probe()
1733 qproc->has_mba_logs = desc->has_mba_logs; in q6v5_probe()
1735 ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, in q6v5_probe()
1740 qproc->mpss_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
1741 qproc->mba_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
1742 qcom_add_glink_subdev(rproc, &qproc->glink_subdev, "mpss"); in q6v5_probe()
1743 qcom_add_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
1744 qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss"); in q6v5_probe()
1745 qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12); in q6v5_probe()
1746 if (IS_ERR(qproc->sysmon)) { in q6v5_probe()
1747 ret = PTR_ERR(qproc->sysmon); in q6v5_probe()
1758 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_probe()
1760 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_probe()
1761 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
1762 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_probe()
1764 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_probe()
1766 q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_probe()
1776 struct rproc *rproc = qproc->rproc; in q6v5_remove()
1780 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_remove()
1781 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_remove()
1782 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_remove()
1783 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_remove()
1785 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_remove()
1786 q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_remove()
1999 { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss},
2000 { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss},
2001 { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss},
2002 { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss},
2003 { .compatible = "qcom,msm8998-mss-pil", .data = &msm8998_mss},
2004 { .compatible = "qcom,sc7180-mss-pil", .data = &sc7180_mss},
2005 { .compatible = "qcom,sdm845-mss-pil", .data = &sdm845_mss},
2014 .name = "qcom-q6v5-mss",
2020 MODULE_DESCRIPTION("Qualcomm Self-authenticating modem remoteproc driver");