Lines Matching +full:lbp +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0+
74 gpiod_set_value(priv->enable_gpio, 1); in rtmv20_lsw_enable()
79 /* HW re-enable, disable cache only and sync regcache here */ in rtmv20_lsw_enable()
80 regcache_cache_only(priv->regmap, false); in rtmv20_lsw_enable()
81 ret = regcache_sync(priv->regmap); in rtmv20_lsw_enable()
98 regcache_cache_only(priv->regmap, true); in rtmv20_lsw_disable()
99 regcache_mark_dirty(priv->regmap); in rtmv20_lsw_disable()
101 gpiod_set_value(priv->enable_gpio, 0); in rtmv20_lsw_disable()
109 .enable = rtmv20_lsw_enable,
133 ret = regmap_read(priv->regmap, RTMV20_REG_LDIRQ, &val); in rtmv20_irq_handler()
135 dev_err(priv->dev, "Failed to get irq flags\n"); in rtmv20_irq_handler()
140 regulator_notifier_call_chain(priv->rdev, REGULATOR_EVENT_OVER_TEMP, NULL); in rtmv20_irq_handler()
143 regulator_notifier_call_chain(priv->rdev, REGULATOR_EVENT_OVER_CURRENT, NULL); in rtmv20_irq_handler()
146 regulator_notifier_call_chain(priv->rdev, REGULATOR_EVENT_FAIL, NULL); in rtmv20_irq_handler()
155 return (retval - min) / step; in clamp_to_selector()
169 { "richtek,ld-pulse-delay-us", 0, 0, 100000, 100, RTMV20_REG_PULSEDELAY, in rtmv20_properties_init()
171 { "richtek,ld-pulse-width-us", 1200, 0, 10000, 1, RTMV20_REG_PULSEWIDTH, in rtmv20_properties_init()
173 { "richtek,fsin1-delay-us", 23000, 0, 100000, 100, RTMV20_REG_FSIN1CTRL1, in rtmv20_properties_init()
175 { "richtek,fsin1-width-us", 160, 40, 10000, 40, RTMV20_REG_FSIN1CTRL3, in rtmv20_properties_init()
177 { "richtek,fsin2-delay-us", 23000, 0, 100000, 100, RTMV20_REG_FSIN2CTRL1, in rtmv20_properties_init()
179 { "richtek,fsin2-width-us", 160, 40, 10000, 40, RTMV20_REG_FSIN2CTRL3, in rtmv20_properties_init()
181 { "richtek,es-pulse-width-us", 1200, 0, 10000, 1, RTMV20_REG_ESPULSEWIDTH, in rtmv20_properties_init()
183 { "richtek,es-ld-current-microamp", 3000000, 0, 6000000, 30000, in rtmv20_properties_init()
185 { "richtek,lbp-level-microvolt", 2700000, 2400000, 3700000, 100000, RTMV20_REG_LBP, in rtmv20_properties_init()
187 { "richtek,lbp-enable", 0, 0, 1, 1, RTMV20_REG_LBP, RTMV20_LBPEN_MASK }, in rtmv20_properties_init()
188 { "richtek,strobe-polarity-high", 1, 0, 1, 1, RTMV20_REG_LDCTRL2, in rtmv20_properties_init()
190 { "richtek,vsync-polarity-high", 1, 0, 1, 1, RTMV20_REG_LDCTRL2, in rtmv20_properties_init()
192 { "richtek,fsin-enable", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_FSINEN_MASK }, in rtmv20_properties_init()
193 { "richtek,fsin-output", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_FSINOUT_MASK }, in rtmv20_properties_init()
194 { "richtek,es-enable", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_ESEN_MASK }, in rtmv20_properties_init()
203 int shift = ffs(props[i].mask) - 1; in rtmv20_properties_init()
206 ret = device_property_read_u32(priv->dev, props[i].name, &temp); in rtmv20_properties_init()
210 temp = device_property_read_bool(priv->dev, props[i].name); in rtmv20_properties_init()
216 ret = regmap_raw_read(priv->regmap, props[i].addr, &bval16, sizeof(bval16)); in rtmv20_properties_init()
225 ret = regmap_raw_write(priv->regmap, props[i].addr, &bval16, in rtmv20_properties_init()
228 ret = regmap_update_bits(priv->regmap, props[i].addr, props[i].mask, in rtmv20_properties_init()
244 ret = regmap_read(priv->regmap, RTMV20_REG_DEVINFO, &val); in rtmv20_check_chip_exist()
249 return -ENODEV; in rtmv20_check_chip_exist()
290 priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); in rtmv20_probe()
292 return -ENOMEM; in rtmv20_probe()
294 priv->dev = &i2c->dev; in rtmv20_probe()
296 /* Before regmap register, configure HW enable to make I2C accessible */ in rtmv20_probe()
297 priv->enable_gpio = devm_gpiod_get(&i2c->dev, "enable", GPIOD_OUT_HIGH); in rtmv20_probe()
298 if (IS_ERR(priv->enable_gpio)) { in rtmv20_probe()
299 dev_err(&i2c->dev, "Failed to get enable gpio\n"); in rtmv20_probe()
300 return PTR_ERR(priv->enable_gpio); in rtmv20_probe()
306 priv->regmap = devm_regmap_init_i2c(i2c, &rtmv20_regmap_config); in rtmv20_probe()
307 if (IS_ERR(priv->regmap)) { in rtmv20_probe()
308 dev_err(&i2c->dev, "Failed to allocate register map\n"); in rtmv20_probe()
309 return PTR_ERR(priv->regmap); in rtmv20_probe()
314 dev_err(&i2c->dev, "Chip vendor info is not matched\n"); in rtmv20_probe()
320 dev_err(&i2c->dev, "Failed to init properties\n"); in rtmv20_probe()
328 regcache_cache_only(priv->regmap, true); in rtmv20_probe()
329 regcache_mark_dirty(priv->regmap); in rtmv20_probe()
330 gpiod_set_value(priv->enable_gpio, 0); in rtmv20_probe()
332 config.dev = &i2c->dev; in rtmv20_probe()
333 config.regmap = priv->regmap; in rtmv20_probe()
335 priv->rdev = devm_regulator_register(&i2c->dev, &rtmv20_lsw_desc, &config); in rtmv20_probe()
336 if (IS_ERR(priv->rdev)) { in rtmv20_probe()
337 dev_err(&i2c->dev, "Failed to register regulator\n"); in rtmv20_probe()
338 return PTR_ERR(priv->rdev); in rtmv20_probe()
342 ret = regmap_write(priv->regmap, RTMV20_REG_LDMASK, 0); in rtmv20_probe()
346 return devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, rtmv20_irq_handler, in rtmv20_probe()
347 IRQF_ONESHOT, dev_name(&i2c->dev), priv); in rtmv20_probe()
358 disable_irq(i2c->irq); in rtmv20_suspend()
360 enable_irq_wake(i2c->irq); in rtmv20_suspend()
369 /* Enable irq after I2C bus already resume */ in rtmv20_resume()
370 enable_irq(i2c->irq); in rtmv20_resume()
372 disable_irq_wake(i2c->irq); in rtmv20_resume()