123 	struct meson_pwm_channel *channel;  in meson_pwm_request()  local
127 	channel = pwm_get_chip_data(pwm);  in meson_pwm_request()
128 	if (channel)  in meson_pwm_request()
131 	channel = &meson->channels[pwm->hwpwm];  in meson_pwm_request()
133 	if (channel->clk_parent) {  in meson_pwm_request()
134 		err = clk_set_parent(channel->clk, channel->clk_parent);  in meson_pwm_request()
137 				__clk_get_name(channel->clk_parent),  in meson_pwm_request()
138 				__clk_get_name(channel->clk), err);  in meson_pwm_request()
143 	err = clk_prepare_enable(channel->clk);  in meson_pwm_request()
146 			__clk_get_name(channel->clk), err);  in meson_pwm_request()
150 	return pwm_set_chip_data(pwm, channel);  in meson_pwm_request()
155 	struct meson_pwm_channel *channel = pwm_get_chip_data(pwm);  in meson_pwm_free()  local
157 	if (channel)  in meson_pwm_free()
158 		clk_disable_unprepare(channel->clk);  in meson_pwm_free()
164 	struct meson_pwm_channel *channel = pwm_get_chip_data(pwm);  in meson_pwm_calc()  local
174 	fin_freq = clk_get_rate(channel->clk);  in meson_pwm_calc()
198 		channel->pre_div = pre_div;  in meson_pwm_calc()
199 		channel->hi = cnt;  in meson_pwm_calc()
200 		channel->lo = 0;  in meson_pwm_calc()
202 		channel->pre_div = pre_div;  in meson_pwm_calc()
203 		channel->hi = 0;  in meson_pwm_calc()
204 		channel->lo = cnt;  in meson_pwm_calc()
217 		channel->pre_div = pre_div;  in meson_pwm_calc()
218 		channel->hi = duty_cnt;  in meson_pwm_calc()
219 		channel->lo = cnt - duty_cnt;  in meson_pwm_calc()
227 	struct meson_pwm_channel *channel = pwm_get_chip_data(pwm);  in meson_pwm_enable()  local
238 	value |= channel->pre_div << channel_data->clk_div_shift;  in meson_pwm_enable()
242 	value = FIELD_PREP(PWM_HIGH_MASK, channel->hi) |  in meson_pwm_enable()
243 		FIELD_PREP(PWM_LOW_MASK, channel->lo);  in meson_pwm_enable()
270 	struct meson_pwm_channel *channel = pwm_get_chip_data(pwm);  in meson_pwm_apply()  local
291 			channel->pre_div = 0;  in meson_pwm_apply()
292 			channel->hi = ~0;  in meson_pwm_apply()
293 			channel->lo = 0;  in meson_pwm_apply()
314 	struct meson_pwm_channel *channel;  in meson_pwm_cnt_to_ns()  local
319 	channel = &meson->channels[pwm->hwpwm];  in meson_pwm_cnt_to_ns()
321 	fin_freq = clk_get_rate(channel->clk);  in meson_pwm_cnt_to_ns()
327 	return cnt * fin_ns * (channel->pre_div + 1);  in meson_pwm_cnt_to_ns()
335 	struct meson_pwm_channel *channel;  in meson_pwm_get_state()  local
341 	channel = &meson->channels[pwm->hwpwm];  in meson_pwm_get_state()
350 	channel->pre_div = FIELD_GET(MISC_CLK_DIV_MASK, tmp);  in meson_pwm_get_state()
354 	channel->lo = FIELD_GET(PWM_LOW_MASK, value);  in meson_pwm_get_state()
355 	channel->hi = FIELD_GET(PWM_HIGH_MASK, value);  in meson_pwm_get_state()
357 	if (channel->lo == 0) {  in meson_pwm_get_state()
358 		state->period = meson_pwm_cnt_to_ns(chip, pwm, channel->hi);  in meson_pwm_get_state()
360 	} else if (channel->lo >= channel->hi) {  in meson_pwm_get_state()
362 						    channel->lo + channel->hi);  in meson_pwm_get_state()
364 							channel->hi);  in meson_pwm_get_state()
501 		struct meson_pwm_channel *channel = &meson->channels[i];  in meson_pwm_init_channels()  local
511 		channel->mux.reg = meson->base + REG_MISC_AB;  in meson_pwm_init_channels()
512 		channel->mux.shift =  in meson_pwm_init_channels()
514 		channel->mux.mask = MISC_CLK_SEL_MASK;  in meson_pwm_init_channels()
515 		channel->mux.flags = 0;  in meson_pwm_init_channels()
516 		channel->mux.lock = &meson->lock;  in meson_pwm_init_channels()
517 		channel->mux.table = NULL;  in meson_pwm_init_channels()
518 		channel->mux.hw.init = &init;  in meson_pwm_init_channels()
520 		channel->clk = devm_clk_register(dev, &channel->mux.hw);  in meson_pwm_init_channels()
521 		if (IS_ERR(channel->clk)) {  in meson_pwm_init_channels()
522 			err = PTR_ERR(channel->clk);  in meson_pwm_init_channels()
529 		channel->clk_parent = devm_clk_get_optional(dev, name);  in meson_pwm_init_channels()
530 		if (IS_ERR(channel->clk_parent))  in meson_pwm_init_channels()
531 			return PTR_ERR(channel->clk_parent);  in meson_pwm_init_channels()