30  * @duty_cycle: cached duty cycle
61 static int cros_ec_pwm_set_duty(struct cros_ec_device *ec, u8 index, u16 duty)  in cros_ec_pwm_set_duty()  argument
77 	params->duty = duty;  in cros_ec_pwm_set_duty()
112 	return resp->duty;  in cros_ec_pwm_get_duty()
128 	 * EC doesn't separate the concept of duty cycle and enabled, but  in cros_ec_pwm_apply()
151 		dev_err(chip->dev, "error getting initial duty: %d\n", ret);  in cros_ec_pwm_get_state()
159 	 * Note that "disabled" and "duty cycle == 0" are treated the same. If  in cros_ec_pwm_get_state()
160 	 * the cached duty cycle is not zero, used the cached duty cycle. This  in cros_ec_pwm_get_state()
161 	 * ensures that the configured duty cycle is kept across a disable and  in cros_ec_pwm_get_state()
165 	 * will be 0 and the actual duty cycle read from the EC is used.  in cros_ec_pwm_get_state()
201  * of PWMs it supports directly, so we have to read the pwm duty cycle for