Lines Matching refs:TOP_REG5
21 #define TOP_REG5 0x14 macro
756 TOP_PIN(TSI3_CLK, TOP_REG5, 0, 3, 0x8c, 0,
763 TOP_PIN(TSI3_SYNC, TOP_REG5, 3, 3, 0x8c, 9,
770 TOP_PIN(TSI3_VALID, TOP_REG5, 6, 3, 0x8c, 18,
777 TOP_PIN(I2S1_WS, TOP_REG5, 9, 3, 0x90, 0,
784 TOP_PIN(I2S1_BCLK, TOP_REG5, 12, 3, 0x90, 9,
791 TOP_PIN(I2S1_MCLK, TOP_REG5, 15, 2, 0x90, 18,
796 TOP_PIN(I2S1_DIN0, TOP_REG5, 17, 2, 0x94, 0,
801 TOP_PIN(I2S1_DOUT0, TOP_REG5, 19, 2, 0x94, 9,
806 TOP_PIN(SPI3_CLK, TOP_REG5, 21, 3, 0x94, 18,
815 TOP_PIN(SPI3_CS, TOP_REG5, 24, 3, 0x98, 0,
824 TOP_PIN(SPI3_TXD, TOP_REG5, 27, 3, 0x98, 9,
833 TOP_PIN(NAND_LDO_MS18_SEL, TOP_REG5, 30, 1, 0xe4, 0,