Lines Matching +full:6 +full:- +full:bit

1 /* SPDX-License-Identifier: GPL-2.0-only */
44 	/* argument: Integer, range is HW-dependant */
46 	/* argument: Integer, range is HW-dependant */
48 	/* argument: Integer, range is HW-dependant */
50 	/* argument: Integer, range is HW-dependant */
52 	/* argument: Integer, range is HW-dependant */
72  * struct tegra_function - Tegra pinctrl mux function
84  * struct tegra_pingroup - Tegra pin group
93  * @mux_bit:		Mux register bit.
94  * @pupd_reg:		Pull-up/down register offset.
95  * @pupd_bank:		Pull-up/down register bank.
96  * @pupd_bit:		Pull-up/down register bit.
97  * @tri_reg:		Tri-state register offset.
98  * @tri_bank:		Tri-state register bank.
99  * @tri_bit:		Tri-state register bit.
100  * @einput_bit:		Enable-input register bit.
101  * @odrain_bit:		Open-drain register bit.
102  * @lock_bit:		Lock register bit.
103  * @ioreset_bit:	IO reset register bit.
104  * @rcv_sel_bit:	Receiver select bit.
109  * @hsm_bit:		High Speed Mode register bit.
110  * @sfsel_bit:		GPIO/SFIO selection register bit.
111  * @schmitt_bit:	Schmitt register bit.
112  * @lpmd_bit:		Low Power Mode register bit.
113  * @drvdn_bit:		Drive Down register bit.
115  * @drvup_bit:		Drive Up register bit.
117  * @slwr_bit:		Slew Rising register bit.
119  * @slwf_bit:		Slew Falling register bit.
121  * @drvtype_bit:	Drive type register bit.
124  * -1 in a *_reg field means that feature is unsupported for this group.
125  * *_bank and *_reg values are irrelevant when *_reg is -1.
126  * When *_reg is valid, *_bit may be -1 to indicate an unsupported feature.
131  * such as pull-up/down, tri-state, etc. Tegra's pin controller is complex;
148 	s32 mux_bit:6;
149 	s32 pupd_bit:6;
150 	s32 tri_bit:6;
151 	s32 einput_bit:6;
152 	s32 odrain_bit:6;
153 	s32 lock_bit:6;
154 	s32 ioreset_bit:6;
155 	s32 rcv_sel_bit:6;
156 	s32 hsm_bit:6;
157 	s32 sfsel_bit:6;
158 	s32 schmitt_bit:6;
159 	s32 lpmd_bit:6;
160 	s32 drvdn_bit:6;
161 	s32 drvup_bit:6;
162 	s32 slwr_bit:6;
163 	s32 slwf_bit:6;
164 	s32 drvtype_bit:6;
165 	s32 drvdn_width:6;
166 	s32 drvup_width:6;
167 	s32 slwr_width:6;
168 	s32 slwf_width:6;
173  * struct tegra_pinctrl_soc_data - Tegra pin controller driver configuration