Lines Matching refs:pctl

210 	struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);  in stm32_gpio_request()  local
214 range = pinctrl_find_gpio_range_from_pin_nolock(pctl->pctl_dev, pin); in stm32_gpio_request()
216 dev_err(pctl->dev, "pin %d not in range.\n", pin); in stm32_gpio_request()
356 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_irq_request_resources() local
365 dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n", in stm32_gpio_irq_request_resources()
416 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_domain_activate() local
424 spin_lock_irqsave(&pctl->irqmux_lock, flags); in stm32_gpio_domain_activate()
426 if (pctl->hwlock) { in stm32_gpio_domain_activate()
427 ret = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_gpio_domain_activate()
430 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_gpio_domain_activate()
435 if (pctl->irqmux_map & BIT(irq_data->hwirq)) { in stm32_gpio_domain_activate()
436 dev_err(pctl->dev, "irq line %ld already requested.\n", in stm32_gpio_domain_activate()
439 if (pctl->hwlock) in stm32_gpio_domain_activate()
440 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_gpio_domain_activate()
443 pctl->irqmux_map |= BIT(irq_data->hwirq); in stm32_gpio_domain_activate()
446 regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_ioport_nr); in stm32_gpio_domain_activate()
448 if (pctl->hwlock) in stm32_gpio_domain_activate()
449 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_gpio_domain_activate()
452 spin_unlock_irqrestore(&pctl->irqmux_lock, flags); in stm32_gpio_domain_activate()
460 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_domain_deactivate() local
463 spin_lock_irqsave(&pctl->irqmux_lock, flags); in stm32_gpio_domain_deactivate()
464 pctl->irqmux_map &= ~BIT(irq_data->hwirq); in stm32_gpio_domain_deactivate()
465 spin_unlock_irqrestore(&pctl->irqmux_lock, flags); in stm32_gpio_domain_deactivate()
499 stm32_pctrl_find_group_by_pin(struct stm32_pinctrl *pctl, u32 pin) in stm32_pctrl_find_group_by_pin() argument
503 for (i = 0; i < pctl->ngroups; i++) { in stm32_pctrl_find_group_by_pin()
504 struct stm32_pinctrl_group *grp = pctl->groups + i; in stm32_pctrl_find_group_by_pin()
513 static bool stm32_pctrl_is_function_valid(struct stm32_pinctrl *pctl, in stm32_pctrl_is_function_valid() argument
518 for (i = 0; i < pctl->npins; i++) { in stm32_pctrl_is_function_valid()
519 const struct stm32_desc_pin *pin = pctl->pins + i; in stm32_pctrl_is_function_valid()
537 static int stm32_pctrl_dt_node_to_map_func(struct stm32_pinctrl *pctl, in stm32_pctrl_dt_node_to_map_func() argument
548 if (!stm32_pctrl_is_function_valid(pctl, pin, fnum)) { in stm32_pctrl_dt_node_to_map_func()
549 dev_err(pctl->dev, "invalid function %d on pin %d .\n", in stm32_pctrl_dt_node_to_map_func()
566 struct stm32_pinctrl *pctl; in stm32_pctrl_dt_subnode_to_map() local
576 pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_dt_subnode_to_map()
580 dev_err(pctl->dev, "missing pins property in node %pOFn .\n", in stm32_pctrl_dt_subnode_to_map()
622 if (!stm32_pctrl_is_function_valid(pctl, pin, func)) { in stm32_pctrl_dt_subnode_to_map()
623 dev_err(pctl->dev, "invalid function.\n"); in stm32_pctrl_dt_subnode_to_map()
628 grp = stm32_pctrl_find_group_by_pin(pctl, pin); in stm32_pctrl_dt_subnode_to_map()
630 dev_err(pctl->dev, "unable to match pin %d to group\n", in stm32_pctrl_dt_subnode_to_map()
636 err = stm32_pctrl_dt_node_to_map_func(pctl, pin, func, grp, map, in stm32_pctrl_dt_subnode_to_map()
683 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_groups_count() local
685 return pctl->ngroups; in stm32_pctrl_get_groups_count()
691 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_group_name() local
693 return pctl->groups[group].name; in stm32_pctrl_get_group_name()
701 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_group_pins() local
703 *pins = (unsigned *)&pctl->groups[group].pin; in stm32_pctrl_get_group_pins()
736 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pmx_get_func_groups() local
738 *groups = pctl->grp_names; in stm32_pmx_get_func_groups()
739 *num_groups = pctl->ngroups; in stm32_pmx_get_func_groups()
747 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pmx_set_mode() local
757 if (pctl->hwlock) { in stm32_pmx_set_mode()
758 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pmx_set_mode()
761 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pmx_set_mode()
776 if (pctl->hwlock) in stm32_pmx_set_mode()
777 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pmx_set_mode()
816 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pmx_set_mux() local
817 struct stm32_pinctrl_group *g = pctl->groups + group; in stm32_pmx_set_mux()
823 ret = stm32_pctrl_is_function_valid(pctl, g->pin, function); in stm32_pmx_set_mux()
825 dev_err(pctl->dev, "invalid function %d on group %d .\n", in stm32_pmx_set_mux()
832 dev_err(pctl->dev, "No gpio range defined.\n"); in stm32_pmx_set_mux()
869 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_driving() local
877 if (pctl->hwlock) { in stm32_pconf_set_driving()
878 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_driving()
881 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_driving()
891 if (pctl->hwlock) in stm32_pconf_set_driving()
892 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_driving()
924 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_speed() local
932 if (pctl->hwlock) { in stm32_pconf_set_speed()
933 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_speed()
936 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_speed()
946 if (pctl->hwlock) in stm32_pconf_set_speed()
947 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_speed()
979 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_bias() local
987 if (pctl->hwlock) { in stm32_pconf_set_bias()
988 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_bias()
991 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_bias()
1001 if (pctl->hwlock) in stm32_pconf_set_bias()
1002 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_bias()
1057 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_parse_conf() local
1064 dev_err(pctl->dev, "No gpio range defined.\n"); in stm32_pconf_parse_conf()
1105 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_group_get() local
1107 *config = pctl->groups[group].config; in stm32_pconf_group_get()
1115 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_group_set() local
1116 struct stm32_pinctrl_group *g = &pctl->groups[group]; in stm32_pconf_group_set()
1222 static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, in stm32_gpiolib_register_bank() argument
1225 struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks]; in stm32_gpiolib_register_bank()
1229 struct device *dev = pctl->dev; in stm32_gpiolib_register_bank()
1258 bank_nr = pctl->nbanks; in stm32_gpiolib_register_bank()
1266 pinctrl_add_gpio_range(pctl->pctl_dev, in stm32_gpiolib_register_bank()
1267 &pctl->banks[bank_nr].range); in stm32_gpiolib_register_bank()
1285 bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, in stm32_gpiolib_register_bank()
1323 struct stm32_pinctrl *pctl) in stm32_pctrl_dt_setup_irq() argument
1331 pctl->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in stm32_pctrl_dt_setup_irq()
1332 if (IS_ERR(pctl->regmap)) in stm32_pctrl_dt_setup_irq()
1333 return PTR_ERR(pctl->regmap); in stm32_pctrl_dt_setup_irq()
1335 rm = pctl->regmap; in stm32_pctrl_dt_setup_irq()
1357 pctl->irqmux[i] = devm_regmap_field_alloc(dev, rm, mux); in stm32_pctrl_dt_setup_irq()
1358 if (IS_ERR(pctl->irqmux[i])) in stm32_pctrl_dt_setup_irq()
1359 return PTR_ERR(pctl->irqmux[i]); in stm32_pctrl_dt_setup_irq()
1367 struct stm32_pinctrl *pctl = platform_get_drvdata(pdev); in stm32_pctrl_build_state() local
1370 pctl->ngroups = pctl->npins; in stm32_pctrl_build_state()
1373 pctl->groups = devm_kcalloc(&pdev->dev, pctl->ngroups, in stm32_pctrl_build_state()
1374 sizeof(*pctl->groups), GFP_KERNEL); in stm32_pctrl_build_state()
1375 if (!pctl->groups) in stm32_pctrl_build_state()
1379 pctl->grp_names = devm_kcalloc(&pdev->dev, pctl->ngroups, in stm32_pctrl_build_state()
1380 sizeof(*pctl->grp_names), GFP_KERNEL); in stm32_pctrl_build_state()
1381 if (!pctl->grp_names) in stm32_pctrl_build_state()
1384 for (i = 0; i < pctl->npins; i++) { in stm32_pctrl_build_state()
1385 const struct stm32_desc_pin *pin = pctl->pins + i; in stm32_pctrl_build_state()
1386 struct stm32_pinctrl_group *group = pctl->groups + i; in stm32_pctrl_build_state()
1390 pctl->grp_names[i] = pin->pin.name; in stm32_pctrl_build_state()
1396 static int stm32_pctrl_create_pins_tab(struct stm32_pinctrl *pctl, in stm32_pctrl_create_pins_tab() argument
1402 for (i = 0; i < pctl->match_data->npins; i++) { in stm32_pctrl_create_pins_tab()
1403 p = pctl->match_data->pins + i; in stm32_pctrl_create_pins_tab()
1404 if (pctl->pkg && !(pctl->pkg & p->pkg)) in stm32_pctrl_create_pins_tab()
1412 pctl->npins = nb_pins_available; in stm32_pctrl_create_pins_tab()
1418 struct stm32_pinctrl *pctl) in stm32_pctl_get_package() argument
1420 if (of_property_read_u32(np, "st,package", &pctl->pkg)) { in stm32_pctl_get_package()
1421 pctl->pkg = 0; in stm32_pctl_get_package()
1422 dev_warn(pctl->dev, "No package detected, use default one\n"); in stm32_pctl_get_package()
1424 dev_dbg(pctl->dev, "package detected: %x\n", pctl->pkg); in stm32_pctl_get_package()
1434 struct stm32_pinctrl *pctl; in stm32_pctl_probe() local
1450 pctl = devm_kzalloc(dev, sizeof(*pctl), GFP_KERNEL); in stm32_pctl_probe()
1451 if (!pctl) in stm32_pctl_probe()
1454 platform_set_drvdata(pdev, pctl); in stm32_pctl_probe()
1457 pctl->domain = stm32_pctrl_get_irq_domain(np); in stm32_pctl_probe()
1458 if (IS_ERR(pctl->domain)) in stm32_pctl_probe()
1459 return PTR_ERR(pctl->domain); in stm32_pctl_probe()
1467 pctl->hwlock = hwspin_lock_request_specific(hwlock_id); in stm32_pctl_probe()
1470 spin_lock_init(&pctl->irqmux_lock); in stm32_pctl_probe()
1472 pctl->dev = dev; in stm32_pctl_probe()
1473 pctl->match_data = match->data; in stm32_pctl_probe()
1476 stm32_pctl_get_package(np, pctl); in stm32_pctl_probe()
1478 pctl->pins = devm_kcalloc(pctl->dev, pctl->match_data->npins, in stm32_pctl_probe()
1479 sizeof(*pctl->pins), GFP_KERNEL); in stm32_pctl_probe()
1480 if (!pctl->pins) in stm32_pctl_probe()
1483 ret = stm32_pctrl_create_pins_tab(pctl, pctl->pins); in stm32_pctl_probe()
1493 if (pctl->domain) { in stm32_pctl_probe()
1494 ret = stm32_pctrl_dt_setup_irq(pdev, pctl); in stm32_pctl_probe()
1499 pins = devm_kcalloc(&pdev->dev, pctl->npins, sizeof(*pins), in stm32_pctl_probe()
1504 for (i = 0; i < pctl->npins; i++) in stm32_pctl_probe()
1505 pins[i] = pctl->pins[i].pin; in stm32_pctl_probe()
1507 pctl->pctl_desc.name = dev_name(&pdev->dev); in stm32_pctl_probe()
1508 pctl->pctl_desc.owner = THIS_MODULE; in stm32_pctl_probe()
1509 pctl->pctl_desc.pins = pins; in stm32_pctl_probe()
1510 pctl->pctl_desc.npins = pctl->npins; in stm32_pctl_probe()
1511 pctl->pctl_desc.link_consumers = true; in stm32_pctl_probe()
1512 pctl->pctl_desc.confops = &stm32_pconf_ops; in stm32_pctl_probe()
1513 pctl->pctl_desc.pctlops = &stm32_pctrl_ops; in stm32_pctl_probe()
1514 pctl->pctl_desc.pmxops = &stm32_pmx_ops; in stm32_pctl_probe()
1515 pctl->dev = &pdev->dev; in stm32_pctl_probe()
1517 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->pctl_desc, in stm32_pctl_probe()
1518 pctl); in stm32_pctl_probe()
1520 if (IS_ERR(pctl->pctl_dev)) { in stm32_pctl_probe()
1522 return PTR_ERR(pctl->pctl_dev); in stm32_pctl_probe()
1533 pctl->banks = devm_kcalloc(dev, banks, sizeof(*pctl->banks), in stm32_pctl_probe()
1535 if (!pctl->banks) in stm32_pctl_probe()
1540 struct stm32_gpio_bank *bank = &pctl->banks[i]; in stm32_pctl_probe()
1562 ret = stm32_gpiolib_register_bank(pctl, child); in stm32_pctl_probe()
1568 pctl->nbanks++; in stm32_pctl_probe()
1578 struct stm32_pinctrl *pctl, u32 pin) in stm32_pinctrl_restore_gpio_regs() argument
1580 const struct pin_desc *desc = pin_desc_get(pctl->pctl_dev, pin); in stm32_pinctrl_restore_gpio_regs()
1587 range = pinctrl_find_gpio_range_from_pin(pctl->pctl_dev, pin); in stm32_pinctrl_restore_gpio_regs()
1632 regmap_field_write(pctl->irqmux[offset], bank->bank_ioport_nr); in stm32_pinctrl_restore_gpio_regs()
1639 struct stm32_pinctrl *pctl = dev_get_drvdata(dev); in stm32_pinctrl_resume() local
1640 struct stm32_pinctrl_group *g = pctl->groups; in stm32_pinctrl_resume()
1643 for (i = g->pin; i < g->pin + pctl->ngroups; i++) in stm32_pinctrl_resume()
1644 stm32_pinctrl_restore_gpio_regs(pctl, i); in stm32_pinctrl_resume()