Lines Matching +full:controller +full:- +full:specific

1 /* SPDX-License-Identifier: GPL-2.0+ */
3  * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
25  * enum pincfg_type - possible pin configuration types supported.
46  * packed together into a 16-bits. The upper 8-bits represent the configuration
47  * type and the lower 8-bits hold the value of the configuration type.
57  * enum eint_type - possible external interrupt types.
63  * Samsung GPIO controller groups all the available pins into banks. The pins
77 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
108  * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
110  * @pctl_offset: starting offset of the pin-bank registers.
111  * @pctl_res_idx: index of base address for pin-bank registers.
116  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
132  * struct samsung_pin_bank: represent a controller pin-bank.
134  * @pctl_base: base address of the pin-bank registers
135  * @pctl_offset: starting offset of the pin-bank registers.
137  * @eint_base: base address of the pin-bank EINT registers.
141  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
144  * @soc_priv: per-bank private data for SoC-specific code.
146  * @drvdata: link to controller driver data
180  * struct samsung_retention_data: runtime pin-bank retention control data.
186  * @enable: platform specific callback to enter retention mode.
187  * @disable: platform specific callback to exit retention mode.
200  * struct samsung_retention_data: represent a pin-bank retention control data.
205  * @init: platform specific callback to initialize retention control.
217  * struct samsung_pin_ctrl: represent a pin controller.
218  * @pin_banks: list of pin banks included in this controller.
222  * @eint_gpio_init: platform specific callback to setup the external gpio
223  *	interrupts for the controller.
224  * @eint_wkup_init: platform specific callback to setup the external wakeup
225  *	interrupts for the controller.
226  * @suspend: platform specific suspend callback, executed during pin controller
228  * @resume: platform specific resume callback, executed during pin controller
249  * @virt_base: register base address of the controller; this will be equal
250  *             to each bank samsung_pin_bank->pctl_base and used on legacy
253  * @dev: device instance representing the controller.
254  * @irq: interrpt number used by the controller to notify gpio interrupts.
255  * @ctrl: pin controller instance managed by the driver.
256  * @pctl: pin controller descriptor registered with the pinctrl subsystem.
263  * @nr_pins: number of pins supported by the controller.
265  * @suspend: platform specific suspend callback, executed during pin controller
267  * @resume: platform specific resume callback, executed during pin controller
296  * struct samsung_pinctrl_of_match_data: OF match device specific configuration data.
297  * @ctrl: array of pin controller data.
332 /* list of all exported SoC specific data */