6  * This is a group-only pin controller.
13 #include <linux/pinctrl/machine.h>
14 #include <linux/pinctrl/pinctrl.h>
15 #include <linux/pinctrl/pinmux.h>
16 #include <linux/pinctrl/pinconf.h>
17 #include <linux/pinctrl/pinconf-generic.h>
22 #include "pinctrl-utils.h"
24 #define DRIVER_NAME "pinctrl-gemini"
27  * struct gemini_pin_conf - information about configuring a pin
39  * struct gemini_pmx - state holder for the gemini pin controller
62  * struct gemini_pin_group - describes a Gemini pin group
65  *	from the driver-local pin enumeration space
83 /* Some straight-forward control registers */
96  * - For the bits named *_ENABLE, once you DISABLE something, it simply cannot
99  * - For the bits named *_DISABLE, once you enable something, it cannot be
267 	PINCTRL_PIN(111, "G4 AVCCK 0"),
610 /* Parallel (NOR) flash pins, D[0-15], A[16-25], CE0, CE1, RB, WE, OE, ALE */
618  * The parallel flash can be set up in a 26-bit address bus mode exposing
619  * A[0-15] (A[15] takes the place of ALE), but it has the
638 /* The GPIO0B (1-4) pins overlap with TVC and ICE */
641 /* The GPIO0C (5-7) pins overlap with ICE */
647 /* The GPIO0E (8,11-15) pins overlap with LPC, UART modem pins, SSP */
668 /* The GPIO0L (26-29) pins overlap with parallel flash */
674 /* The GPIO1A (0-4) pins that overlap with IDE and parallel flash */
677 /* The GPIO1B (5-10, 27) pins overlap with just IDE */
682 /* The GPIO1C (11-26) pins overlap with IDE, parallel flash and NAND flash */
688 /* The GPIO1D (28-31) pins overlap with LCD and TVC */
691 /* The GPIO2A (0-3) pins overlap with GMII GMAC1 and extended parallel flash */
694 /* The GPIO2B (4-7) pins overlap with GMII GMAC1, extended parallel flash and LCD */
697 /* The GPIO2C (8-31) pins overlap with PCI */
1145 	PINCTRL_PIN(123, "G4 AVCCK S"),
1559 /* Parallel (NOR) flash pins, D[0-15], A[16-25], CE0, CE1, RB, WE, OE, ALE */
1567  * The parallel flash can be set up in a 26-bit address bus mode exposing
1568  * A[0-15] (A[15] takes the place of ALE), but it has the
1584 /* The GPIO0A (0-4) pins overlap with TVC and extended parallel flash */
1587 /* The GPIO0B (5-7) pins overlap with ICE */
1590 /* The GPIO0C (8,11-15) pins overlap with LPC, UART and SSP */
1602 /* The GPIO0G (19,20,26-29) pins overlap with parallel flash */
1620 /* The GPIO1A (0-4) pins that overlap with IDE and parallel flash */
1623 /* The GPIO1B (5-10,27) pins overlap with just IDE */
1626 /* The GPIO1C (11-26) pins overlap with IDE, parallel flash and NAND flash */
1632 /* The GPIO1D (28-31) pins overlap with TVC */
1635 /* The GPIO2A (0-3) pins overlap with GMII GMAC1 and extended parallel flash */
1638 /* The GPIO2B (4-7) pins overlap with GMII GMAC1, extended parallel flash and LCD */
1641 /* The GPIO2C (8-31) pins overlap with PCI */
1960 	if (pmx->is_3512)  in gemini_get_groups_count()
1962 	if (pmx->is_3516)  in gemini_get_groups_count()
1972 	if (pmx->is_3512)  in gemini_get_group_name()
1974 	if (pmx->is_3516)  in gemini_get_group_name()
1987 	if (pmx->flash_pin &&  in gemini_get_group_pins()
1988 	    pmx->is_3512 &&  in gemini_get_group_pins()
1994 	if (pmx->flash_pin &&  in gemini_get_group_pins()
1995 	    pmx->is_3516 &&  in gemini_get_group_pins()
2001 	if (pmx->is_3512) {  in gemini_get_group_pins()
2005 	if (pmx->is_3516) {  in gemini_get_group_pins()
2028  * struct gemini_pmx_func - describes Gemini pinmux functions
2201 	if (pmx->is_3512)  in gemini_pmx_set_mux()
2203 	else if (pmx->is_3516)  in gemini_pmx_set_mux()
2206 		dev_err(pmx->dev, "invalid SoC type\n");  in gemini_pmx_set_mux()
2207 		return -ENODEV;  in gemini_pmx_set_mux()
2210 	dev_dbg(pmx->dev,  in gemini_pmx_set_mux()
2212 		func->name, grp->name);  in gemini_pmx_set_mux()
2214 	regmap_read(pmx->map, GLOBAL_MISC_CTRL, &before);  in gemini_pmx_set_mux()
2215 	regmap_update_bits(pmx->map, GLOBAL_MISC_CTRL,  in gemini_pmx_set_mux()
2216 			   grp->mask | grp->value,  in gemini_pmx_set_mux()
2217 			   grp->value);  in gemini_pmx_set_mux()
2218 	regmap_read(pmx->map, GLOBAL_MISC_CTRL, &after);  in gemini_pmx_set_mux()
2223 	expected = before &= ~grp->mask;  in gemini_pmx_set_mux()
2224 	expected |= grp->value;  in gemini_pmx_set_mux()
2228 	tmp = grp->mask;  in gemini_pmx_set_mux()
2234 			dev_err(pmx->dev,  in gemini_pmx_set_mux()
2239 			dev_err(pmx->dev,  in gemini_pmx_set_mux()
2243 			dev_dbg(pmx->dev,  in gemini_pmx_set_mux()
2250 	tmp = grp->value;  in gemini_pmx_set_mux()
2256 			dev_err(pmx->dev,  in gemini_pmx_set_mux()
2261 			dev_err(pmx->dev,  in gemini_pmx_set_mux()
2265 			dev_dbg(pmx->dev,  in gemini_pmx_set_mux()
2369 	for (i = 0; i < pmx->nconfs; i++) {  in gemini_get_pin_conf()
2370 		retconf = &pmx->confs[i];  in gemini_get_pin_conf()
2371 		if (retconf->pin == pin)  in gemini_get_pin_conf()
2389 			return -ENOTSUPP;  in gemini_pinconf_get()
2390 		regmap_read(pmx->map, conf->reg, &val);  in gemini_pinconf_get()
2391 		val &= conf->mask;  in gemini_pinconf_get()
2392 		val >>= (ffs(conf->mask) - 1);  in gemini_pinconf_get()
2396 		return -ENOTSUPP;  in gemini_pinconf_get()
2419 				return -EINVAL;  in gemini_pinconf_set()
2422 				dev_err(pmx->dev,  in gemini_pinconf_set()
2424 				return -ENOTSUPP;  in gemini_pinconf_set()
2426 			arg <<= (ffs(conf->mask) - 1);  in gemini_pinconf_set()
2427 			dev_dbg(pmx->dev,  in gemini_pinconf_set()
2429 				pin, conf->mask, arg);  in gemini_pinconf_set()
2430 			regmap_update_bits(pmx->map, conf->reg, conf->mask, arg);  in gemini_pinconf_set()
2433 			dev_err(pmx->dev, "Invalid config param %04x\n", param);  in gemini_pinconf_set()
2434 			return -ENOTSUPP;  in gemini_pinconf_set()
2453 	if (pmx->is_3512)  in gemini_pinconf_group_set()
2455 	if (pmx->is_3516)  in gemini_pinconf_group_set()
2459 	if (!grp->driving_mask) {  in gemini_pinconf_group_set()
2460 		dev_err(pmx->dev, "pin config group \"%s\" does "  in gemini_pinconf_group_set()
2462 			grp->name);  in gemini_pinconf_group_set()
2463 		return -EINVAL;  in gemini_pinconf_group_set()
2486 				dev_err(pmx->dev,  in gemini_pinconf_group_set()
2489 				return -ENOTSUPP;  in gemini_pinconf_group_set()
2491 			val <<= (ffs(grp->driving_mask) - 1);  in gemini_pinconf_group_set()
2492 			regmap_update_bits(pmx->map, GLOBAL_IODRIVE,  in gemini_pinconf_group_set()
2493 					   grp->driving_mask,  in gemini_pinconf_group_set()
2495 			dev_dbg(pmx->dev,  in gemini_pinconf_group_set()
2497 				grp->name, arg, grp->driving_mask, val);  in gemini_pinconf_group_set()
2500 			dev_err(pmx->dev, "invalid config param %04x\n", param);  in gemini_pinconf_group_set()
2501 			return -ENOTSUPP;  in gemini_pinconf_group_set()
2527 	struct device *dev = &pdev->dev;  in gemini_pmx_probe()
2535 	pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);  in gemini_pmx_probe()
2537 		return -ENOMEM;  in gemini_pmx_probe()
2539 	pmx->dev = &pdev->dev;  in gemini_pmx_probe()
2540 	parent = dev->parent;  in gemini_pmx_probe()
2543 		return -ENODEV;  in gemini_pmx_probe()
2545 	map = syscon_node_to_regmap(parent->of_node);  in gemini_pmx_probe()
2550 	pmx->map = map;  in gemini_pmx_probe()
2561 		pmx->is_3512 = true;  in gemini_pmx_probe()
2562 		pmx->confs = gemini_confs_3512;  in gemini_pmx_probe()
2563 		pmx->nconfs = ARRAY_SIZE(gemini_confs_3512);  in gemini_pmx_probe()
2568 		pmx->is_3516 = true;  in gemini_pmx_probe()
2569 		pmx->confs = gemini_confs_3516;  in gemini_pmx_probe()
2570 		pmx->nconfs = ARRAY_SIZE(gemini_confs_3516);  in gemini_pmx_probe()
2576 		return -ENODEV;  in gemini_pmx_probe()
2594 	pmx->flash_pin = !!(val & GLOBAL_STATUS_FLPIN);  in gemini_pmx_probe()
2595 	dev_info(dev, "flash pin is %s\n", pmx->flash_pin ? "set" : "not set");  in gemini_pmx_probe()
2597 	pmx->pctl = devm_pinctrl_register(dev, &gemini_pmx_desc, pmx);  in gemini_pmx_probe()
2598 	if (IS_ERR(pmx->pctl)) {  in gemini_pmx_probe()
2600 		return PTR_ERR(pmx->pctl);  in gemini_pmx_probe()
2609 	{ .compatible = "cortina,gemini-pinctrl" },