3  * phy-ti-pipe3 - PIPE3 PHY driver.
12 #include <linux/phy/phy.h>
19 #include <linux/phy/omap_control_phy.h>
299 static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)  in ti_pipe3_get_dpll_params()  argument
302 	struct pipe3_dpll_map *dpll_map = phy->dpll_map;  in ti_pipe3_get_dpll_params()
304 	rate = clk_get_rate(phy->sys_clk);  in ti_pipe3_get_dpll_params()
311 	dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate);  in ti_pipe3_get_dpll_params()
316 static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy);
317 static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy);
319 static int ti_pipe3_power_off(struct phy *x)  in ti_pipe3_power_off()
322 	struct ti_pipe3 *phy = phy_get_drvdata(x);  in ti_pipe3_power_off()  local
324 	if (!phy->phy_power_syscon) {  in ti_pipe3_power_off()
325 		omap_control_phy_power(phy->control_dev, 0);  in ti_pipe3_power_off()
329 	ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,  in ti_pipe3_power_off()
334 static void ti_pipe3_calibrate(struct ti_pipe3 *phy);
336 static int ti_pipe3_power_on(struct phy *x)  in ti_pipe3_power_on()
341 	struct ti_pipe3 *phy = phy_get_drvdata(x);  in ti_pipe3_power_on()  local
344 	if (!phy->phy_power_syscon) {  in ti_pipe3_power_on()
345 		omap_control_phy_power(phy->control_dev, 1);  in ti_pipe3_power_on()
349 	rate = clk_get_rate(phy->sys_clk);  in ti_pipe3_power_on()
351 		dev_err(phy->dev, "Invalid clock rate\n");  in ti_pipe3_power_on()
357 	regmap_update_bits(phy->phy_power_syscon, phy->power_reg,  in ti_pipe3_power_on()
364 	if (phy->mode == PIPE3_MODE_SATA || phy->mode == PIPE3_MODE_USBSS) {  in ti_pipe3_power_on()
371 	regmap_update_bits(phy->phy_power_syscon, phy->power_reg,  in ti_pipe3_power_on()
376 		regmap_update_bits(phy->phy_power_syscon, phy->power_reg,  in ti_pipe3_power_on()
380 	if (phy->mode == PIPE3_MODE_PCIE)  in ti_pipe3_power_on()
381 		ti_pipe3_calibrate(phy);  in ti_pipe3_power_on()
386 static int ti_pipe3_dpll_wait_lock(struct ti_pipe3 *phy)  in ti_pipe3_dpll_wait_lock()  argument
394 		val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);  in ti_pipe3_dpll_wait_lock()
399 	dev_err(phy->dev, "DPLL failed to lock\n");  in ti_pipe3_dpll_wait_lock()
403 static int ti_pipe3_dpll_program(struct ti_pipe3 *phy)  in ti_pipe3_dpll_program()  argument
408 	dpll_params = ti_pipe3_get_dpll_params(phy);  in ti_pipe3_dpll_program()
412 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);  in ti_pipe3_dpll_program()
415 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);  in ti_pipe3_dpll_program()
417 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);  in ti_pipe3_dpll_program()
420 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);  in ti_pipe3_dpll_program()
422 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);  in ti_pipe3_dpll_program()
425 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);  in ti_pipe3_dpll_program()
427 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION4);  in ti_pipe3_dpll_program()
430 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION4, val);  in ti_pipe3_dpll_program()
432 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION3);  in ti_pipe3_dpll_program()
435 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val);  in ti_pipe3_dpll_program()
437 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);  in ti_pipe3_dpll_program()
439 	return ti_pipe3_dpll_wait_lock(phy);  in ti_pipe3_dpll_program()
442 static void ti_pipe3_calibrate(struct ti_pipe3 *phy)  in ti_pipe3_calibrate()  argument
445 	struct pipe3_settings *s = &phy->settings;  in ti_pipe3_calibrate()
447 	val = ti_pipe3_readl(phy->phy_rx, PIPE3_PHY_RX_ANA_PROGRAMMABILITY);  in ti_pipe3_calibrate()
450 	ti_pipe3_writel(phy->phy_rx, PIPE3_PHY_RX_ANA_PROGRAMMABILITY, val);  in ti_pipe3_calibrate()
452 	val = ti_pipe3_readl(phy->phy_rx, PIPE3_PHY_RX_DIGITAL_MODES);  in ti_pipe3_calibrate()
465 	ti_pipe3_writel(phy->phy_rx, PIPE3_PHY_RX_DIGITAL_MODES, val);  in ti_pipe3_calibrate()
467 	val = ti_pipe3_readl(phy->phy_rx, PIPE3_PHY_RX_TRIM);  in ti_pipe3_calibrate()
470 	ti_pipe3_writel(phy->phy_rx, PIPE3_PHY_RX_TRIM, val);  in ti_pipe3_calibrate()
472 	val = ti_pipe3_readl(phy->phy_rx, PIPE3_PHY_RX_DLL);  in ti_pipe3_calibrate()
475 	ti_pipe3_writel(phy->phy_rx, PIPE3_PHY_RX_DLL, val);  in ti_pipe3_calibrate()
477 	val = ti_pipe3_readl(phy->phy_rx, PIPE3_PHY_RX_EQUALIZER);  in ti_pipe3_calibrate()
485 	ti_pipe3_writel(phy->phy_rx, PIPE3_PHY_RX_EQUALIZER, val);  in ti_pipe3_calibrate()
487 	if (phy->mode == PIPE3_MODE_SATA) {  in ti_pipe3_calibrate()
488 		val = ti_pipe3_readl(phy->phy_rx,  in ti_pipe3_calibrate()
491 		ti_pipe3_writel(phy->phy_rx, SATA_PHY_RX_IO_AND_A2D_OVERRIDES,  in ti_pipe3_calibrate()
496 static int ti_pipe3_init(struct phy *x)  in ti_pipe3_init()
498 	struct ti_pipe3 *phy = phy_get_drvdata(x);  in ti_pipe3_init()  local
502 	ti_pipe3_enable_clocks(phy);  in ti_pipe3_init()
504 	 * Set pcie_pcs register to 0x96 for proper functioning of phy  in ti_pipe3_init()
508 	if (phy->mode == PIPE3_MODE_PCIE) {  in ti_pipe3_init()
509 		if (!phy->pcs_syscon) {  in ti_pipe3_init()
510 			omap_control_pcie_pcs(phy->control_dev, 0x96);  in ti_pipe3_init()
515 		ret = regmap_update_bits(phy->pcs_syscon, phy->pcie_pcs_reg,  in ti_pipe3_init()
521 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);  in ti_pipe3_init()
524 		ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);  in ti_pipe3_init()
525 		ret = ti_pipe3_dpll_wait_lock(phy);  in ti_pipe3_init()
529 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);  in ti_pipe3_init()
530 	if ((val & PLL_LOCK) && phy->mode == PIPE3_MODE_SATA)  in ti_pipe3_init()
534 	ret = ti_pipe3_dpll_program(phy);  in ti_pipe3_init()
536 		ti_pipe3_disable_clocks(phy);  in ti_pipe3_init()
540 	ti_pipe3_calibrate(phy);  in ti_pipe3_init()
545 static int ti_pipe3_exit(struct phy *x)  in ti_pipe3_exit()
547 	struct ti_pipe3 *phy = phy_get_drvdata(x);  in ti_pipe3_exit()  local
554 	if (phy->mode == PIPE3_MODE_SATA && !phy->dpll_reset_syscon)  in ti_pipe3_exit()
558 	if (phy->mode != PIPE3_MODE_PCIE) {  in ti_pipe3_exit()
560 		val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);  in ti_pipe3_exit()
562 		ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);  in ti_pipe3_exit()
568 			val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);  in ti_pipe3_exit()
574 			dev_err(phy->dev, "Failed to power down: PLL_STATUS 0x%x\n",  in ti_pipe3_exit()
581 	if (phy->mode == PIPE3_MODE_SATA) {  in ti_pipe3_exit()
582 		regmap_update_bits(phy->dpll_reset_syscon, phy->dpll_reset_reg,  in ti_pipe3_exit()
584 		regmap_update_bits(phy->dpll_reset_syscon, phy->dpll_reset_reg,  in ti_pipe3_exit()
588 	ti_pipe3_disable_clocks(phy);  in ti_pipe3_exit()
602 static int ti_pipe3_get_clk(struct ti_pipe3 *phy)  in ti_pipe3_get_clk()  argument
605 	struct device *dev = phy->dev;  in ti_pipe3_get_clk()
607 	phy->refclk = devm_clk_get(dev, "refclk");  in ti_pipe3_get_clk()
608 	if (IS_ERR(phy->refclk)) {  in ti_pipe3_get_clk()
610 		/* older DTBs have missing refclk in SATA PHY  in ti_pipe3_get_clk()
611 		 * so don't bail out in case of SATA PHY.  in ti_pipe3_get_clk()
613 		if (phy->mode != PIPE3_MODE_SATA)  in ti_pipe3_get_clk()
614 			return PTR_ERR(phy->refclk);  in ti_pipe3_get_clk()
617 	if (phy->mode != PIPE3_MODE_SATA) {  in ti_pipe3_get_clk()
618 		phy->wkupclk = devm_clk_get(dev, "wkupclk");  in ti_pipe3_get_clk()
619 		if (IS_ERR(phy->wkupclk)) {  in ti_pipe3_get_clk()
621 			return PTR_ERR(phy->wkupclk);  in ti_pipe3_get_clk()
624 		phy->wkupclk = ERR_PTR(-ENODEV);  in ti_pipe3_get_clk()
627 	if (phy->mode != PIPE3_MODE_PCIE || phy->phy_power_syscon) {  in ti_pipe3_get_clk()
628 		phy->sys_clk = devm_clk_get(dev, "sysclk");  in ti_pipe3_get_clk()
629 		if (IS_ERR(phy->sys_clk)) {  in ti_pipe3_get_clk()
635 	if (phy->mode == PIPE3_MODE_PCIE) {  in ti_pipe3_get_clk()
650 		clk = devm_clk_get(dev, "phy-div");  in ti_pipe3_get_clk()
652 			dev_err(dev, "unable to get phy-div clk\n");  in ti_pipe3_get_clk()
657 		phy->div_clk = devm_clk_get(dev, "div-clk");  in ti_pipe3_get_clk()
658 		if (IS_ERR(phy->div_clk)) {  in ti_pipe3_get_clk()
660 			return PTR_ERR(phy->div_clk);  in ti_pipe3_get_clk()
663 		phy->div_clk = ERR_PTR(-ENODEV);  in ti_pipe3_get_clk()
669 static int ti_pipe3_get_sysctrl(struct ti_pipe3 *phy)  in ti_pipe3_get_sysctrl()  argument
671 	struct device *dev = phy->dev;  in ti_pipe3_get_sysctrl()
676 	phy->phy_power_syscon = syscon_regmap_lookup_by_phandle(node,  in ti_pipe3_get_sysctrl()
677 							"syscon-phy-power");  in ti_pipe3_get_sysctrl()
678 	if (IS_ERR(phy->phy_power_syscon)) {  in ti_pipe3_get_sysctrl()
680 			"can't get syscon-phy-power, using control device\n");  in ti_pipe3_get_sysctrl()
681 		phy->phy_power_syscon = NULL;  in ti_pipe3_get_sysctrl()
684 					       "syscon-phy-power", 1,  in ti_pipe3_get_sysctrl()
685 					       &phy->power_reg)) {  in ti_pipe3_get_sysctrl()
691 	if (!phy->phy_power_syscon) {  in ti_pipe3_get_sysctrl()
704 		phy->control_dev = &control_pdev->dev;  in ti_pipe3_get_sysctrl()
707 	if (phy->mode == PIPE3_MODE_PCIE) {  in ti_pipe3_get_sysctrl()
708 		phy->pcs_syscon = syscon_regmap_lookup_by_phandle(node,  in ti_pipe3_get_sysctrl()
710 		if (IS_ERR(phy->pcs_syscon)) {  in ti_pipe3_get_sysctrl()
713 			phy->pcs_syscon = NULL;  in ti_pipe3_get_sysctrl()
717 						       &phy->pcie_pcs_reg)) {  in ti_pipe3_get_sysctrl()
725 	if (phy->mode == PIPE3_MODE_SATA) {  in ti_pipe3_get_sysctrl()
726 		phy->dpll_reset_syscon = syscon_regmap_lookup_by_phandle(node,  in ti_pipe3_get_sysctrl()
728 		if (IS_ERR(phy->dpll_reset_syscon)) {  in ti_pipe3_get_sysctrl()
731 			phy->dpll_reset_syscon = NULL;  in ti_pipe3_get_sysctrl()
735 						       &phy->dpll_reset_reg)) {  in ti_pipe3_get_sysctrl()
746 static int ti_pipe3_get_tx_rx_base(struct ti_pipe3 *phy)  in ti_pipe3_get_tx_rx_base()  argument
749 	struct device *dev = phy->dev;  in ti_pipe3_get_tx_rx_base()
754 	phy->phy_rx = devm_ioremap_resource(dev, res);  in ti_pipe3_get_tx_rx_base()
755 	if (IS_ERR(phy->phy_rx))  in ti_pipe3_get_tx_rx_base()
756 		return PTR_ERR(phy->phy_rx);  in ti_pipe3_get_tx_rx_base()
760 	phy->phy_tx = devm_ioremap_resource(dev, res);  in ti_pipe3_get_tx_rx_base()
762 	return PTR_ERR_OR_ZERO(phy->phy_tx);  in ti_pipe3_get_tx_rx_base()
765 static int ti_pipe3_get_pll_base(struct ti_pipe3 *phy)  in ti_pipe3_get_pll_base()  argument
768 	struct device *dev = phy->dev;  in ti_pipe3_get_pll_base()
771 	if (phy->mode == PIPE3_MODE_PCIE)  in ti_pipe3_get_pll_base()
776 	phy->pll_ctrl_base = devm_ioremap_resource(dev, res);  in ti_pipe3_get_pll_base()
777 	return PTR_ERR_OR_ZERO(phy->pll_ctrl_base);  in ti_pipe3_get_pll_base()
782 	struct ti_pipe3 *phy;  in ti_pipe3_probe()  local
783 	struct phy *generic_phy;  in ti_pipe3_probe()
790 	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);  in ti_pipe3_probe()
791 	if (!phy)  in ti_pipe3_probe()
804 	phy->dev = dev;  in ti_pipe3_probe()
805 	phy->mode = data->mode;  in ti_pipe3_probe()
806 	phy->dpll_map = data->dpll_map;  in ti_pipe3_probe()
807 	phy->settings = data->settings;  in ti_pipe3_probe()
809 	ret = ti_pipe3_get_pll_base(phy);  in ti_pipe3_probe()
813 	ret = ti_pipe3_get_tx_rx_base(phy);  in ti_pipe3_probe()
817 	ret = ti_pipe3_get_sysctrl(phy);  in ti_pipe3_probe()
821 	ret = ti_pipe3_get_clk(phy);  in ti_pipe3_probe()
825 	platform_set_drvdata(pdev, phy);  in ti_pipe3_probe()
829 	 * Prevent auto-disable of refclk for SATA PHY due to Errata i783  in ti_pipe3_probe()
831 	if (phy->mode == PIPE3_MODE_SATA) {  in ti_pipe3_probe()
832 		if (!IS_ERR(phy->refclk)) {  in ti_pipe3_probe()
833 			clk_prepare_enable(phy->refclk);  in ti_pipe3_probe()
834 			phy->sata_refclk_enabled = true;  in ti_pipe3_probe()
842 	phy_set_drvdata(generic_phy, phy);  in ti_pipe3_probe()
852 	struct ti_pipe3 *phy = platform_get_drvdata(pdev);  in ti_pipe3_remove()  local
854 	if (phy->mode == PIPE3_MODE_SATA) {  in ti_pipe3_remove()
855 		clk_disable_unprepare(phy->refclk);  in ti_pipe3_remove()
856 		phy->sata_refclk_enabled = false;  in ti_pipe3_remove()
863 static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy)  in ti_pipe3_enable_clocks()  argument
867 	if (!IS_ERR(phy->refclk)) {  in ti_pipe3_enable_clocks()
868 		ret = clk_prepare_enable(phy->refclk);  in ti_pipe3_enable_clocks()
870 			dev_err(phy->dev, "Failed to enable refclk %d\n", ret);  in ti_pipe3_enable_clocks()
875 	if (!IS_ERR(phy->wkupclk)) {  in ti_pipe3_enable_clocks()
876 		ret = clk_prepare_enable(phy->wkupclk);  in ti_pipe3_enable_clocks()
878 			dev_err(phy->dev, "Failed to enable wkupclk %d\n", ret);  in ti_pipe3_enable_clocks()
883 	if (!IS_ERR(phy->div_clk)) {  in ti_pipe3_enable_clocks()
884 		ret = clk_prepare_enable(phy->div_clk);  in ti_pipe3_enable_clocks()
886 			dev_err(phy->dev, "Failed to enable div_clk %d\n", ret);  in ti_pipe3_enable_clocks()
894 	if (!IS_ERR(phy->wkupclk))  in ti_pipe3_enable_clocks()
895 		clk_disable_unprepare(phy->wkupclk);  in ti_pipe3_enable_clocks()
898 	if (!IS_ERR(phy->refclk))  in ti_pipe3_enable_clocks()
899 		clk_disable_unprepare(phy->refclk);  in ti_pipe3_enable_clocks()
904 static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy)  in ti_pipe3_disable_clocks()  argument
906 	if (!IS_ERR(phy->wkupclk))  in ti_pipe3_disable_clocks()
907 		clk_disable_unprepare(phy->wkupclk);  in ti_pipe3_disable_clocks()
908 	if (!IS_ERR(phy->refclk))  in ti_pipe3_disable_clocks()
909 		clk_disable_unprepare(phy->refclk);  in ti_pipe3_disable_clocks()
910 	if (!IS_ERR(phy->div_clk))  in ti_pipe3_disable_clocks()
911 		clk_disable_unprepare(phy->div_clk);  in ti_pipe3_disable_clocks()
916 		.compatible = "ti,phy-usb3",
924 		.compatible = "ti,phy-pipe3-sata",
928 		.compatible = "ti,phy-pipe3-pcie",
948 MODULE_DESCRIPTION("TI PIPE3 phy driver");