35 	struct phy	*if_phy;  member
60 	struct phy_gmii_sel_phy_priv *if_phy = phy_get_drvdata(phy);  in phy_gmii_sel_mode()  local
61 	const struct phy_gmii_sel_soc_data *soc_data = if_phy->priv->soc_data;  in phy_gmii_sel_mode()
62 	struct device *dev = if_phy->priv->dev;  in phy_gmii_sel_mode()
93 			 if_phy->id, phy_modes(submode));  in phy_gmii_sel_mode()
97 	if_phy->phy_if_mode = submode;  in phy_gmii_sel_mode()
100 		__func__, if_phy->id, submode, rgmii_id,  in phy_gmii_sel_mode()
101 		if_phy->rmii_clock_external);  in phy_gmii_sel_mode()
103 	regfield = if_phy->fields[PHY_GMII_SEL_PORT_MODE];  in phy_gmii_sel_mode()
106 		dev_err(dev, "port%u: set mode fail %d", if_phy->id, ret);  in phy_gmii_sel_mode()
111 	    if_phy->fields[PHY_GMII_SEL_RGMII_ID_MODE]) {  in phy_gmii_sel_mode()
112 		regfield = if_phy->fields[PHY_GMII_SEL_RGMII_ID_MODE];  in phy_gmii_sel_mode()
119 	    if_phy->fields[PHY_GMII_SEL_RMII_IO_CLK_EN]) {  in phy_gmii_sel_mode()
120 		regfield = if_phy->fields[PHY_GMII_SEL_RMII_IO_CLK_EN];  in phy_gmii_sel_mode()
122 					 if_phy->rmii_clock_external);  in phy_gmii_sel_mode()
245 	return priv->if_phys[phy_id].if_phy;  in phy_gmii_sel_of_xlate()
249 			     struct phy_gmii_sel_phy_priv *if_phy)  in phy_gmii_init_phy()  argument
258 	if_phy->id = port;  in phy_gmii_init_phy()
259 	if_phy->priv = priv;  in phy_gmii_init_phy()
270 	if_phy->fields[PHY_GMII_SEL_PORT_MODE] = regfield;  in phy_gmii_init_phy()
280 		if_phy->fields[PHY_GMII_SEL_RGMII_ID_MODE] = regfield;  in phy_gmii_init_phy()
293 		if_phy->fields[PHY_GMII_SEL_RMII_IO_CLK_EN] = regfield;  in phy_gmii_init_phy()
298 	if_phy->if_phy = devm_phy_create(dev,  in phy_gmii_init_phy()
301 	if (IS_ERR(if_phy->if_phy)) {  in phy_gmii_init_phy()
302 		ret = PTR_ERR(if_phy->if_phy);  in phy_gmii_init_phy()
306 	phy_set_drvdata(if_phy->if_phy, if_phy);  in phy_gmii_init_phy()