Lines Matching refs:PHY_GMII_SEL_PORT_MODE
26 PHY_GMII_SEL_PORT_MODE = 0, enumerator
103 regfield = if_phy->fields[PHY_GMII_SEL_PORT_MODE]; in phy_gmii_sel_mode()
131 [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x650, 0, 1),
136 [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x650, 2, 3),
153 [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x554, 0, 1),
156 [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x554, 4, 5),
175 { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x0, 0, 2), },
176 { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4, 0, 2), },
177 { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x8, 0, 2), },
178 { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0xC, 0, 2), },
179 { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x10, 0, 2), },
180 { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x14, 0, 2), },
181 { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x18, 0, 2), },
182 { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x1C, 0, 2), },
270 if_phy->fields[PHY_GMII_SEL_PORT_MODE] = regfield; in phy_gmii_init_phy()