1 // SPDX-License-Identifier: GPL-2.0-only
3  * UFS PHY driver for Samsung SoC
18 #include <linux/phy/phy.h>
22 #include "phy-samsung-ufs.h"
24 #define for_each_phy_lane(phy, i) \  argument
25 	for (i = 0; i < (phy)->lane_cnt; i++)
27 	for (; (cfg)->id; (cfg)++)
31 static void samsung_ufs_phy_config(struct samsung_ufs_phy *phy,  in samsung_ufs_phy_config()  argument
39 		writel(cfg->val, (phy)->reg_pma + cfg->off_0);  in samsung_ufs_phy_config()
42 		if (cfg->id == PHY_TRSV_BLK)  in samsung_ufs_phy_config()
43 			writel(cfg->val, (phy)->reg_pma + cfg->off_1);  in samsung_ufs_phy_config()
48 static int samsung_ufs_phy_wait_for_lock_acq(struct phy *phy)  in samsung_ufs_phy_wait_for_lock_acq()  argument
50 	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);  in samsung_ufs_phy_wait_for_lock_acq()
57 			ufs_phy->reg_pma + PHY_APB_ADDR(PHY_PLL_LOCK_STATUS),  in samsung_ufs_phy_wait_for_lock_acq()
60 		dev_err(ufs_phy->dev,  in samsung_ufs_phy_wait_for_lock_acq()
61 			"failed to get phy pll lock acquisition %d\n", err);  in samsung_ufs_phy_wait_for_lock_acq()
66 			ufs_phy->reg_pma + PHY_APB_ADDR(PHY_CDR_LOCK_STATUS),  in samsung_ufs_phy_wait_for_lock_acq()
69 		dev_err(ufs_phy->dev,  in samsung_ufs_phy_wait_for_lock_acq()
70 			"failed to get phy cdr lock acquisition %d\n", err);  in samsung_ufs_phy_wait_for_lock_acq()
75 static int samsung_ufs_phy_calibrate(struct phy *phy)  in samsung_ufs_phy_calibrate()  argument
77 	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);  in samsung_ufs_phy_calibrate()
78 	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;  in samsung_ufs_phy_calibrate()
83 	if (unlikely(ufs_phy->ufs_phy_state < CFG_PRE_INIT ||  in samsung_ufs_phy_calibrate()
84 		     ufs_phy->ufs_phy_state >= CFG_TAG_MAX)) {  in samsung_ufs_phy_calibrate()
85 		dev_err(ufs_phy->dev, "invalid phy config index %d\n", ufs_phy->ufs_phy_state);  in samsung_ufs_phy_calibrate()
86 		return -EINVAL;  in samsung_ufs_phy_calibrate()
89 	cfg = cfgs[ufs_phy->ufs_phy_state];  in samsung_ufs_phy_calibrate()
99 	if (ufs_phy->ufs_phy_state == CFG_POST_PWR_HS)  in samsung_ufs_phy_calibrate()
100 		err = samsung_ufs_phy_wait_for_lock_acq(phy);  in samsung_ufs_phy_calibrate()
103 	 * In Samsung ufshci, PHY need to be calibrated at different  in samsung_ufs_phy_calibrate()
106 	 * Below state machine to make sure to calibrate PHY in each  in samsung_ufs_phy_calibrate()
107 	 * state. Here after configuring PHY in a given state, will  in samsung_ufs_phy_calibrate()
108 	 * change the state to next state so that next state phy  in samsung_ufs_phy_calibrate()
112 	switch (ufs_phy->ufs_phy_state) {  in samsung_ufs_phy_calibrate()
114 		ufs_phy->ufs_phy_state = CFG_POST_INIT;  in samsung_ufs_phy_calibrate()
117 		ufs_phy->ufs_phy_state = CFG_PRE_PWR_HS;  in samsung_ufs_phy_calibrate()
120 		ufs_phy->ufs_phy_state = CFG_POST_PWR_HS;  in samsung_ufs_phy_calibrate()
124 		ufs_phy->ufs_phy_state = CFG_PRE_INIT;  in samsung_ufs_phy_calibrate()
127 		dev_err(ufs_phy->dev, "wrong state for phy calibration\n");  in samsung_ufs_phy_calibrate()
133 static int samsung_ufs_phy_symbol_clk_init(struct samsung_ufs_phy *phy)  in samsung_ufs_phy_symbol_clk_init()  argument
137 	phy->tx0_symbol_clk = devm_clk_get(phy->dev, "tx0_symbol_clk");  in samsung_ufs_phy_symbol_clk_init()
138 	if (IS_ERR(phy->tx0_symbol_clk)) {  in samsung_ufs_phy_symbol_clk_init()
139 		dev_err(phy->dev, "failed to get tx0_symbol_clk clock\n");  in samsung_ufs_phy_symbol_clk_init()
140 		return PTR_ERR(phy->tx0_symbol_clk);  in samsung_ufs_phy_symbol_clk_init()
143 	phy->rx0_symbol_clk = devm_clk_get(phy->dev, "rx0_symbol_clk");  in samsung_ufs_phy_symbol_clk_init()
144 	if (IS_ERR(phy->rx0_symbol_clk)) {  in samsung_ufs_phy_symbol_clk_init()
145 		dev_err(phy->dev, "failed to get rx0_symbol_clk clock\n");  in samsung_ufs_phy_symbol_clk_init()
146 		return PTR_ERR(phy->rx0_symbol_clk);  in samsung_ufs_phy_symbol_clk_init()
149 	phy->rx1_symbol_clk = devm_clk_get(phy->dev, "rx1_symbol_clk");  in samsung_ufs_phy_symbol_clk_init()
150 	if (IS_ERR(phy->rx1_symbol_clk)) {  in samsung_ufs_phy_symbol_clk_init()
151 		dev_err(phy->dev, "failed to get rx1_symbol_clk clock\n");  in samsung_ufs_phy_symbol_clk_init()
152 		return PTR_ERR(phy->rx1_symbol_clk);  in samsung_ufs_phy_symbol_clk_init()
155 	ret = clk_prepare_enable(phy->tx0_symbol_clk);  in samsung_ufs_phy_symbol_clk_init()
157 		dev_err(phy->dev, "%s: tx0_symbol_clk enable failed %d\n", __func__, ret);  in samsung_ufs_phy_symbol_clk_init()
161 	ret = clk_prepare_enable(phy->rx0_symbol_clk);  in samsung_ufs_phy_symbol_clk_init()
163 		dev_err(phy->dev, "%s: rx0_symbol_clk enable failed %d\n", __func__, ret);  in samsung_ufs_phy_symbol_clk_init()
167 	ret = clk_prepare_enable(phy->rx1_symbol_clk);  in samsung_ufs_phy_symbol_clk_init()
169 		dev_err(phy->dev, "%s: rx1_symbol_clk enable failed %d\n", __func__, ret);  in samsung_ufs_phy_symbol_clk_init()
176 	clk_disable_unprepare(phy->rx0_symbol_clk);  in samsung_ufs_phy_symbol_clk_init()
178 	clk_disable_unprepare(phy->tx0_symbol_clk);  in samsung_ufs_phy_symbol_clk_init()
183 static int samsung_ufs_phy_clks_init(struct samsung_ufs_phy *phy)  in samsung_ufs_phy_clks_init()  argument
187 	phy->ref_clk = devm_clk_get(phy->dev, "ref_clk");  in samsung_ufs_phy_clks_init()
188 	if (IS_ERR(phy->ref_clk))  in samsung_ufs_phy_clks_init()
189 		dev_err(phy->dev, "failed to get ref_clk clock\n");  in samsung_ufs_phy_clks_init()
191 	ret = clk_prepare_enable(phy->ref_clk);  in samsung_ufs_phy_clks_init()
193 		dev_err(phy->dev, "%s: ref_clk enable failed %d\n", __func__, ret);  in samsung_ufs_phy_clks_init()
197 	dev_dbg(phy->dev, "UFS MPHY ref_clk_rate = %ld\n", clk_get_rate(phy->ref_clk));  in samsung_ufs_phy_clks_init()
202 static int samsung_ufs_phy_init(struct phy *phy)  in samsung_ufs_phy_init()  argument
204 	struct samsung_ufs_phy *ss_phy = get_samsung_ufs_phy(phy);  in samsung_ufs_phy_init()
207 	ss_phy->lane_cnt = phy->attrs.bus_width;  in samsung_ufs_phy_init()
208 	ss_phy->ufs_phy_state = CFG_PRE_INIT;  in samsung_ufs_phy_init()
210 	if (ss_phy->drvdata->has_symbol_clk) {  in samsung_ufs_phy_init()
213 			dev_err(ss_phy->dev, "failed to set ufs phy symbol clocks\n");  in samsung_ufs_phy_init()
218 		dev_err(ss_phy->dev, "failed to set ufs phy clocks\n");  in samsung_ufs_phy_init()
220 	ret = samsung_ufs_phy_calibrate(phy);  in samsung_ufs_phy_init()
222 		dev_err(ss_phy->dev, "ufs phy calibration failed\n");  in samsung_ufs_phy_init()
227 static int samsung_ufs_phy_power_on(struct phy *phy)  in samsung_ufs_phy_power_on()  argument
229 	struct samsung_ufs_phy *ss_phy = get_samsung_ufs_phy(phy);  in samsung_ufs_phy_power_on()
235 static int samsung_ufs_phy_power_off(struct phy *phy)  in samsung_ufs_phy_power_off()  argument
237 	struct samsung_ufs_phy *ss_phy = get_samsung_ufs_phy(phy);  in samsung_ufs_phy_power_off()
243 static int samsung_ufs_phy_set_mode(struct phy *generic_phy,  in samsung_ufs_phy_set_mode()
248 	ss_phy->mode = PHY_MODE_INVALID;  in samsung_ufs_phy_set_mode()
251 		ss_phy->mode = mode;  in samsung_ufs_phy_set_mode()
256 static int samsung_ufs_phy_exit(struct phy *phy)  in samsung_ufs_phy_exit()  argument
258 	struct samsung_ufs_phy *ss_phy = get_samsung_ufs_phy(phy);  in samsung_ufs_phy_exit()
260 	clk_disable_unprepare(ss_phy->ref_clk);  in samsung_ufs_phy_exit()
262 	if (ss_phy->drvdata->has_symbol_clk) {  in samsung_ufs_phy_exit()
263 		clk_disable_unprepare(ss_phy->tx0_symbol_clk);  in samsung_ufs_phy_exit()
264 		clk_disable_unprepare(ss_phy->rx0_symbol_clk);  in samsung_ufs_phy_exit()
265 		clk_disable_unprepare(ss_phy->rx1_symbol_clk);  in samsung_ufs_phy_exit()
285 	struct device *dev = &pdev->dev;  in samsung_ufs_phy_probe()
287 	struct samsung_ufs_phy *phy;  in samsung_ufs_phy_probe()  local
288 	struct phy *gen_phy;  in samsung_ufs_phy_probe()
293 	match = of_match_node(samsung_ufs_phy_match, dev->of_node);  in samsung_ufs_phy_probe()
295 		err = -EINVAL;  in samsung_ufs_phy_probe()
300 	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);  in samsung_ufs_phy_probe()
301 	if (!phy) {  in samsung_ufs_phy_probe()
302 		err = -ENOMEM;  in samsung_ufs_phy_probe()
306 	phy->reg_pma = devm_platform_ioremap_resource_byname(pdev, "phy-pma");  in samsung_ufs_phy_probe()
307 	if (IS_ERR(phy->reg_pma)) {  in samsung_ufs_phy_probe()
308 		err = PTR_ERR(phy->reg_pma);  in samsung_ufs_phy_probe()
312 	phy->reg_pmu = syscon_regmap_lookup_by_phandle(  in samsung_ufs_phy_probe()
313 				dev->of_node, "samsung,pmu-syscon");  in samsung_ufs_phy_probe()
314 	if (IS_ERR(phy->reg_pmu)) {  in samsung_ufs_phy_probe()
315 		err = PTR_ERR(phy->reg_pmu);  in samsung_ufs_phy_probe()
323 		dev_err(dev, "failed to create PHY for ufs-phy\n");  in samsung_ufs_phy_probe()
327 	drvdata = match->data;  in samsung_ufs_phy_probe()
328 	phy->dev = dev;  in samsung_ufs_phy_probe()
329 	phy->drvdata = drvdata;  in samsung_ufs_phy_probe()
330 	phy->cfg = (struct samsung_ufs_phy_cfg **)drvdata->cfg;  in samsung_ufs_phy_probe()
331 	phy->isol = &drvdata->isol;  in samsung_ufs_phy_probe()
332 	phy->lane_cnt = PHY_DEF_LANE_CNT;  in samsung_ufs_phy_probe()
334 	phy_set_drvdata(gen_phy, phy);  in samsung_ufs_phy_probe()
339 		dev_err(dev, "failed to register phy-provider\n");  in samsung_ufs_phy_probe()
348 		.compatible = "samsung,exynos7-ufs-phy",
358 		.name = "samsung-ufs-phy",
363 MODULE_DESCRIPTION("Samsung SoC UFS PHY Driver");