1 // SPDX-License-Identifier: GPL-2.0
63 	"vdda-pll", "vdda33", "vdda18",
69  * struct qcom_snps_hsphy - snps hs phy attributes
111 	dev_dbg(&hsphy->phy->dev, "Suspend QCOM SNPS PHY\n");  in qcom_snps_hsphy_suspend()
113 	if (hsphy->mode == PHY_MODE_USB_HOST) {  in qcom_snps_hsphy_suspend()
114 		/* Enable auto-resume to meet remote wakeup timing */  in qcom_snps_hsphy_suspend()
115 		qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_suspend()
120 		qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_suspend()
125 	clk_disable_unprepare(hsphy->cfg_ahb_clk);  in qcom_snps_hsphy_suspend()
133 	dev_dbg(&hsphy->phy->dev, "Resume QCOM SNPS PHY, mode\n");  in qcom_snps_hsphy_resume()
135 	ret = clk_prepare_enable(hsphy->cfg_ahb_clk);  in qcom_snps_hsphy_resume()
137 		dev_err(&hsphy->phy->dev, "failed to enable cfg ahb clock\n");  in qcom_snps_hsphy_resume()
148 	if (!hsphy->phy_initialized)  in qcom_snps_hsphy_runtime_suspend()
159 	if (!hsphy->phy_initialized)  in qcom_snps_hsphy_runtime_resume()
171 	hsphy->mode = mode;  in qcom_snps_hsphy_set_mode()
180 	dev_vdbg(&phy->dev, "%s(): Initializing SNPS HS phy\n", __func__);  in qcom_snps_hsphy_init()
182 	ret = regulator_bulk_enable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs);  in qcom_snps_hsphy_init()
186 	ret = clk_prepare_enable(hsphy->cfg_ahb_clk);  in qcom_snps_hsphy_init()
188 		dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret);  in qcom_snps_hsphy_init()
192 	ret = reset_control_assert(hsphy->phy_reset);  in qcom_snps_hsphy_init()
194 		dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret);  in qcom_snps_hsphy_init()
200 	ret = reset_control_deassert(hsphy->phy_reset);  in qcom_snps_hsphy_init()
202 		dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret);  in qcom_snps_hsphy_init()
206 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0,  in qcom_snps_hsphy_init()
209 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_UTMI_CTRL5,  in qcom_snps_hsphy_init()
211 	qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_init()
214 	qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_init()
217 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_REFCLK_CTRL,  in qcom_snps_hsphy_init()
219 	qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_init()
222 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_HS_PHY_CTRL1,  in qcom_snps_hsphy_init()
225 	qcom_snps_hsphy_write_mask(hsphy->base,  in qcom_snps_hsphy_init()
229 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_HS_PHY_CTRL2,  in qcom_snps_hsphy_init()
233 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_UTMI_CTRL0,  in qcom_snps_hsphy_init()
236 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_UTMI_CTRL5,  in qcom_snps_hsphy_init()
239 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_HS_PHY_CTRL2,  in qcom_snps_hsphy_init()
242 	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0,  in qcom_snps_hsphy_init()
245 	hsphy->phy_initialized = true;  in qcom_snps_hsphy_init()
250 	clk_disable_unprepare(hsphy->cfg_ahb_clk);  in qcom_snps_hsphy_init()
252 	regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs);  in qcom_snps_hsphy_init()
261 	reset_control_assert(hsphy->phy_reset);  in qcom_snps_hsphy_exit()
262 	clk_disable_unprepare(hsphy->cfg_ahb_clk);  in qcom_snps_hsphy_exit()
263 	regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs);  in qcom_snps_hsphy_exit()
264 	hsphy->phy_initialized = false;  in qcom_snps_hsphy_exit()
277 	{ .compatible	= "qcom,sm8150-usb-hs-phy", },
278 	{ .compatible	= "qcom,usb-snps-hs-7nm-phy", },
279 	{ .compatible	= "qcom,usb-snps-femto-v2-phy",	},
291 	struct device *dev = &pdev->dev;  in qcom_snps_hsphy_probe()
300 		return -ENOMEM;  in qcom_snps_hsphy_probe()
302 	hsphy->base = devm_platform_ioremap_resource(pdev, 0);  in qcom_snps_hsphy_probe()
303 	if (IS_ERR(hsphy->base))  in qcom_snps_hsphy_probe()
304 		return PTR_ERR(hsphy->base);  in qcom_snps_hsphy_probe()
306 	hsphy->ref_clk = devm_clk_get(dev, "ref");  in qcom_snps_hsphy_probe()
307 	if (IS_ERR(hsphy->ref_clk)) {  in qcom_snps_hsphy_probe()
308 		ret = PTR_ERR(hsphy->ref_clk);  in qcom_snps_hsphy_probe()
309 		if (ret != -EPROBE_DEFER)  in qcom_snps_hsphy_probe()
314 	hsphy->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, NULL);  in qcom_snps_hsphy_probe()
315 	if (IS_ERR(hsphy->phy_reset)) {  in qcom_snps_hsphy_probe()
317 		return PTR_ERR(hsphy->phy_reset);  in qcom_snps_hsphy_probe()
320 	num = ARRAY_SIZE(hsphy->vregs);  in qcom_snps_hsphy_probe()
322 		hsphy->vregs[i].supply = qcom_snps_hsphy_vreg_names[i];  in qcom_snps_hsphy_probe()
324 	ret = devm_regulator_bulk_get(dev, num, hsphy->vregs);  in qcom_snps_hsphy_probe()
326 		if (ret != -EPROBE_DEFER)  in qcom_snps_hsphy_probe()
346 	hsphy->phy = generic_phy;  in qcom_snps_hsphy_probe()
353 		dev_dbg(dev, "Registered Qcom-SNPS HS phy\n");  in qcom_snps_hsphy_probe()
363 		.name	= "qcom-snps-hs-femto-v2-phy",