Lines Matching full:bridge

396 		 * 1. bridge resource  -- IORESOURCE_STARTALIGN  in __assign_resources_sorted()
398 * Here just fix the additional alignment for bridge in __assign_resources_sorted()
508 struct pci_dev *bridge = bus->self; in pci_setup_cardbus() local
512 pci_info(bridge, "CardBus bridge to %pR\n", in pci_setup_cardbus()
516 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_cardbus()
522 pci_info(bridge, " bridge window %pR\n", res); in pci_setup_cardbus()
523 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0, in pci_setup_cardbus()
525 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0, in pci_setup_cardbus()
530 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_cardbus()
532 pci_info(bridge, " bridge window %pR\n", res); in pci_setup_cardbus()
533 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1, in pci_setup_cardbus()
535 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1, in pci_setup_cardbus()
540 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_cardbus()
542 pci_info(bridge, " bridge window %pR\n", res); in pci_setup_cardbus()
543 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0, in pci_setup_cardbus()
545 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0, in pci_setup_cardbus()
550 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_cardbus()
552 pci_info(bridge, " bridge window %pR\n", res); in pci_setup_cardbus()
553 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1, in pci_setup_cardbus()
555 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1, in pci_setup_cardbus()
563 * Bridge Architecture Specification rev. 1.1 (1998) requires that if there
564 * are no I/O ports or memory behind the bridge, the corresponding range
566 * bridge's base/limit registers.
570 * writes, so it's quite possible that an I/O window of the bridge will
574 static void pci_setup_bridge_io(struct pci_dev *bridge) in pci_setup_bridge_io() argument
584 if (bridge->io_window_1k) in pci_setup_bridge_io()
588 res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_setup_bridge_io()
589 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_bridge_io()
591 pci_read_config_word(bridge, PCI_IO_BASE, &l); in pci_setup_bridge_io()
597 pci_info(bridge, " bridge window %pR\n", res); in pci_setup_bridge_io()
604 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff); in pci_setup_bridge_io()
606 pci_write_config_word(bridge, PCI_IO_BASE, l); in pci_setup_bridge_io()
608 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16); in pci_setup_bridge_io()
611 static void pci_setup_bridge_mmio(struct pci_dev *bridge) in pci_setup_bridge_mmio() argument
618 res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_setup_bridge_mmio()
619 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_bridge_mmio()
623 pci_info(bridge, " bridge window %pR\n", res); in pci_setup_bridge_mmio()
627 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l); in pci_setup_bridge_mmio()
630 static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge) in pci_setup_bridge_mmio_pref() argument
641 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0); in pci_setup_bridge_mmio_pref()
645 res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_setup_bridge_mmio_pref()
646 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_bridge_mmio_pref()
654 pci_info(bridge, " bridge window %pR\n", res); in pci_setup_bridge_mmio_pref()
658 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l); in pci_setup_bridge_mmio_pref()
661 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu); in pci_setup_bridge_mmio_pref()
662 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu); in pci_setup_bridge_mmio_pref()
667 struct pci_dev *bridge = bus->self; in __pci_setup_bridge() local
669 pci_info(bridge, "PCI bridge to %pR\n", in __pci_setup_bridge()
673 pci_setup_bridge_io(bridge); in __pci_setup_bridge()
676 pci_setup_bridge_mmio(bridge); in __pci_setup_bridge()
679 pci_setup_bridge_mmio_pref(bridge); in __pci_setup_bridge()
681 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl); in __pci_setup_bridge()
698 int pci_claim_bridge_resource(struct pci_dev *bridge, int i) in pci_claim_bridge_resource() argument
703 if (pci_claim_resource(bridge, i) == 0) in pci_claim_bridge_resource()
706 if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_claim_bridge_resource()
709 if (!pci_bus_clip_resource(bridge, i)) in pci_claim_bridge_resource()
714 pci_setup_bridge_io(bridge); in pci_claim_bridge_resource()
717 pci_setup_bridge_mmio(bridge); in pci_claim_bridge_resource()
720 pci_setup_bridge_mmio_pref(bridge); in pci_claim_bridge_resource()
726 if (pci_claim_resource(bridge, i) == 0) in pci_claim_bridge_resource()
733 * Check whether the bridge supports optional I/O and prefetchable memory
739 struct pci_dev *bridge = bus->self; in pci_bridge_check_ranges() local
742 b_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bridge_check_ranges()
745 if (bridge->io_window) { in pci_bridge_check_ranges()
746 b_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bridge_check_ranges()
750 if (bridge->pref_window) { in pci_bridge_check_ranges()
751 b_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bridge_check_ranges()
753 if (bridge->pref_64_window) { in pci_bridge_check_ranges()
873 * Sizing the I/O windows of the PCI-PCI bridge is trivial, since these
874 * windows have 1K or 4K granularity and the I/O ranges of non-bridge PCI
930 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n", in pbus_size_io()
942 pci_info(bus->self, "bridge window %pR to %pR add_size %llx\n", in pbus_size_io()
975 * @type: The type of free resource from bridge
1041 * aligns[0] is for 1MB (since bridge memory in pbus_size_mem()
1083 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n", in pbus_size_mem()
1093 pci_info(bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n", in pbus_size_mem()
1113 struct pci_dev *bridge = bus->self; in pci_bus_size_cardbus() local
1118 b_res = &bridge->resource[PCI_CB_BRIDGE_IO_0_WINDOW]; in pci_bus_size_cardbus()
1130 add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size, in pci_bus_size_cardbus()
1135 b_res = &bridge->resource[PCI_CB_BRIDGE_IO_1_WINDOW]; in pci_bus_size_cardbus()
1143 add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size, in pci_bus_size_cardbus()
1149 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); in pci_bus_size_cardbus()
1152 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl); in pci_bus_size_cardbus()
1153 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); in pci_bus_size_cardbus()
1156 /* Check whether prefetchable memory is supported by this bridge. */ in pci_bus_size_cardbus()
1157 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); in pci_bus_size_cardbus()
1160 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl); in pci_bus_size_cardbus()
1161 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); in pci_bus_size_cardbus()
1164 b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_0_WINDOW]; in pci_bus_size_cardbus()
1178 add_to_list(realloc_head, bridge, b_res, in pci_bus_size_cardbus()
1187 b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_1_WINDOW]; in pci_bus_size_cardbus()
1195 add_to_list(realloc_head, bridge, b_res, b_res_3_size, in pci_bus_size_cardbus()
1232 host = to_pci_host_bridge(bus->bridge); in __pci_bus_size_bridges()
1408 pci_info(dev, "not setting up bridge for bus %04x:%02x\n", in __pci_bus_assign_resources()
1469 * bridge apertures. Read the programmed bridge bases and in pci_bus_allocate_resources()
1470 * recursively claim the respective bridge resources. in pci_bus_allocate_resources()
1488 static void __pci_bridge_assign_resources(const struct pci_dev *bridge, in __pci_bridge_assign_resources() argument
1494 pdev_assign_resources_sorted((struct pci_dev *)bridge, in __pci_bridge_assign_resources()
1497 b = bridge->subordinate; in __pci_bridge_assign_resources()
1503 switch (bridge->class >> 8) { in __pci_bridge_assign_resources()
1513 pci_info(bridge, "not setting up bridge for bus %04x:%02x\n", in __pci_bridge_assign_resources()
1535 * 1. If IO port assignment fails, release bridge IO port. in pci_bridge_release_resources()
1536 * 2. If non pref MMIO assignment fails, release bridge nonpref MMIO. in pci_bridge_release_resources()
1537 * 3. If 64bit pref MMIO assignment fails, and bridge pref is 64bit, in pci_bridge_release_resources()
1538 * release bridge pref MMIO. in pci_bridge_release_resources()
1539 * 4. If pref MMIO assignment fails, and bridge pref is 32bit, in pci_bridge_release_resources()
1540 * release bridge pref MMIO. in pci_bridge_release_resources()
1541 * 5. If pref MMIO assignment fails, and bridge pref is not in pci_bridge_release_resources()
1542 * assigned, release bridge nonpref MMIO. in pci_bridge_release_resources()
1577 /* For next child res under same bridge */ in pci_bridge_release_resources()
1588 * Try to release PCI bridge resources from leaf bridge, so we can allocate
1749 * First try will not touch PCI bridge res.
1750 * Second and later try will clear small leaf bridge res.
1778 * have, so can realloc parent bridge resource in pci_assign_unassigned_root_bus_resources()
1815 * Try to release leaf bridge's resources that doesn't fit resource of in pci_assign_unassigned_root_bus_resources()
1816 * child device under that bridge. in pci_assign_unassigned_root_bus_resources()
1855 /* Make sure the root bridge has a companion ACPI device */ in pci_assign_unassigned_resources()
1856 if (ACPI_HANDLE(root_bus->bridge)) in pci_assign_unassigned_resources()
1857 acpi_ioapic_add(ACPI_HANDLE(root_bus->bridge)); in pci_assign_unassigned_resources()
1861 static void adjust_bridge_window(struct pci_dev *bridge, struct resource *res, in adjust_bridge_window() argument
1875 pci_dbg(bridge, "bridge window %pR extended by %pa\n", res, in adjust_bridge_window()
1879 pci_dbg(bridge, "bridge window %pR shrunken by %pa\n", res, in adjust_bridge_window()
1895 struct pci_dev *dev, *bridge = bus->self; in pci_bus_distribute_available_resources() local
1898 io_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bus_distribute_available_resources()
1899 mmio_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bus_distribute_available_resources()
1900 mmio_pref_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bus_distribute_available_resources()
1903 * The alignment of this bridge is yet to be considered, hence it must in pci_bus_distribute_available_resources()
1904 * be done now before extending its bridge window. in pci_bus_distribute_available_resources()
1906 align = pci_resource_alignment(bridge, io_res); in pci_bus_distribute_available_resources()
1910 align = pci_resource_alignment(bridge, mmio_res); in pci_bus_distribute_available_resources()
1914 align = pci_resource_alignment(bridge, mmio_pref_res); in pci_bus_distribute_available_resources()
1920 * Now that we have adjusted for alignment, update the bridge window in pci_bus_distribute_available_resources()
1923 adjust_bridge_window(bridge, io_res, add_list, resource_size(&io)); in pci_bus_distribute_available_resources()
1924 adjust_bridge_window(bridge, mmio_res, add_list, resource_size(&mmio)); in pci_bus_distribute_available_resources()
1925 adjust_bridge_window(bridge, mmio_pref_res, add_list, in pci_bus_distribute_available_resources()
1941 * There is only one bridge on the bus so it gets all available in pci_bus_distribute_available_resources()
1971 * bridge and devices below it occupy. in pci_bus_distribute_available_resources()
2031 static void pci_bridge_distribute_available_resources(struct pci_dev *bridge, in pci_bridge_distribute_available_resources() argument
2036 if (!bridge->is_hotplug_bridge) in pci_bridge_distribute_available_resources()
2040 available_io = bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bridge_distribute_available_resources()
2041 available_mmio = bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bridge_distribute_available_resources()
2042 available_mmio_pref = bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bridge_distribute_available_resources()
2044 pci_bus_distribute_available_resources(bridge->subordinate, in pci_bridge_distribute_available_resources()
2050 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge) in pci_assign_unassigned_bridge_resources() argument
2052 struct pci_bus *parent = bridge->subordinate; in pci_assign_unassigned_bridge_resources()
2069 pci_bridge_distribute_available_resources(bridge, &add_list); in pci_assign_unassigned_bridge_resources()
2071 __pci_bridge_assign_resources(bridge, &add_list, &fail_head); in pci_assign_unassigned_bridge_resources()
2088 * Try to release leaf bridge's resources that aren't big enough in pci_assign_unassigned_bridge_resources()
2117 retval = pci_reenable_device(bridge); in pci_assign_unassigned_bridge_resources()
2119 pci_err(bridge, "Error reenabling bridge (%d)\n", retval); in pci_assign_unassigned_bridge_resources()
2120 pci_set_master(bridge); in pci_assign_unassigned_bridge_resources()
2124 int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type) in pci_reassign_bridge_resources() argument
2136 /* Walk to the root hub, releasing bridge BARs when possible */ in pci_reassign_bridge_resources()
2137 next = bridge; in pci_reassign_bridge_resources()
2139 bridge = next; in pci_reassign_bridge_resources()
2142 struct resource *res = &bridge->resource[i]; in pci_reassign_bridge_resources()
2151 ret = add_to_list(&saved, bridge, res, 0, 0); in pci_reassign_bridge_resources()
2155 pci_info(bridge, "BAR %d: releasing %pR\n", in pci_reassign_bridge_resources()
2167 next = bridge->bus ? bridge->bus->self : NULL; in pci_reassign_bridge_resources()
2175 __pci_bus_size_bridges(bridge->subordinate, &added); in pci_reassign_bridge_resources()
2176 __pci_bridge_assign_resources(bridge, &added, &failed); in pci_reassign_bridge_resources()
2185 /* Skip the bridge we just assigned resources for */ in pci_reassign_bridge_resources()
2186 if (bridge == dev_res->dev) in pci_reassign_bridge_resources()
2189 bridge = dev_res->dev; in pci_reassign_bridge_resources()
2190 pci_setup_bridge(bridge->subordinate); in pci_reassign_bridge_resources()
2212 bridge = dev_res->dev; in pci_reassign_bridge_resources()
2213 i = res - bridge->resource; in pci_reassign_bridge_resources()
2219 pci_claim_resource(bridge, i); in pci_reassign_bridge_resources()
2220 pci_setup_bridge(bridge->subordinate); in pci_reassign_bridge_resources()