1956 	int mps, mpss, p_mps, rc;  in pci_configure_mps()  local
1961 	/* MPS and MRRS fields are of type 'RsvdP' for VFs, short-circuit out */  in pci_configure_mps()
1971 			mps = 128;  in pci_configure_mps()
1973 			mps = 128 << dev->pcie_mpss;  in pci_configure_mps()
1974 		rc = pcie_set_mps(dev, mps);  in pci_configure_mps()
1977 				 mps);  in pci_configure_mps()
1985 	mps = pcie_get_mps(dev);  in pci_configure_mps()
1988 	if (mps == p_mps)  in pci_configure_mps()
1993 			 mps, pci_name(bridge), p_mps);  in pci_configure_mps()
1998 	 * Fancier MPS configuration is done later by  in pci_configure_mps()
2020 		 p_mps, mps, mpss);  in pci_configure_mps()
2635 	 * We don't have a way to change MPS settings on devices that have  in pcie_find_smpss()
2637 	 * MPS setting (MPS=128).  Therefore, if the fabric contains a bridge  in pcie_find_smpss()
2638 	 * where devices may be hot-added, we limit the fabric MPS to 128 so  in pcie_find_smpss()
2643 	 * the port.  We don't limit the MPS in this case because we can  in pcie_find_smpss()
2644 	 * reconfigure MPS on both the Root Port and the hot-added device,  in pcie_find_smpss()
2659 static void pcie_write_mps(struct pci_dev *dev, int mps)  in pcie_write_mps()  argument
2664 		mps = 128 << dev->pcie_mpss;  in pcie_write_mps()
2672 			 * the MRRS.  So, the MPS only needs to be configured  in pcie_write_mps()
2674 			 * walk from the top down and set the MPS of the child  in pcie_write_mps()
2677 			 * Configure the device MPS with the smaller of the  in pcie_write_mps()
2678 			 * device MPSS or the bridge MPS (which is assumed to be  in pcie_write_mps()
2680 			 * allowable MPS based on its parent bus).  in pcie_write_mps()
2682 			mps = min(mps, pcie_get_mps(dev->bus->self));  in pcie_write_mps()
2685 	rc = pcie_set_mps(dev, mps);  in pcie_write_mps()
2687 		pci_err(dev, "Failed attempting to set the MPS\n");  in pcie_write_mps()
2703 	 * value.  However, it cannot be configured larger than the MPS the  in pcie_write_mrrs()
2730 	int mps, orig_mps;  in pcie_bus_configure_set()  local
2739 	mps = 128 << *(u8 *)data;  in pcie_bus_configure_set()
2742 	pcie_write_mps(dev, mps);  in pcie_bus_configure_set()
2769 	 * to be aware of the MPS of the destination.  To work around this,  in pcie_bus_configure_settings()
2770 	 * simply force the MPS of the entire system to the smallest possible.  in pcie_bus_configure_settings()