45 	u16 *cap;  in pci_save_dpc_state()  local
54 	cap = (u16 *)&save_state->cap.data[0];  in pci_save_dpc_state()
55 	pci_read_config_word(dev, dev->dpc_cap + PCI_EXP_DPC_CTL, cap);  in pci_save_dpc_state()
61 	u16 *cap;  in pci_restore_dpc_state()  local
70 	cap = (u16 *)&save_state->cap.data[0];  in pci_restore_dpc_state()
71 	pci_write_config_word(dev, dev->dpc_cap + PCI_EXP_DPC_CTL, *cap);  in pci_restore_dpc_state()
77 	u16 cap = pdev->dpc_cap, status;  in dpc_wait_rp_inactive()  local
79 	pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);  in dpc_wait_rp_inactive()
83 		pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);  in dpc_wait_rp_inactive()
94 	u16 cap;  in dpc_reset_link()  local
100 	cap = pdev->dpc_cap;  in dpc_reset_link()
112 	pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,  in dpc_reset_link()
125 	u16 cap = pdev->dpc_cap, dpc_status, first_error;  in dpc_process_rp_pio_error()  local
129 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS, &status);  in dpc_process_rp_pio_error()
130 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_MASK, &mask);  in dpc_process_rp_pio_error()
134 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SEVERITY, &sev);  in dpc_process_rp_pio_error()
135 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SYSERROR, &syserr);  in dpc_process_rp_pio_error()
136 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_EXCEPTION, &exc);  in dpc_process_rp_pio_error()
141 	pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &dpc_status);  in dpc_process_rp_pio_error()
152 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG,  in dpc_process_rp_pio_error()
154 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 4,  in dpc_process_rp_pio_error()
156 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 8,  in dpc_process_rp_pio_error()
158 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 12,  in dpc_process_rp_pio_error()
165 	pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG, &log);  in dpc_process_rp_pio_error()
170 			cap + PCI_EXP_DPC_RP_PIO_TLPPREFIX_LOG, &prefix);  in dpc_process_rp_pio_error()
174 	pci_write_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS, status);  in dpc_process_rp_pio_error()
201 	u16 cap = pdev->dpc_cap, status, source, reason, ext_reason;  in dpc_process_error()  local
204 	pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);  in dpc_process_error()
205 	pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, &source);  in dpc_process_error()
247 	u16 cap = pdev->dpc_cap, status;  in dpc_irq()  local
249 	pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);  in dpc_irq()
254 	pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,  in dpc_irq()
263 	u16 cap;  in pci_dpc_init()  local
269 	pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CAP, &cap);  in pci_dpc_init()
270 	if (!(cap & PCI_EXP_DPC_CAP_RP_EXT))  in pci_dpc_init()
274 	pdev->dpc_rp_log_size = (cap & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8;  in pci_dpc_init()
288 	u16 ctl, cap;  in dpc_probe()  local
302 	pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CAP, &cap);  in dpc_probe()
310 		 cap & PCI_EXP_DPC_IRQ, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT),  in dpc_probe()
311 		 FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP),  in dpc_probe()
312 		 FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), pdev->dpc_rp_log_size,  in dpc_probe()
313 		 FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE));  in dpc_probe()