48 static inline struct pci_dev *ctrl_dev(struct controller *ctrl)  in ctrl_dev()  argument
50 	return ctrl->pcie->port;  in ctrl_dev()
57 static inline int pciehp_request_irq(struct controller *ctrl)  in pciehp_request_irq()  argument
59 	int retval, irq = ctrl->pcie->irq;  in pciehp_request_irq()
62 		ctrl->poll_thread = kthread_run(&pciehp_poll, ctrl,  in pciehp_request_irq()
64 						slot_name(ctrl));  in pciehp_request_irq()
65 		return PTR_ERR_OR_ZERO(ctrl->poll_thread);  in pciehp_request_irq()
70 				      IRQF_SHARED, "pciehp", ctrl);  in pciehp_request_irq()
72 		ctrl_err(ctrl, "Cannot get irq %d for the hotplug controller\n",  in pciehp_request_irq()
77 static inline void pciehp_free_irq(struct controller *ctrl)  in pciehp_free_irq()  argument
80 		kthread_stop(ctrl->poll_thread);  in pciehp_free_irq()
82 		free_irq(ctrl->pcie->irq, ctrl);  in pciehp_free_irq()
85 static int pcie_poll_cmd(struct controller *ctrl, int timeout)  in pcie_poll_cmd()  argument
87 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pcie_poll_cmd()
93 			ctrl_info(ctrl, "%s: no response from device\n",  in pcie_poll_cmd()
109 static void pcie_wait_cmd(struct controller *ctrl)  in pcie_wait_cmd()  argument
113 	unsigned long cmd_timeout = ctrl->cmd_started + duration;  in pcie_wait_cmd()
121 	if (NO_CMD_CMPL(ctrl))  in pcie_wait_cmd()
124 	if (!ctrl->cmd_busy)  in pcie_wait_cmd()
137 	if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE &&  in pcie_wait_cmd()
138 	    ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE)  in pcie_wait_cmd()
139 		rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout);  in pcie_wait_cmd()
141 		rc = pcie_poll_cmd(ctrl, jiffies_to_msecs(timeout));  in pcie_wait_cmd()
144 		ctrl_info(ctrl, "Timeout on hotplug command %#06x (issued %u msec ago)\n",  in pcie_wait_cmd()
145 			  ctrl->slot_ctrl,  in pcie_wait_cmd()
146 			  jiffies_to_msecs(jiffies - ctrl->cmd_started));  in pcie_wait_cmd()
154 static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd,  in pcie_do_write_cmd()  argument
157 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pcie_do_write_cmd()
160 	mutex_lock(&ctrl->ctrl_lock);  in pcie_do_write_cmd()
165 	pcie_wait_cmd(ctrl);  in pcie_do_write_cmd()
169 		ctrl_info(ctrl, "%s: no response from device\n", __func__);  in pcie_do_write_cmd()
176 	ctrl->cmd_busy = 1;  in pcie_do_write_cmd()
178 	ctrl->slot_ctrl = slot_ctrl;  in pcie_do_write_cmd()
180 	ctrl->cmd_started = jiffies;  in pcie_do_write_cmd()
191 		ctrl->cmd_busy = 0;  in pcie_do_write_cmd()
198 		pcie_wait_cmd(ctrl);  in pcie_do_write_cmd()
201 	mutex_unlock(&ctrl->ctrl_lock);  in pcie_do_write_cmd()
206  * @ctrl: controller to which the command is issued
210 static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)  in pcie_write_cmd()  argument
212 	pcie_do_write_cmd(ctrl, cmd, mask, true);  in pcie_write_cmd()
216 static void pcie_write_cmd_nowait(struct controller *ctrl, u16 cmd, u16 mask)  in pcie_write_cmd_nowait()  argument
218 	pcie_do_write_cmd(ctrl, cmd, mask, false);  in pcie_write_cmd_nowait()
223  * @ctrl: PCIe hotplug controller
232 int pciehp_check_link_active(struct controller *ctrl)  in pciehp_check_link_active()  argument
234 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_check_link_active()
243 	ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status);  in pciehp_check_link_active()
288 int pciehp_check_link_status(struct controller *ctrl)  in pciehp_check_link_status()  argument
290 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_check_link_status()
295 		ctrl_info(ctrl, "Slot(%s): No link\n", slot_name(ctrl));  in pciehp_check_link_status()
299 	if (ctrl->inband_presence_disabled)  in pciehp_check_link_status()
302 	found = pci_bus_check_dev(ctrl->pcie->port->subordinate,  in pciehp_check_link_status()
308 			   &ctrl->pending_events);  in pciehp_check_link_status()
311 	ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status);  in pciehp_check_link_status()
314 		ctrl_info(ctrl, "Slot(%s): Cannot train link: status %#06x\n",  in pciehp_check_link_status()
315 			  slot_name(ctrl), lnk_status);  in pciehp_check_link_status()
319 	pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status);  in pciehp_check_link_status()
322 		ctrl_info(ctrl, "Slot(%s): No device found\n",  in pciehp_check_link_status()
323 			  slot_name(ctrl));  in pciehp_check_link_status()
330 static int __pciehp_link_set(struct controller *ctrl, bool enable)  in __pciehp_link_set()  argument
332 	struct pci_dev *pdev = ctrl_dev(ctrl);  in __pciehp_link_set()
343 	ctrl_dbg(ctrl, "%s: lnk_ctrl = %x\n", __func__, lnk_ctrl);  in __pciehp_link_set()
347 static int pciehp_link_enable(struct controller *ctrl)  in pciehp_link_enable()  argument
349 	return __pciehp_link_set(ctrl, true);  in pciehp_link_enable()
355 	struct controller *ctrl = to_ctrl(hotplug_slot);  in pciehp_get_raw_indicator_status()  local
356 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_get_raw_indicator_status()
368 	struct controller *ctrl = to_ctrl(hotplug_slot);  in pciehp_get_attention_status()  local
369 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_get_attention_status()
375 	ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__,  in pciehp_get_attention_status()
376 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);  in pciehp_get_attention_status()
396 void pciehp_get_power_status(struct controller *ctrl, u8 *status)  in pciehp_get_power_status()  argument
398 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_get_power_status()
402 	ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__,  in pciehp_get_power_status()
403 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);  in pciehp_get_power_status()
418 void pciehp_get_latch_status(struct controller *ctrl, u8 *status)  in pciehp_get_latch_status()  argument
420 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_get_latch_status()
429  * @ctrl: PCIe hotplug controller
439 int pciehp_card_present(struct controller *ctrl)  in pciehp_card_present()  argument
441 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_card_present()
454  * @ctrl: PCIe hotplug controller
464 int pciehp_card_present_or_link_active(struct controller *ctrl)  in pciehp_card_present_or_link_active()  argument
468 	ret = pciehp_card_present(ctrl);  in pciehp_card_present_or_link_active()
472 	return pciehp_check_link_active(ctrl);  in pciehp_card_present_or_link_active()
475 int pciehp_query_power_fault(struct controller *ctrl)  in pciehp_query_power_fault()  argument
477 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_query_power_fault()
487 	struct controller *ctrl = to_ctrl(hotplug_slot);  in pciehp_set_raw_indicator_status()  local
488 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_set_raw_indicator_status()
491 	pcie_write_cmd_nowait(ctrl, status << 6,  in pciehp_set_raw_indicator_status()
499  * @ctrl: PCIe hotplug controller
512 void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn)  in pciehp_set_indicators()  argument
516 	if (PWR_LED(ctrl) && pwr != INDICATOR_NOOP) {  in pciehp_set_indicators()
521 	if (ATTN_LED(ctrl) && attn != INDICATOR_NOOP) {  in pciehp_set_indicators()
527 		pcie_write_cmd_nowait(ctrl, cmd, mask);  in pciehp_set_indicators()
528 		ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,  in pciehp_set_indicators()
529 			 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd);  in pciehp_set_indicators()
533 int pciehp_power_on_slot(struct controller *ctrl)  in pciehp_power_on_slot()  argument
535 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_power_on_slot()
544 	ctrl->power_fault_detected = 0;  in pciehp_power_on_slot()
546 	pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_ON, PCI_EXP_SLTCTL_PCC);  in pciehp_power_on_slot()
547 	ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,  in pciehp_power_on_slot()
548 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,  in pciehp_power_on_slot()
551 	retval = pciehp_link_enable(ctrl);  in pciehp_power_on_slot()
553 		ctrl_err(ctrl, "%s: Can not enable the link!\n", __func__);  in pciehp_power_on_slot()
558 void pciehp_power_off_slot(struct controller *ctrl)  in pciehp_power_off_slot()  argument
560 	pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC);  in pciehp_power_off_slot()
561 	ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,  in pciehp_power_off_slot()
562 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,  in pciehp_power_off_slot()
568 	struct controller *ctrl = (struct controller *)dev_id;  in pciehp_isr()  local
569 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_isr()
578 	    (!(ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE) && !pciehp_poll_mode))  in pciehp_isr()
591 			atomic_or(RERUN_ISR, &ctrl->pending_events);  in pciehp_isr()
599 		ctrl_info(ctrl, "%s: no response from device\n", __func__);  in pciehp_isr()
617 	if (ctrl->power_fault_detected)  in pciehp_isr()
640 	ctrl_dbg(ctrl, "pending interrupts %#06x from Slot Status\n", events);  in pciehp_isr()
649 		ctrl->cmd_busy = 0;  in pciehp_isr()
651 		wake_up(&ctrl->queue);  in pciehp_isr()
660 		ctrl_dbg(ctrl, "ignoring hotplug event %#06x\n", events);  in pciehp_isr()
665 	atomic_or(events, &ctrl->pending_events);  in pciehp_isr()
671 	struct controller *ctrl = (struct controller *)dev_id;  in pciehp_ist()  local
672 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_ist()
676 	ctrl->ist_running = true;  in pciehp_ist()
680 	if (atomic_fetch_and(~RERUN_ISR, &ctrl->pending_events) & RERUN_ISR) {  in pciehp_ist()
688 	events = atomic_xchg(&ctrl->pending_events, 0);  in pciehp_ist()
696 		ctrl_info(ctrl, "Slot(%s): Attention button pressed\n",  in pciehp_ist()
697 			  slot_name(ctrl));  in pciehp_ist()
698 		pciehp_handle_button_press(ctrl);  in pciehp_ist()
702 	if ((events & PCI_EXP_SLTSTA_PFD) && !ctrl->power_fault_detected) {  in pciehp_ist()
703 		ctrl->power_fault_detected = 1;  in pciehp_ist()
704 		ctrl_err(ctrl, "Slot(%s): Power fault\n", slot_name(ctrl));  in pciehp_ist()
705 		pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,  in pciehp_ist()
713 	down_read(&ctrl->reset_lock);  in pciehp_ist()
715 		pciehp_handle_disable_request(ctrl);  in pciehp_ist()
717 		pciehp_handle_presence_or_link_change(ctrl, events);  in pciehp_ist()
718 	up_read(&ctrl->reset_lock);  in pciehp_ist()
723 	ctrl->ist_running = false;  in pciehp_ist()
724 	wake_up(&ctrl->requester);  in pciehp_ist()
730 	struct controller *ctrl = data;  in pciehp_poll()  local
736 		while (pciehp_isr(IRQ_NOTCONNECTED, ctrl) == IRQ_WAKE_THREAD ||  in pciehp_poll()
737 		       atomic_read(&ctrl->pending_events))  in pciehp_poll()
738 			pciehp_ist(IRQ_NOTCONNECTED, ctrl);  in pciehp_poll()
749 static void pcie_enable_notification(struct controller *ctrl)  in pcie_enable_notification()  argument
770 	if (ATTN_BUTTN(ctrl))  in pcie_enable_notification()
782 	pcie_write_cmd_nowait(ctrl, cmd, mask);  in pcie_enable_notification()
783 	ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,  in pcie_enable_notification()
784 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd);  in pcie_enable_notification()
787 static void pcie_disable_notification(struct controller *ctrl)  in pcie_disable_notification()  argument
795 	pcie_write_cmd(ctrl, 0, mask);  in pcie_disable_notification()
796 	ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,  in pcie_disable_notification()
797 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0);  in pcie_disable_notification()
800 void pcie_clear_hotplug_events(struct controller *ctrl)  in pcie_clear_hotplug_events()  argument
802 	pcie_capability_write_word(ctrl_dev(ctrl), PCI_EXP_SLTSTA,  in pcie_clear_hotplug_events()
806 void pcie_enable_interrupt(struct controller *ctrl)  in pcie_enable_interrupt()  argument
811 	pcie_write_cmd(ctrl, mask, mask);  in pcie_enable_interrupt()
814 void pcie_disable_interrupt(struct controller *ctrl)  in pcie_disable_interrupt()  argument
826 	pcie_write_cmd(ctrl, 0, mask);  in pcie_disable_interrupt()
839 	struct controller *ctrl = to_ctrl(hotplug_slot);  in pciehp_reset_slot()  local
840 	struct pci_dev *pdev = ctrl_dev(ctrl);  in pciehp_reset_slot()
847 	down_write(&ctrl->reset_lock);  in pciehp_reset_slot()
849 	if (!ATTN_BUTTN(ctrl)) {  in pciehp_reset_slot()
856 	pcie_write_cmd(ctrl, 0, ctrl_mask);  in pciehp_reset_slot()
857 	ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,  in pciehp_reset_slot()
858 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0);  in pciehp_reset_slot()
860 	rc = pci_bridge_secondary_bus_reset(ctrl->pcie->port);  in pciehp_reset_slot()
863 	pcie_write_cmd_nowait(ctrl, ctrl_mask, ctrl_mask);  in pciehp_reset_slot()
864 	ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,  in pciehp_reset_slot()
865 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask);  in pciehp_reset_slot()
867 	up_write(&ctrl->reset_lock);  in pciehp_reset_slot()
871 int pcie_init_notification(struct controller *ctrl)  in pcie_init_notification()  argument
873 	if (pciehp_request_irq(ctrl))  in pcie_init_notification()
875 	pcie_enable_notification(ctrl);  in pcie_init_notification()
876 	ctrl->notification_enabled = 1;  in pcie_init_notification()
880 void pcie_shutdown_notification(struct controller *ctrl)  in pcie_shutdown_notification()  argument
882 	if (ctrl->notification_enabled) {  in pcie_shutdown_notification()
883 		pcie_disable_notification(ctrl);  in pcie_shutdown_notification()
884 		pciehp_free_irq(ctrl);  in pcie_shutdown_notification()
885 		ctrl->notification_enabled = 0;  in pcie_shutdown_notification()
889 static inline void dbg_ctrl(struct controller *ctrl)  in dbg_ctrl()  argument
891 	struct pci_dev *pdev = ctrl->pcie->port;  in dbg_ctrl()
894 	ctrl_dbg(ctrl, "Slot Capabilities      : 0x%08x\n", ctrl->slot_cap);  in dbg_ctrl()
896 	ctrl_dbg(ctrl, "Slot Status            : 0x%04x\n", reg16);  in dbg_ctrl()
898 	ctrl_dbg(ctrl, "Slot Control           : 0x%04x\n", reg16);  in dbg_ctrl()
905 	struct controller *ctrl;  in pcie_init()  local
911 	ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);  in pcie_init()
912 	if (!ctrl)  in pcie_init()
915 	ctrl->pcie = dev;  in pcie_init()
928 	ctrl->slot_cap = slot_cap;  in pcie_init()
929 	mutex_init(&ctrl->ctrl_lock);  in pcie_init()
930 	mutex_init(&ctrl->state_lock);  in pcie_init()
931 	init_rwsem(&ctrl->reset_lock);  in pcie_init()
932 	init_waitqueue_head(&ctrl->requester);  in pcie_init()
933 	init_waitqueue_head(&ctrl->queue);  in pcie_init()
934 	INIT_DELAYED_WORK(&ctrl->button_work, pciehp_queue_pushbutton_work);  in pcie_init()
935 	dbg_ctrl(ctrl);  in pcie_init()
938 	ctrl->state = list_empty(&subordinate->devices) ? OFF_STATE : ON_STATE;  in pcie_init()
943 		pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_IBPD_DISABLE,  in pcie_init()
945 		ctrl->inband_presence_disabled = 1;  in pcie_init()
949 		ctrl->inband_presence_disabled = 1;  in pcie_init()
960 …ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interl…  in pcie_init()
979 	if (POWER_CTRL(ctrl)) {  in pcie_init()
980 		pciehp_get_power_status(ctrl, &poweron);  in pcie_init()
981 		if (!pciehp_card_present_or_link_active(ctrl) && poweron) {  in pcie_init()
982 			pcie_disable_notification(ctrl);  in pcie_init()
983 			pciehp_power_off_slot(ctrl);  in pcie_init()
987 	return ctrl;  in pcie_init()
990 void pciehp_release_ctrl(struct controller *ctrl)  in pciehp_release_ctrl()  argument
992 	cancel_delayed_work_sync(&ctrl->button_work);  in pciehp_release_ctrl()
993 	kfree(ctrl);  in pciehp_release_ctrl()