Lines Matching full:msi
9 #include <linux/msi.h>
34 /* Size of each MSI address region */
52 * iProc MSI group
54 * One MSI group is allocated per GIC interrupt, serviced by one iProc MSI
57 * @msi: pointer to iProc MSI data
62 struct iproc_msi *msi; member
68 * iProc event queue based MSI
70 * Only meant to be used on platforms without MSI support integrated into the
74 * @reg_offsets: MSI register offsets
75 * @grps: MSI groups
78 * @has_inten_reg: indicates the MSI interrupt enable register needs to be
80 * @bitmap: MSI vector bitmap
81 * @bitmap_lock: lock to protect access to the MSI bitmap
82 * @nr_msi_vecs: total number of MSI vectors
84 * @msi_domain: MSI IRQ domain
85 * @nr_eq_region: required number of 4K aligned memory region for MSI event
87 * @nr_msi_region: required number of 4K aligned address region for MSI posted
89 * @eq_cpu: pointer to allocated memory region for MSI event queues
90 * @eq_dma: DMA address of MSI event queues
91 * @msi_addr: MSI address
128 static inline u32 iproc_msi_read_reg(struct iproc_msi *msi, in iproc_msi_read_reg() argument
132 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_read_reg()
134 return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_read_reg()
137 static inline void iproc_msi_write_reg(struct iproc_msi *msi, in iproc_msi_write_reg() argument
141 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_write_reg()
143 writel_relaxed(val, pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_write_reg()
146 static inline u32 hwirq_to_group(struct iproc_msi *msi, unsigned long hwirq) in hwirq_to_group() argument
148 return (hwirq % msi->nr_irqs); in hwirq_to_group()
151 static inline unsigned int iproc_msi_addr_offset(struct iproc_msi *msi, in iproc_msi_addr_offset() argument
154 if (msi->nr_msi_region > 1) in iproc_msi_addr_offset()
155 return hwirq_to_group(msi, hwirq) * MSI_MEM_REGION_SIZE; in iproc_msi_addr_offset()
157 return hwirq_to_group(msi, hwirq) * sizeof(u32); in iproc_msi_addr_offset()
160 static inline unsigned int iproc_msi_eq_offset(struct iproc_msi *msi, u32 eq) in iproc_msi_eq_offset() argument
162 if (msi->nr_eq_region > 1) in iproc_msi_eq_offset()
169 .name = "iProc-MSI",
179 * In iProc PCIe core, each MSI group is serviced by a GIC interrupt and a
180 * dedicated event queue. Each MSI group can support up to 64 MSI vectors.
182 * The number of MSI groups varies between different iProc SoCs. The total
183 * number of CPU cores also varies. To support MSI IRQ affinity, we
184 * distribute GIC interrupts across all available CPUs. MSI vector is moved
188 * - the number of MSI groups is M
192 * Total number of raw MSI vectors = M * 64
193 * Total number of supported MSI vectors = (M * 64) / N
195 static inline int hwirq_to_cpu(struct iproc_msi *msi, unsigned long hwirq) in hwirq_to_cpu() argument
197 return (hwirq % msi->nr_cpus); in hwirq_to_cpu()
200 static inline unsigned long hwirq_to_canonical_hwirq(struct iproc_msi *msi, in hwirq_to_canonical_hwirq() argument
203 return (hwirq - hwirq_to_cpu(msi, hwirq)); in hwirq_to_canonical_hwirq()
209 struct iproc_msi *msi = irq_data_get_irq_chip_data(data); in iproc_msi_irq_set_affinity() local
214 curr_cpu = hwirq_to_cpu(msi, data->hwirq); in iproc_msi_irq_set_affinity()
218 /* steer MSI to the target CPU */ in iproc_msi_irq_set_affinity()
219 data->hwirq = hwirq_to_canonical_hwirq(msi, data->hwirq) + target_cpu; in iproc_msi_irq_set_affinity()
231 struct iproc_msi *msi = irq_data_get_irq_chip_data(data); in iproc_msi_irq_compose_msi_msg() local
234 addr = msi->msi_addr + iproc_msi_addr_offset(msi, data->hwirq); in iproc_msi_irq_compose_msi_msg()
241 .name = "MSI",
250 struct iproc_msi *msi = domain->host_data; in iproc_msi_irq_domain_alloc() local
253 mutex_lock(&msi->bitmap_lock); in iproc_msi_irq_domain_alloc()
255 /* Allocate 'nr_cpus' number of MSI vectors each time */ in iproc_msi_irq_domain_alloc()
256 hwirq = bitmap_find_next_zero_area(msi->bitmap, msi->nr_msi_vecs, 0, in iproc_msi_irq_domain_alloc()
257 msi->nr_cpus, 0); in iproc_msi_irq_domain_alloc()
258 if (hwirq < msi->nr_msi_vecs) { in iproc_msi_irq_domain_alloc()
259 bitmap_set(msi->bitmap, hwirq, msi->nr_cpus); in iproc_msi_irq_domain_alloc()
261 mutex_unlock(&msi->bitmap_lock); in iproc_msi_irq_domain_alloc()
265 mutex_unlock(&msi->bitmap_lock); in iproc_msi_irq_domain_alloc()
281 struct iproc_msi *msi = irq_data_get_irq_chip_data(data); in iproc_msi_irq_domain_free() local
284 mutex_lock(&msi->bitmap_lock); in iproc_msi_irq_domain_free()
286 hwirq = hwirq_to_canonical_hwirq(msi, data->hwirq); in iproc_msi_irq_domain_free()
287 bitmap_clear(msi->bitmap, hwirq, msi->nr_cpus); in iproc_msi_irq_domain_free()
289 mutex_unlock(&msi->bitmap_lock); in iproc_msi_irq_domain_free()
299 static inline u32 decode_msi_hwirq(struct iproc_msi *msi, u32 eq, u32 head) in decode_msi_hwirq() argument
305 offs = iproc_msi_eq_offset(msi, eq) + head * sizeof(u32); in decode_msi_hwirq()
306 msg = (u32 __iomem *)(msi->eq_cpu + offs); in decode_msi_hwirq()
311 * Since we have multiple hwirq mapped to a single MSI vector, in decode_msi_hwirq()
315 return hwirq_to_canonical_hwirq(msi, hwirq); in decode_msi_hwirq()
322 struct iproc_msi *msi; in iproc_msi_handler() local
330 msi = grp->msi; in iproc_msi_handler()
334 * iProc MSI event queue is tracked by head and tail pointers. Head in iproc_msi_handler()
335 * pointer indicates the next entry (MSI data) to be consumed by SW in in iproc_msi_handler()
336 * the queue and needs to be updated by SW. iProc MSI core uses the in iproc_msi_handler()
339 * Entries between head and tail pointers contain valid MSI data. MSI in iproc_msi_handler()
341 * pointer is updated by the iProc MSI core. in iproc_msi_handler()
343 head = iproc_msi_read_reg(msi, IPROC_MSI_EQ_HEAD, in iproc_msi_handler()
346 tail = iproc_msi_read_reg(msi, IPROC_MSI_EQ_TAIL, in iproc_msi_handler()
350 * Figure out total number of events (MSI data) to be in iproc_msi_handler()
360 hwirq = decode_msi_hwirq(msi, eq, head); in iproc_msi_handler()
361 virq = irq_find_mapping(msi->inner_domain, hwirq); in iproc_msi_handler()
372 iproc_msi_write_reg(msi, IPROC_MSI_EQ_HEAD, eq, head); in iproc_msi_handler()
383 static void iproc_msi_enable(struct iproc_msi *msi) in iproc_msi_enable() argument
389 for (i = 0; i < msi->nr_eq_region; i++) { in iproc_msi_enable()
390 dma_addr_t addr = msi->eq_dma + (i * EQ_MEM_REGION_SIZE); in iproc_msi_enable()
392 iproc_msi_write_reg(msi, IPROC_MSI_EQ_PAGE, i, in iproc_msi_enable()
394 iproc_msi_write_reg(msi, IPROC_MSI_EQ_PAGE_UPPER, i, in iproc_msi_enable()
398 /* Program address region for MSI posted writes */ in iproc_msi_enable()
399 for (i = 0; i < msi->nr_msi_region; i++) { in iproc_msi_enable()
400 phys_addr_t addr = msi->msi_addr + (i * MSI_MEM_REGION_SIZE); in iproc_msi_enable()
402 iproc_msi_write_reg(msi, IPROC_MSI_PAGE, i, in iproc_msi_enable()
404 iproc_msi_write_reg(msi, IPROC_MSI_PAGE_UPPER, i, in iproc_msi_enable()
408 for (eq = 0; eq < msi->nr_irqs; eq++) { in iproc_msi_enable()
409 /* Enable MSI event queue */ in iproc_msi_enable()
412 iproc_msi_write_reg(msi, IPROC_MSI_CTRL, eq, val); in iproc_msi_enable()
415 * Some legacy platforms require the MSI interrupt enable in iproc_msi_enable()
418 if (msi->has_inten_reg) { in iproc_msi_enable()
419 val = iproc_msi_read_reg(msi, IPROC_MSI_INTS_EN, eq); in iproc_msi_enable()
421 iproc_msi_write_reg(msi, IPROC_MSI_INTS_EN, eq, val); in iproc_msi_enable()
426 static void iproc_msi_disable(struct iproc_msi *msi) in iproc_msi_disable() argument
430 for (eq = 0; eq < msi->nr_irqs; eq++) { in iproc_msi_disable()
431 if (msi->has_inten_reg) { in iproc_msi_disable()
432 val = iproc_msi_read_reg(msi, IPROC_MSI_INTS_EN, eq); in iproc_msi_disable()
434 iproc_msi_write_reg(msi, IPROC_MSI_INTS_EN, eq, val); in iproc_msi_disable()
437 val = iproc_msi_read_reg(msi, IPROC_MSI_CTRL, eq); in iproc_msi_disable()
440 iproc_msi_write_reg(msi, IPROC_MSI_CTRL, eq, val); in iproc_msi_disable()
445 struct iproc_msi *msi) in iproc_msi_alloc_domains() argument
447 msi->inner_domain = irq_domain_add_linear(NULL, msi->nr_msi_vecs, in iproc_msi_alloc_domains()
448 &msi_domain_ops, msi); in iproc_msi_alloc_domains()
449 if (!msi->inner_domain) in iproc_msi_alloc_domains()
452 msi->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node), in iproc_msi_alloc_domains()
454 msi->inner_domain); in iproc_msi_alloc_domains()
455 if (!msi->msi_domain) { in iproc_msi_alloc_domains()
456 irq_domain_remove(msi->inner_domain); in iproc_msi_alloc_domains()
463 static void iproc_msi_free_domains(struct iproc_msi *msi) in iproc_msi_free_domains() argument
465 if (msi->msi_domain) in iproc_msi_free_domains()
466 irq_domain_remove(msi->msi_domain); in iproc_msi_free_domains()
468 if (msi->inner_domain) in iproc_msi_free_domains()
469 irq_domain_remove(msi->inner_domain); in iproc_msi_free_domains()
472 static void iproc_msi_irq_free(struct iproc_msi *msi, unsigned int cpu) in iproc_msi_irq_free() argument
476 for (i = cpu; i < msi->nr_irqs; i += msi->nr_cpus) { in iproc_msi_irq_free()
477 irq_set_chained_handler_and_data(msi->grps[i].gic_irq, in iproc_msi_irq_free()
482 static int iproc_msi_irq_setup(struct iproc_msi *msi, unsigned int cpu) in iproc_msi_irq_setup() argument
486 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_irq_setup()
488 for (i = cpu; i < msi->nr_irqs; i += msi->nr_cpus) { in iproc_msi_irq_setup()
489 irq_set_chained_handler_and_data(msi->grps[i].gic_irq, in iproc_msi_irq_setup()
491 &msi->grps[i]); in iproc_msi_irq_setup()
496 ret = irq_set_affinity(msi->grps[i].gic_irq, mask); in iproc_msi_irq_setup()
500 msi->grps[i].gic_irq); in iproc_msi_irq_setup()
509 iproc_msi_irq_free(msi, cpu); in iproc_msi_irq_setup()
519 struct iproc_msi *msi; in iproc_msi_init() local
523 if (!of_device_is_compatible(node, "brcm,iproc-msi")) in iproc_msi_init()
526 if (!of_find_property(node, "msi-controller", NULL)) in iproc_msi_init()
529 if (pcie->msi) in iproc_msi_init()
532 msi = devm_kzalloc(pcie->dev, sizeof(*msi), GFP_KERNEL); in iproc_msi_init()
533 if (!msi) in iproc_msi_init()
536 msi->pcie = pcie; in iproc_msi_init()
537 pcie->msi = msi; in iproc_msi_init()
538 msi->msi_addr = pcie->base_addr; in iproc_msi_init()
539 mutex_init(&msi->bitmap_lock); in iproc_msi_init()
540 msi->nr_cpus = num_possible_cpus(); in iproc_msi_init()
542 msi->nr_irqs = of_irq_count(node); in iproc_msi_init()
543 if (!msi->nr_irqs) { in iproc_msi_init()
544 dev_err(pcie->dev, "found no MSI GIC interrupt\n"); in iproc_msi_init()
548 if (msi->nr_irqs > NR_HW_IRQS) { in iproc_msi_init()
549 dev_warn(pcie->dev, "too many MSI GIC interrupts defined %d\n", in iproc_msi_init()
550 msi->nr_irqs); in iproc_msi_init()
551 msi->nr_irqs = NR_HW_IRQS; in iproc_msi_init()
554 if (msi->nr_irqs < msi->nr_cpus) { in iproc_msi_init()
556 "not enough GIC interrupts for MSI affinity\n"); in iproc_msi_init()
560 if (msi->nr_irqs % msi->nr_cpus != 0) { in iproc_msi_init()
561 msi->nr_irqs -= msi->nr_irqs % msi->nr_cpus; in iproc_msi_init()
563 msi->nr_irqs); in iproc_msi_init()
569 msi->reg_offsets = iproc_msi_reg_paxb; in iproc_msi_init()
570 msi->nr_eq_region = 1; in iproc_msi_init()
571 msi->nr_msi_region = 1; in iproc_msi_init()
574 msi->reg_offsets = iproc_msi_reg_paxc; in iproc_msi_init()
575 msi->nr_eq_region = msi->nr_irqs; in iproc_msi_init()
576 msi->nr_msi_region = msi->nr_irqs; in iproc_msi_init()
583 if (of_find_property(node, "brcm,pcie-msi-inten", NULL)) in iproc_msi_init()
584 msi->has_inten_reg = true; in iproc_msi_init()
586 msi->nr_msi_vecs = msi->nr_irqs * EQ_LEN; in iproc_msi_init()
587 msi->bitmap = devm_kcalloc(pcie->dev, BITS_TO_LONGS(msi->nr_msi_vecs), in iproc_msi_init()
588 sizeof(*msi->bitmap), GFP_KERNEL); in iproc_msi_init()
589 if (!msi->bitmap) in iproc_msi_init()
592 msi->grps = devm_kcalloc(pcie->dev, msi->nr_irqs, sizeof(*msi->grps), in iproc_msi_init()
594 if (!msi->grps) in iproc_msi_init()
597 for (i = 0; i < msi->nr_irqs; i++) { in iproc_msi_init()
605 msi->grps[i].gic_irq = irq; in iproc_msi_init()
606 msi->grps[i].msi = msi; in iproc_msi_init()
607 msi->grps[i].eq = i; in iproc_msi_init()
611 msi->eq_cpu = dma_alloc_coherent(pcie->dev, in iproc_msi_init()
612 msi->nr_eq_region * EQ_MEM_REGION_SIZE, in iproc_msi_init()
613 &msi->eq_dma, GFP_KERNEL); in iproc_msi_init()
614 if (!msi->eq_cpu) { in iproc_msi_init()
619 ret = iproc_msi_alloc_domains(node, msi); in iproc_msi_init()
621 dev_err(pcie->dev, "failed to create MSI domains\n"); in iproc_msi_init()
626 ret = iproc_msi_irq_setup(msi, cpu); in iproc_msi_init()
631 iproc_msi_enable(msi); in iproc_msi_init()
637 iproc_msi_irq_free(msi, cpu); in iproc_msi_init()
638 iproc_msi_free_domains(msi); in iproc_msi_init()
641 dma_free_coherent(pcie->dev, msi->nr_eq_region * EQ_MEM_REGION_SIZE, in iproc_msi_init()
642 msi->eq_cpu, msi->eq_dma); in iproc_msi_init()
645 for (i = 0; i < msi->nr_irqs; i++) { in iproc_msi_init()
646 if (msi->grps[i].gic_irq) in iproc_msi_init()
647 irq_dispose_mapping(msi->grps[i].gic_irq); in iproc_msi_init()
649 pcie->msi = NULL; in iproc_msi_init()
656 struct iproc_msi *msi = pcie->msi; in iproc_msi_exit() local
659 if (!msi) in iproc_msi_exit()
662 iproc_msi_disable(msi); in iproc_msi_exit()
665 iproc_msi_irq_free(msi, cpu); in iproc_msi_exit()
667 iproc_msi_free_domains(msi); in iproc_msi_exit()
669 dma_free_coherent(pcie->dev, msi->nr_eq_region * EQ_MEM_REGION_SIZE, in iproc_msi_exit()
670 msi->eq_cpu, msi->eq_dma); in iproc_msi_exit()
672 for (i = 0; i < msi->nr_irqs; i++) { in iproc_msi_exit()
673 if (msi->grps[i].gic_irq) in iproc_msi_exit()
674 irq_dispose_mapping(msi->grps[i].gic_irq); in iproc_msi_exit()