6  * Description: Altera PCIe host controller driver
45 #define S10_RP_CFG_ADDR(pcie, reg)	\  argument
46 	(((pcie)->hip_base) + (reg) + (1 << 20))
47 #define S10_RP_SECONDARY(pcie)		\  argument
48 	readb(S10_RP_CFG_ADDR(pcie, PCI_SECONDARY_BUS))
60 #define TLP_CFG_DW0(pcie, cfg)		\  argument
63 #define TLP_CFG_DW1(pcie, tag, be)	\  argument
64 	(((TLP_REQ_ID(pcie->root_bus_nr,  RP_DEVFN)) << 16) | (tag << 8) | (be))
99 	int (*tlp_read_pkt)(struct altera_pcie *pcie, u32 *value);
100 	void (*tlp_write_pkt)(struct altera_pcie *pcie, u32 *headers,
102 	bool (*get_link_status)(struct altera_pcie *pcie);
103 	int (*rp_read_cfg)(struct altera_pcie *pcie, int where,
105 	int (*rp_write_cfg)(struct altera_pcie *pcie, u8 busno,
112 	u32 cap_offset;		/* PCIe capability structure register offset */
125 static inline void cra_writel(struct altera_pcie *pcie, const u32 value,  in cra_writel()  argument
128 	writel_relaxed(value, pcie->cra_base + reg);  in cra_writel()
131 static inline u32 cra_readl(struct altera_pcie *pcie, const u32 reg)  in cra_readl()  argument
133 	return readl_relaxed(pcie->cra_base + reg);  in cra_readl()
136 static bool altera_pcie_link_up(struct altera_pcie *pcie)  in altera_pcie_link_up()  argument
138 	return !!((cra_readl(pcie, RP_LTSSM) & RP_LTSSM_MASK) == LTSSM_L0);  in altera_pcie_link_up()
141 static bool s10_altera_pcie_link_up(struct altera_pcie *pcie)  in s10_altera_pcie_link_up()  argument
143 	void __iomem *addr = S10_RP_CFG_ADDR(pcie,  in s10_altera_pcie_link_up()
144 				   pcie->pcie_data->cap_offset +  in s10_altera_pcie_link_up()
151  * Altera PCIe port uses BAR0 of RC's configuration space as the translation
152  * from PCI bus to native BUS.  Entire DDR region is mapped into PCIe space
157  * allocation by PCIe core.
169 static void tlp_write_tx(struct altera_pcie *pcie,  in tlp_write_tx()  argument
172 	cra_writel(pcie, tlp_rp_regdata->reg0, RP_TX_REG0);  in tlp_write_tx()
173 	cra_writel(pcie, tlp_rp_regdata->reg1, RP_TX_REG1);  in tlp_write_tx()
174 	cra_writel(pcie, tlp_rp_regdata->ctrl, RP_TX_CNTRL);  in tlp_write_tx()
177 static void s10_tlp_write_tx(struct altera_pcie *pcie, u32 reg0, u32 ctrl)  in s10_tlp_write_tx()  argument
179 	cra_writel(pcie, reg0, RP_TX_REG0);  in s10_tlp_write_tx()
180 	cra_writel(pcie, ctrl, S10_RP_TX_CNTRL);  in s10_tlp_write_tx()
183 static bool altera_pcie_valid_device(struct altera_pcie *pcie,  in altera_pcie_valid_device()  argument
187 	if (bus->number != pcie->root_bus_nr) {  in altera_pcie_valid_device()
188 		if (!pcie->pcie_data->ops->get_link_status(pcie))  in altera_pcie_valid_device()
193 	if (bus->number == pcie->root_bus_nr && dev > 0)  in altera_pcie_valid_device()
199 static int tlp_read_packet(struct altera_pcie *pcie, u32 *value)  in tlp_read_packet()  argument
212 		ctrl = cra_readl(pcie, RP_RXCPL_STATUS);  in tlp_read_packet()
214 			reg0 = cra_readl(pcie, RP_RXCPL_REG0);  in tlp_read_packet()
215 			reg1 = cra_readl(pcie, RP_RXCPL_REG1);  in tlp_read_packet()
238 static int s10_tlp_read_packet(struct altera_pcie *pcie, u32 *value)  in s10_tlp_read_packet()  argument
244 	struct device *dev = &pcie->pdev->dev;  in s10_tlp_read_packet()
247 		ctrl = cra_readl(pcie, S10_RP_RXCPL_STATUS);  in s10_tlp_read_packet()
250 			dw[0] = cra_readl(pcie, S10_RP_RXCPL_REG);  in s10_tlp_read_packet()
265 		ctrl = cra_readl(pcie, S10_RP_RXCPL_STATUS);  in s10_tlp_read_packet()
266 		dw[count++] = cra_readl(pcie, S10_RP_RXCPL_REG);  in s10_tlp_read_packet()
285 static void tlp_write_packet(struct altera_pcie *pcie, u32 *headers,  in tlp_write_packet()  argument
293 	tlp_write_tx(pcie, &tlp_rp_regdata);  in tlp_write_packet()
299 		tlp_write_tx(pcie, &tlp_rp_regdata);  in tlp_write_packet()
309 	tlp_write_tx(pcie, &tlp_rp_regdata);  in tlp_write_packet()
312 static void s10_tlp_write_packet(struct altera_pcie *pcie, u32 *headers,  in s10_tlp_write_packet()  argument
315 	s10_tlp_write_tx(pcie, headers[0], RP_TX_SOP);  in s10_tlp_write_packet()
316 	s10_tlp_write_tx(pcie, headers[1], 0);  in s10_tlp_write_packet()
317 	s10_tlp_write_tx(pcie, headers[2], 0);  in s10_tlp_write_packet()
318 	s10_tlp_write_tx(pcie, data, RP_TX_EOP);  in s10_tlp_write_packet()
321 static void get_tlp_header(struct altera_pcie *pcie, u8 bus, u32 devfn,  in get_tlp_header()  argument
325 	u8 cfg0 = read ? pcie->pcie_data->cfgrd0 : pcie->pcie_data->cfgwr0;  in get_tlp_header()
326 	u8 cfg1 = read ? pcie->pcie_data->cfgrd1 : pcie->pcie_data->cfgwr1;  in get_tlp_header()
329 	if (pcie->pcie_data->version == ALTERA_PCIE_V1)  in get_tlp_header()
330 		cfg = (bus == pcie->root_bus_nr) ? cfg0 : cfg1;  in get_tlp_header()
332 		cfg = (bus > S10_RP_SECONDARY(pcie)) ? cfg0 : cfg1;  in get_tlp_header()
334 	headers[0] = TLP_CFG_DW0(pcie, cfg);  in get_tlp_header()
335 	headers[1] = TLP_CFG_DW1(pcie, tag, byte_en);  in get_tlp_header()
339 static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn,  in tlp_cfg_dword_read()  argument
344 	get_tlp_header(pcie, bus, devfn, where, byte_en, true,  in tlp_cfg_dword_read()
347 	pcie->pcie_data->ops->tlp_write_pkt(pcie, headers, 0, false);  in tlp_cfg_dword_read()
349 	return pcie->pcie_data->ops->tlp_read_pkt(pcie, value);  in tlp_cfg_dword_read()
352 static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,  in tlp_cfg_dword_write()  argument
358 	get_tlp_header(pcie, bus, devfn, where, byte_en, false,  in tlp_cfg_dword_write()
363 		pcie->pcie_data->ops->tlp_write_pkt(pcie, headers,  in tlp_cfg_dword_write()
366 		pcie->pcie_data->ops->tlp_write_pkt(pcie, headers,  in tlp_cfg_dword_write()
369 	ret = pcie->pcie_data->ops->tlp_read_pkt(pcie, NULL);  in tlp_cfg_dword_write()
377 	if ((bus == pcie->root_bus_nr) && (where == PCI_PRIMARY_BUS))  in tlp_cfg_dword_write()
378 		pcie->root_bus_nr = (u8)(value);  in tlp_cfg_dword_write()
383 static int s10_rp_read_cfg(struct altera_pcie *pcie, int where,  in s10_rp_read_cfg()  argument
386 	void __iomem *addr = S10_RP_CFG_ADDR(pcie, where);  in s10_rp_read_cfg()
403 static int s10_rp_write_cfg(struct altera_pcie *pcie, u8 busno,  in s10_rp_write_cfg()  argument
406 	void __iomem *addr = S10_RP_CFG_ADDR(pcie, where);  in s10_rp_write_cfg()
424 	if (busno == pcie->root_bus_nr && where == PCI_PRIMARY_BUS)  in s10_rp_write_cfg()
425 		pcie->root_bus_nr = value & 0xff;  in s10_rp_write_cfg()
430 static int _altera_pcie_cfg_read(struct altera_pcie *pcie, u8 busno,  in _altera_pcie_cfg_read()  argument
438 	if (busno == pcie->root_bus_nr && pcie->pcie_data->ops->rp_read_cfg)  in _altera_pcie_cfg_read()
439 		return pcie->pcie_data->ops->rp_read_cfg(pcie, where,  in _altera_pcie_cfg_read()
454 	ret = tlp_cfg_dword_read(pcie, busno, devfn,  in _altera_pcie_cfg_read()
474 static int _altera_pcie_cfg_write(struct altera_pcie *pcie, u8 busno,  in _altera_pcie_cfg_write()  argument
482 	if (busno == pcie->root_bus_nr && pcie->pcie_data->ops->rp_write_cfg)  in _altera_pcie_cfg_write()
483 		return pcie->pcie_data->ops->rp_write_cfg(pcie, busno,  in _altera_pcie_cfg_write()
501 	return tlp_cfg_dword_write(pcie, busno, devfn, (where & ~DWORD_MASK),  in _altera_pcie_cfg_write()
508 	struct altera_pcie *pcie = bus->sysdata;  in altera_pcie_cfg_read()  local
513 	if (!altera_pcie_valid_device(pcie, bus, PCI_SLOT(devfn))) {  in altera_pcie_cfg_read()
518 	return _altera_pcie_cfg_read(pcie, bus->number, devfn, where, size,  in altera_pcie_cfg_read()
525 	struct altera_pcie *pcie = bus->sysdata;  in altera_pcie_cfg_write()  local
530 	if (!altera_pcie_valid_device(pcie, bus, PCI_SLOT(devfn)))  in altera_pcie_cfg_write()
533 	return _altera_pcie_cfg_write(pcie, bus->number, devfn, where, size,  in altera_pcie_cfg_write()
542 static int altera_read_cap_word(struct altera_pcie *pcie, u8 busno,  in altera_read_cap_word()  argument
548 	ret = _altera_pcie_cfg_read(pcie, busno, devfn,  in altera_read_cap_word()
549 				    pcie->pcie_data->cap_offset + offset,  in altera_read_cap_word()
556 static int altera_write_cap_word(struct altera_pcie *pcie, u8 busno,  in altera_write_cap_word()  argument
559 	return _altera_pcie_cfg_write(pcie, busno, devfn,  in altera_write_cap_word()
560 				      pcie->pcie_data->cap_offset + offset,  in altera_write_cap_word()
565 static void altera_wait_link_retrain(struct altera_pcie *pcie)  in altera_wait_link_retrain()  argument
567 	struct device *dev = &pcie->pdev->dev;  in altera_wait_link_retrain()
574 		altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN,  in altera_wait_link_retrain()
589 		if (pcie->pcie_data->ops->get_link_status(pcie))  in altera_wait_link_retrain()
600 static void altera_pcie_retrain(struct altera_pcie *pcie)  in altera_pcie_retrain()  argument
604 	if (!pcie->pcie_data->ops->get_link_status(pcie))  in altera_pcie_retrain()
608 	 * Set the retrain bit if the PCIe rootport support > 2.5GB/s, but  in altera_pcie_retrain()
611 	altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, PCI_EXP_LNKCAP,  in altera_pcie_retrain()
616 	altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, PCI_EXP_LNKSTA,  in altera_pcie_retrain()
619 		altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN,  in altera_pcie_retrain()
622 		altera_write_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN,  in altera_pcie_retrain()
625 		altera_wait_link_retrain(pcie);  in altera_pcie_retrain()
645 	struct altera_pcie *pcie;  in altera_pcie_isr()  local
652 	pcie = irq_desc_get_handler_data(desc);  in altera_pcie_isr()
653 	dev = &pcie->pdev->dev;  in altera_pcie_isr()
655 	while ((status = cra_readl(pcie, P2A_INT_STATUS)  in altera_pcie_isr()
659 			cra_writel(pcie, 1 << bit, P2A_INT_STATUS);  in altera_pcie_isr()
661 			virq = irq_find_mapping(pcie->irq_domain, bit);  in altera_pcie_isr()
672 static int altera_pcie_init_irq_domain(struct altera_pcie *pcie)  in altera_pcie_init_irq_domain()  argument
674 	struct device *dev = &pcie->pdev->dev;  in altera_pcie_init_irq_domain()
678 	pcie->irq_domain = irq_domain_add_linear(node, PCI_NUM_INTX,  in altera_pcie_init_irq_domain()
679 					&intx_domain_ops, pcie);  in altera_pcie_init_irq_domain()
680 	if (!pcie->irq_domain) {  in altera_pcie_init_irq_domain()
688 static void altera_pcie_irq_teardown(struct altera_pcie *pcie)  in altera_pcie_irq_teardown()  argument
690 	irq_set_chained_handler_and_data(pcie->irq, NULL, NULL);  in altera_pcie_irq_teardown()
691 	irq_domain_remove(pcie->irq_domain);  in altera_pcie_irq_teardown()
692 	irq_dispose_mapping(pcie->irq);  in altera_pcie_irq_teardown()
695 static int altera_pcie_parse_dt(struct altera_pcie *pcie)  in altera_pcie_parse_dt()  argument
697 	struct platform_device *pdev = pcie->pdev;  in altera_pcie_parse_dt()
699 	pcie->cra_base = devm_platform_ioremap_resource_byname(pdev, "Cra");  in altera_pcie_parse_dt()
700 	if (IS_ERR(pcie->cra_base))  in altera_pcie_parse_dt()
701 		return PTR_ERR(pcie->cra_base);  in altera_pcie_parse_dt()
703 	if (pcie->pcie_data->version == ALTERA_PCIE_V2) {  in altera_pcie_parse_dt()
704 		pcie->hip_base =  in altera_pcie_parse_dt()
706 		if (IS_ERR(pcie->hip_base))  in altera_pcie_parse_dt()
707 			return PTR_ERR(pcie->hip_base);  in altera_pcie_parse_dt()
711 	pcie->irq = platform_get_irq(pdev, 0);  in altera_pcie_parse_dt()
712 	if (pcie->irq < 0)  in altera_pcie_parse_dt()
713 		return pcie->irq;  in altera_pcie_parse_dt()
715 	irq_set_chained_handler_and_data(pcie->irq, altera_pcie_isr, pcie);  in altera_pcie_parse_dt()
719 static void altera_pcie_host_init(struct altera_pcie *pcie)  in altera_pcie_host_init()  argument
721 	altera_pcie_retrain(pcie);  in altera_pcie_host_init()
759 	{.compatible = "altr,pcie-root-port-1.0",
761 	{.compatible = "altr,pcie-root-port-2.0",
769 	struct altera_pcie *pcie;  in altera_pcie_probe()  local
774 	bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie));  in altera_pcie_probe()
778 	pcie = pci_host_bridge_priv(bridge);  in altera_pcie_probe()
779 	pcie->pdev = pdev;  in altera_pcie_probe()
780 	platform_set_drvdata(pdev, pcie);  in altera_pcie_probe()
786 	pcie->pcie_data = match->data;  in altera_pcie_probe()
788 	ret = altera_pcie_parse_dt(pcie);  in altera_pcie_probe()
794 	ret = altera_pcie_init_irq_domain(pcie);  in altera_pcie_probe()
801 	cra_writel(pcie, P2A_INT_STS_ALL, P2A_INT_STATUS);  in altera_pcie_probe()
803 	cra_writel(pcie, P2A_INT_ENA_ALL, P2A_INT_ENABLE);  in altera_pcie_probe()
804 	altera_pcie_host_init(pcie);  in altera_pcie_probe()
806 	bridge->sysdata = pcie;  in altera_pcie_probe()
807 	bridge->busnr = pcie->root_bus_nr;  in altera_pcie_probe()
815 	struct altera_pcie *pcie = platform_get_drvdata(pdev);  in altera_pcie_remove()  local
816 	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);  in altera_pcie_remove()
820 	altera_pcie_irq_teardown(pcie);  in altera_pcie_remove()
829 		.name	= "altera-pcie",