Lines Matching +full:gic +full:- +full:its
1 // SPDX-License-Identifier: GPL-2.0+
3 * APM X-Gene MSI Driver
48 .name = "X-Gene1 MSI",
62 * X-Gene v1 has 16 groups of MSI termination registers MSInIRx, where
86 * There are total 16 GIC IRQs assigned for these 16 groups of MSI termination
90 * the MSI pending status caused by 1 of its 8 index registers.
97 return readl_relaxed(msi->msi_regs + MSI_IR0 + in xgene_msi_ir_read()
104 return readl_relaxed(msi->msi_regs + MSI_INT0 + (msi_grp << 16)); in xgene_msi_int_read()
110 * - Divide into 8 256-vector groups
111 * Group 0: 0-255
112 * Group 1: 256-511
113 * Group 2: 512-767
115 * Group 7: 1792-2047
116 * - Each 256-vector group is divided into 16 16-vector groups
117 * As an example: 16 16-vector groups for 256-vector group 0-255 is
118 * Group 0: 0-15
119 * Group 1: 16-32
121 * Group 15: 240-255
122 * - The termination address of MSI vector in 256-vector group n and 16-vector
124 * - The data for MSI vector in 16-vector group x is x
144 u32 reg_set = hwirq_to_reg_set(data->hwirq); in xgene_compose_msi_msg()
145 u32 group = hwirq_to_group(data->hwirq); in xgene_compose_msi_msg()
146 u64 target_addr = msi->msi_addr + (((8 * group) + reg_set) << 16); in xgene_compose_msi_msg()
148 msg->address_hi = upper_32_bits(target_addr); in xgene_compose_msi_msg()
149 msg->address_lo = lower_32_bits(target_addr); in xgene_compose_msi_msg()
150 msg->data = hwirq_to_msi_data(data->hwirq); in xgene_compose_msi_msg()
154 * X-Gene v1 only has 16 MSI GIC IRQs for 2048 MSI vectors. To maintain
156 * MSI GIC IRQs are statically allocated to 8 X-Gene v1 cores (2 GIC IRQs
157 * for each core). The MSI vector is moved fom 1 MSI GIC IRQ to another
158 * MSI GIC IRQ to steer its MSI interrupt to correct X-Gene v1 core. As a
159 * consequence, the total MSI vectors that X-Gene v1 supports will be
169 return (hwirq - hwirq_to_cpu(hwirq)); in hwirq_to_canonical_hwirq()
178 curr_cpu = hwirq_to_cpu(irqdata->hwirq); in xgene_msi_set_affinity()
183 irqdata->hwirq = hwirq_to_canonical_hwirq(irqdata->hwirq) + target_cpu; in xgene_msi_set_affinity()
197 struct xgene_msi *msi = domain->host_data; in xgene_irq_domain_alloc()
200 mutex_lock(&msi->bitmap_lock); in xgene_irq_domain_alloc()
202 msi_irq = bitmap_find_next_zero_area(msi->bitmap, NR_MSI_VEC, 0, in xgene_irq_domain_alloc()
203 msi->num_cpus, 0); in xgene_irq_domain_alloc()
205 bitmap_set(msi->bitmap, msi_irq, msi->num_cpus); in xgene_irq_domain_alloc()
207 msi_irq = -ENOSPC; in xgene_irq_domain_alloc()
209 mutex_unlock(&msi->bitmap_lock); in xgene_irq_domain_alloc()
215 &xgene_msi_bottom_irq_chip, domain->host_data, in xgene_irq_domain_alloc()
228 mutex_lock(&msi->bitmap_lock); in xgene_irq_domain_free()
230 hwirq = hwirq_to_canonical_hwirq(d->hwirq); in xgene_irq_domain_free()
231 bitmap_clear(msi->bitmap, hwirq, msi->num_cpus); in xgene_irq_domain_free()
233 mutex_unlock(&msi->bitmap_lock); in xgene_irq_domain_free()
245 msi->inner_domain = irq_domain_add_linear(NULL, NR_MSI_VEC, in xgene_allocate_domains()
247 if (!msi->inner_domain) in xgene_allocate_domains()
248 return -ENOMEM; in xgene_allocate_domains()
250 msi->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(msi->node), in xgene_allocate_domains()
252 msi->inner_domain); in xgene_allocate_domains()
254 if (!msi->msi_domain) { in xgene_allocate_domains()
255 irq_domain_remove(msi->inner_domain); in xgene_allocate_domains()
256 return -ENOMEM; in xgene_allocate_domains()
264 if (msi->msi_domain) in xgene_free_domains()
265 irq_domain_remove(msi->msi_domain); in xgene_free_domains()
266 if (msi->inner_domain) in xgene_free_domains()
267 irq_domain_remove(msi->inner_domain); in xgene_free_domains()
274 xgene_msi->bitmap = kzalloc(size, GFP_KERNEL); in xgene_msi_init_allocator()
275 if (!xgene_msi->bitmap) in xgene_msi_init_allocator()
276 return -ENOMEM; in xgene_msi_init_allocator()
278 mutex_init(&xgene_msi->bitmap_lock); in xgene_msi_init_allocator()
280 xgene_msi->msi_groups = kcalloc(NR_HW_IRQS, in xgene_msi_init_allocator()
283 if (!xgene_msi->msi_groups) in xgene_msi_init_allocator()
284 return -ENOMEM; in xgene_msi_init_allocator()
301 xgene_msi = msi_groups->msi; in xgene_msi_isr()
302 msi_grp = msi_groups->msi_grp; in xgene_msi_isr()
311 msir_index = ffs(grp_select) - 1; in xgene_msi_isr()
319 intr_index = ffs(msir_val) - 1; in xgene_msi_isr()
333 virq = irq_find_mapping(xgene_msi->inner_domain, hw_irq); in xgene_msi_isr()
364 kfree(msi->msi_groups); in xgene_msi_remove()
366 kfree(msi->bitmap); in xgene_msi_remove()
367 msi->bitmap = NULL; in xgene_msi_remove()
382 for (i = cpu; i < NR_HW_IRQS; i += msi->num_cpus) { in xgene_msi_hwirq_alloc()
383 msi_group = &msi->msi_groups[i]; in xgene_msi_hwirq_alloc()
384 if (!msi_group->gic_irq) in xgene_msi_hwirq_alloc()
387 irq_set_chained_handler(msi_group->gic_irq, in xgene_msi_hwirq_alloc()
389 err = irq_set_handler_data(msi_group->gic_irq, msi_group); in xgene_msi_hwirq_alloc()
391 pr_err("failed to register GIC IRQ handler\n"); in xgene_msi_hwirq_alloc()
392 return -EINVAL; in xgene_msi_hwirq_alloc()
395 * Statically allocate MSI GIC IRQs to each CPU core. in xgene_msi_hwirq_alloc()
396 * With 8-core X-Gene v1, 2 MSI GIC IRQs are allocated in xgene_msi_hwirq_alloc()
402 err = irq_set_affinity(msi_group->gic_irq, mask); in xgene_msi_hwirq_alloc()
404 pr_err("failed to set affinity for GIC IRQ"); in xgene_msi_hwirq_alloc()
408 err = -EINVAL; in xgene_msi_hwirq_alloc()
412 irq_set_chained_handler_and_data(msi_group->gic_irq, in xgene_msi_hwirq_alloc()
427 for (i = cpu; i < NR_HW_IRQS; i += msi->num_cpus) { in xgene_msi_hwirq_free()
428 msi_group = &msi->msi_groups[i]; in xgene_msi_hwirq_free()
429 if (!msi_group->gic_irq) in xgene_msi_hwirq_free()
432 irq_set_chained_handler_and_data(msi_group->gic_irq, NULL, in xgene_msi_hwirq_free()
439 {.compatible = "apm,xgene1-msi"},
456 xgene_msi->msi_regs = devm_ioremap_resource(&pdev->dev, res); in xgene_msi_probe()
457 if (IS_ERR(xgene_msi->msi_regs)) { in xgene_msi_probe()
458 dev_err(&pdev->dev, "no reg space\n"); in xgene_msi_probe()
459 rc = PTR_ERR(xgene_msi->msi_regs); in xgene_msi_probe()
462 xgene_msi->msi_addr = res->start; in xgene_msi_probe()
463 xgene_msi->node = pdev->dev.of_node; in xgene_msi_probe()
464 xgene_msi->num_cpus = num_possible_cpus(); in xgene_msi_probe()
468 dev_err(&pdev->dev, "Error allocating MSI bitmap\n"); in xgene_msi_probe()
474 dev_err(&pdev->dev, "Failed to allocate MSI domain\n"); in xgene_msi_probe()
484 xgene_msi->msi_groups[irq_index].gic_irq = virt_msir; in xgene_msi_probe()
485 xgene_msi->msi_groups[irq_index].msi_grp = irq_index; in xgene_msi_probe()
486 xgene_msi->msi_groups[irq_index].msi = xgene_msi; in xgene_msi_probe()
490 * MSInIRx registers are read-to-clear; before registering in xgene_msi_probe()
501 dev_err(&pdev->dev, "Failed to clear spurious IRQ\n"); in xgene_msi_probe()
502 rc = -EINVAL; in xgene_msi_probe()
517 dev_info(&pdev->dev, "APM X-Gene PCIe MSI driver loaded\n"); in xgene_msi_probe()
522 dev_err(&pdev->dev, "failed to add CPU MSI notifier\n"); in xgene_msi_probe()
530 .name = "xgene-msi",