Lines Matching +full:cdns +full:- +full:pcie +full:- +full:host
1 // SPDX-License-Identifier: GPL-2.0
3 // Cadence PCIe host controller driver.
4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
13 #include "pcie-cadence.h"
31 struct cdns_pcie *pcie = &rc->pcie; in cdns_pci_map_bus() local
32 unsigned int busn = bus->number; in cdns_pci_map_bus()
44 return pcie->reg_base + (where & 0xfff); in cdns_pci_map_bus()
47 if (!(cdns_pcie_readl(pcie, CDNS_PCIE_LM_BASE) & 0x1)) in cdns_pci_map_bus()
49 /* Clear AXI link-down status */ in cdns_pci_map_bus()
50 cdns_pcie_writel(pcie, CDNS_PCIE_AT_LINKDOWN, 0x0); in cdns_pci_map_bus()
56 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR0(0), addr0); in cdns_pci_map_bus()
65 if (busn == bridge->busnr + 1) in cdns_pci_map_bus()
69 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC0(0), desc0); in cdns_pci_map_bus()
71 return rc->cfg_base + (where & 0xfff); in cdns_pci_map_bus()
83 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_init_root_port() local
89 * - disable both BAR0 and BAR1. in cdns_pcie_host_init_root_port()
90 * - enable Prefetchable Memory Base and Limit registers in type 1 in cdns_pcie_host_init_root_port()
92 * - enable IO Base and Limit registers in type 1 config in cdns_pcie_host_init_root_port()
102 cdns_pcie_writel(pcie, CDNS_PCIE_LM_RC_BAR_CFG, value); in cdns_pcie_host_init_root_port()
105 if (rc->vendor_id != 0xffff) { in cdns_pcie_host_init_root_port()
106 id = CDNS_PCIE_LM_ID_VENDOR(rc->vendor_id) | in cdns_pcie_host_init_root_port()
107 CDNS_PCIE_LM_ID_SUBSYS(rc->vendor_id); in cdns_pcie_host_init_root_port()
108 cdns_pcie_writel(pcie, CDNS_PCIE_LM_ID, id); in cdns_pcie_host_init_root_port()
111 if (rc->device_id != 0xffff) in cdns_pcie_host_init_root_port()
112 cdns_pcie_rp_writew(pcie, PCI_DEVICE_ID, rc->device_id); in cdns_pcie_host_init_root_port()
114 cdns_pcie_rp_writeb(pcie, PCI_CLASS_REVISION, 0); in cdns_pcie_host_init_root_port()
115 cdns_pcie_rp_writeb(pcie, PCI_CLASS_PROG, 0); in cdns_pcie_host_init_root_port()
116 cdns_pcie_rp_writew(pcie, PCI_CLASS_DEVICE, PCI_CLASS_BRIDGE_PCI); in cdns_pcie_host_init_root_port()
126 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_bar_ib_config() local
129 if (!rc->avail_ib_bar[bar]) in cdns_pcie_host_bar_ib_config()
130 return -EBUSY; in cdns_pcie_host_bar_ib_config()
132 rc->avail_ib_bar[bar] = false; in cdns_pcie_host_bar_ib_config()
138 cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_RP_BAR_ADDR0(bar), addr0); in cdns_pcie_host_bar_ib_config()
139 cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_RP_BAR_ADDR1(bar), addr1); in cdns_pcie_host_bar_ib_config()
144 value = cdns_pcie_readl(pcie, CDNS_PCIE_LM_RC_BAR_CFG); in cdns_pcie_host_bar_ib_config()
161 cdns_pcie_writel(pcie, CDNS_PCIE_LM_RC_BAR_CFG, value); in cdns_pcie_host_bar_ib_config()
173 if (!rc->avail_ib_bar[bar]) in cdns_pcie_host_find_min_bar()
197 if (!rc->avail_ib_bar[bar]) in cdns_pcie_host_find_max_bar()
218 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_bar_config() local
219 struct device *dev = pcie->dev; in cdns_pcie_host_bar_config()
224 cpu_addr = entry->res->start; in cdns_pcie_host_bar_config()
225 pci_addr = entry->res->start - entry->offset; in cdns_pcie_host_bar_config()
226 flags = entry->res->flags; in cdns_pcie_host_bar_config()
227 size = resource_size(entry->res); in cdns_pcie_host_bar_config()
229 if (entry->offset) { in cdns_pcie_host_bar_config()
232 return -EINVAL; in cdns_pcie_host_bar_config()
268 return -EINVAL; in cdns_pcie_host_bar_config()
279 size -= winsize; in cdns_pcie_host_bar_config()
293 return resource_size(entry2->res) - resource_size(entry1->res); in cdns_pcie_host_dma_ranges_cmp()
298 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_map_dma_ranges() local
299 struct device *dev = pcie->dev; in cdns_pcie_host_map_dma_ranges()
300 struct device_node *np = dev->of_node; in cdns_pcie_host_map_dma_ranges()
308 return -ENOMEM; in cdns_pcie_host_map_dma_ranges()
310 if (list_empty(&bridge->dma_ranges)) { in cdns_pcie_host_map_dma_ranges()
311 of_property_read_u32(np, "cdns,no-bar-match-nbits", in cdns_pcie_host_map_dma_ranges()
320 list_sort(NULL, &bridge->dma_ranges, cdns_pcie_host_dma_ranges_cmp); in cdns_pcie_host_map_dma_ranges()
322 resource_list_for_each_entry(entry, &bridge->dma_ranges) { in cdns_pcie_host_map_dma_ranges()
325 dev_err(dev, "Fail to configure IB using dma-ranges\n"); in cdns_pcie_host_map_dma_ranges()
334 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_init_address_translation() local
336 struct resource *cfg_res = rc->cfg_res; in cdns_pcie_host_init_address_translation()
338 u64 cpu_addr = cfg_res->start; in cdns_pcie_host_init_address_translation()
342 entry = resource_list_first_type(&bridge->windows, IORESOURCE_BUS); in cdns_pcie_host_init_address_translation()
344 busnr = entry->res->start; in cdns_pcie_host_init_address_translation()
353 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR1(0), addr1); in cdns_pcie_host_init_address_translation()
354 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC1(0), desc1); in cdns_pcie_host_init_address_translation()
356 if (pcie->ops->cpu_addr_fixup) in cdns_pcie_host_init_address_translation()
357 cpu_addr = pcie->ops->cpu_addr_fixup(pcie, cpu_addr); in cdns_pcie_host_init_address_translation()
362 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR0(0), addr0); in cdns_pcie_host_init_address_translation()
363 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR1(0), addr1); in cdns_pcie_host_init_address_translation()
366 resource_list_for_each_entry(entry, &bridge->windows) { in cdns_pcie_host_init_address_translation()
367 struct resource *res = entry->res; in cdns_pcie_host_init_address_translation()
368 u64 pci_addr = res->start - entry->offset; in cdns_pcie_host_init_address_translation()
371 cdns_pcie_set_outbound_region(pcie, busnr, 0, r, in cdns_pcie_host_init_address_translation()
373 pci_pio_to_address(res->start), in cdns_pcie_host_init_address_translation()
377 cdns_pcie_set_outbound_region(pcie, busnr, 0, r, in cdns_pcie_host_init_address_translation()
379 res->start, in cdns_pcie_host_init_address_translation()
401 static int cdns_pcie_host_wait_for_link(struct cdns_pcie *pcie) in cdns_pcie_host_wait_for_link() argument
403 struct device *dev = pcie->dev; in cdns_pcie_host_wait_for_link()
408 if (cdns_pcie_link_up(pcie)) { in cdns_pcie_host_wait_for_link()
415 return -ETIMEDOUT; in cdns_pcie_host_wait_for_link()
420 struct device *dev = rc->pcie.dev; in cdns_pcie_host_setup()
422 struct device_node *np = dev->of_node; in cdns_pcie_host_setup()
425 struct cdns_pcie *pcie; in cdns_pcie_host_setup() local
431 return -ENOMEM; in cdns_pcie_host_setup()
433 pcie = &rc->pcie; in cdns_pcie_host_setup()
434 pcie->is_rc = true; in cdns_pcie_host_setup()
436 rc->vendor_id = 0xffff; in cdns_pcie_host_setup()
437 of_property_read_u32(np, "vendor-id", &rc->vendor_id); in cdns_pcie_host_setup()
439 rc->device_id = 0xffff; in cdns_pcie_host_setup()
440 of_property_read_u32(np, "device-id", &rc->device_id); in cdns_pcie_host_setup()
442 pcie->reg_base = devm_platform_ioremap_resource_byname(pdev, "reg"); in cdns_pcie_host_setup()
443 if (IS_ERR(pcie->reg_base)) { in cdns_pcie_host_setup()
445 return PTR_ERR(pcie->reg_base); in cdns_pcie_host_setup()
449 rc->cfg_base = devm_pci_remap_cfg_resource(dev, res); in cdns_pcie_host_setup()
450 if (IS_ERR(rc->cfg_base)) in cdns_pcie_host_setup()
451 return PTR_ERR(rc->cfg_base); in cdns_pcie_host_setup()
452 rc->cfg_res = res; in cdns_pcie_host_setup()
454 ret = cdns_pcie_start_link(pcie); in cdns_pcie_host_setup()
460 ret = cdns_pcie_host_wait_for_link(pcie); in cdns_pcie_host_setup()
462 dev_dbg(dev, "PCIe link never came up\n"); in cdns_pcie_host_setup()
465 rc->avail_ib_bar[bar] = true; in cdns_pcie_host_setup()
471 if (!bridge->ops) in cdns_pcie_host_setup()
472 bridge->ops = &cdns_pcie_host_ops; in cdns_pcie_host_setup()