1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/nvmem-provider.h>
20 /* Amount of time required to hold charge to blow fuse in micro-seconds */
41  * struct qfprom_soc_data - config that varies from SoC to SoC.
55  * struct qfprom_priv - structure holding qfprom attributes
57  * @qfpraw:       iomapped memory space for qfprom-efuse raw address space.
58  * @qfpconf:      iomapped memory space for qfprom-efuse configuration address
63  * @secclk:       Clock supply.
64  * @vcc:          Regulator supply.
79  * struct qfprom_touched_values - saved values to restore after blowing
92  * qfprom_disable_fuse_blowing() - Undo enabling of fuse blowing.
107 	ret = regulator_disable(priv->vcc);  in qfprom_disable_fuse_blowing()
109 		dev_warn(priv->dev, "Failed to disable regulator (ignoring)\n");  in qfprom_disable_fuse_blowing()
111 	ret = clk_set_rate(priv->secclk, old->clk_rate);  in qfprom_disable_fuse_blowing()
113 		dev_warn(priv->dev,  in qfprom_disable_fuse_blowing()
116 	clk_disable_unprepare(priv->secclk);  in qfprom_disable_fuse_blowing()
118 	writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);  in qfprom_disable_fuse_blowing()
119 	writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);  in qfprom_disable_fuse_blowing()
123  * qfprom_enable_fuse_blowing() - Enable fuse blowing.
132  * Return: 0 or -err.
139 	ret = clk_prepare_enable(priv->secclk);  in qfprom_enable_fuse_blowing()
141 		dev_err(priv->dev, "Failed to enable clock\n");  in qfprom_enable_fuse_blowing()
145 	old->clk_rate = clk_get_rate(priv->secclk);  in qfprom_enable_fuse_blowing()
146 	ret = clk_set_rate(priv->secclk, priv->soc_data->qfprom_blow_set_freq);  in qfprom_enable_fuse_blowing()
148 		dev_err(priv->dev, "Failed to set clock rate for enable\n");  in qfprom_enable_fuse_blowing()
152 	ret = regulator_enable(priv->vcc);  in qfprom_enable_fuse_blowing()
154 		dev_err(priv->dev, "Failed to enable regulator\n");  in qfprom_enable_fuse_blowing()
158 	old->timer_val = readl(priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);  in qfprom_enable_fuse_blowing()
159 	old->accel_val = readl(priv->qfpconf + QFPROM_ACCEL_OFFSET);  in qfprom_enable_fuse_blowing()
160 	writel(priv->soc_data->qfprom_blow_timer_value,  in qfprom_enable_fuse_blowing()
161 	       priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);  in qfprom_enable_fuse_blowing()
162 	writel(priv->soc_data->accel_value,  in qfprom_enable_fuse_blowing()
163 	       priv->qfpconf + QFPROM_ACCEL_OFFSET);  in qfprom_enable_fuse_blowing()
168 	clk_set_rate(priv->secclk, old->clk_rate);  in qfprom_enable_fuse_blowing()
170 	clk_disable_unprepare(priv->secclk);  in qfprom_enable_fuse_blowing()
175  * qfprom_efuse_reg_write() - Write to fuses.
183  * Return: 0 or -err.
196 	dev_dbg(priv->dev,  in qfprom_reg_write()
203 	 * word_size and stride for reading vs. writing, we'll enforce here.  in qfprom_reg_write()
206 		dev_err(priv->dev,  in qfprom_reg_write()
208 		return -EINVAL;  in qfprom_reg_write()
211 		dev_err(priv->dev,  in qfprom_reg_write()
213 		return -EINVAL;  in qfprom_reg_write()
221 		priv->qfpconf + QFPROM_BLOW_STATUS_OFFSET,  in qfprom_reg_write()
226 		dev_err(priv->dev,  in qfprom_reg_write()
232 		writel(value[i], priv->qfpraw + reg + (i * 4));  in qfprom_reg_write()
235 		priv->qfpconf + QFPROM_BLOW_STATUS_OFFSET,  in qfprom_reg_write()
241 		dev_err(priv->dev, "Timeout waiting for finish.\n");  in qfprom_reg_write()
255 	void __iomem *base = priv->qfpcorrected;  in qfprom_reg_read()
257 	if (read_raw_data && priv->qfpraw)  in qfprom_reg_read()
258 		base = priv->qfpraw;  in qfprom_reg_read()
260 	while (words--)  in qfprom_reg_read()
281 	struct device *dev = &pdev->dev;  in qfprom_probe()
289 		return -ENOMEM;  in qfprom_probe()
293 	priv->qfpcorrected = devm_ioremap_resource(dev, res);  in qfprom_probe()
294 	if (IS_ERR(priv->qfpcorrected))  in qfprom_probe()
295 		return PTR_ERR(priv->qfpcorrected);  in qfprom_probe()
301 	priv->dev = dev;  in qfprom_probe()
312 		priv->qfpraw = devm_ioremap_resource(dev, res);  in qfprom_probe()
313 		if (IS_ERR(priv->qfpraw))  in qfprom_probe()
314 			return PTR_ERR(priv->qfpraw);  in qfprom_probe()
316 		priv->qfpconf = devm_ioremap_resource(dev, res);  in qfprom_probe()
317 		if (IS_ERR(priv->qfpconf))  in qfprom_probe()
318 			return PTR_ERR(priv->qfpconf);  in qfprom_probe()
320 		priv->qfpsecurity = devm_ioremap_resource(dev, res);  in qfprom_probe()
321 		if (IS_ERR(priv->qfpsecurity))  in qfprom_probe()
322 			return PTR_ERR(priv->qfpsecurity);  in qfprom_probe()
324 		version = readl(priv->qfpsecurity + QFPROM_VERSION_OFFSET);  in qfprom_probe()
331 			priv->soc_data = &qfprom_7_8_data;  in qfprom_probe()
333 		priv->vcc = devm_regulator_get(&pdev->dev, "vcc");  in qfprom_probe()
334 		if (IS_ERR(priv->vcc))  in qfprom_probe()
335 			return PTR_ERR(priv->vcc);  in qfprom_probe()
337 		priv->secclk = devm_clk_get(dev, "core");  in qfprom_probe()
338 		if (IS_ERR(priv->secclk)) {  in qfprom_probe()
339 			ret = PTR_ERR(priv->secclk);  in qfprom_probe()
340 			if (ret != -EPROBE_DEFER)  in qfprom_probe()
346 		if (priv->soc_data)  in qfprom_probe()