Lines Matching refs:iowrite64
892 iowrite64(addr, mmio + xlat_reg); in intel_ntb_mw_set_trans()
895 iowrite64(0, mmio + xlat_reg); in intel_ntb_mw_set_trans()
900 iowrite64(limit, mmio + limit_reg); in intel_ntb_mw_set_trans()
903 iowrite64(base, mmio + limit_reg); in intel_ntb_mw_set_trans()
904 iowrite64(0, mmio + xlat_reg); in intel_ntb_mw_set_trans()
1404 iowrite64(bar_addr, mmio + XEON_SBAR0BASE_OFFSET); in xeon_setup_b2b_mw()
1412 iowrite64(bar_addr, mmio + XEON_SBAR23BASE_OFFSET); in xeon_setup_b2b_mw()
1419 iowrite64(bar_addr, mmio + XEON_SBAR45BASE_OFFSET); in xeon_setup_b2b_mw()
1439 iowrite64(bar_addr, mmio + XEON_SBAR23LMT_OFFSET); in xeon_setup_b2b_mw()
1446 iowrite64(bar_addr, mmio + XEON_SBAR45LMT_OFFSET); in xeon_setup_b2b_mw()
1464 iowrite64(0, mmio + XEON_SBAR23XLAT_OFFSET); in xeon_setup_b2b_mw()
1467 iowrite64(0, mmio + XEON_SBAR45XLAT_OFFSET); in xeon_setup_b2b_mw()
1474 iowrite64(0, mmio + XEON_PBAR23LMT_OFFSET); in xeon_setup_b2b_mw()
1476 iowrite64(0, mmio + XEON_PBAR45LMT_OFFSET); in xeon_setup_b2b_mw()
1484 iowrite64(bar_addr, mmio + XEON_PBAR23XLAT_OFFSET); in xeon_setup_b2b_mw()
1490 iowrite64(bar_addr, mmio + XEON_PBAR45XLAT_OFFSET); in xeon_setup_b2b_mw()