Lines Matching refs:rtw_write32_mask
69 rtw_write32_mask(rtwdev, 0x64, BIT(29) | BIT(28), 0x3); in rtw8822b_phy_rfe_init()
70 rtw_write32_mask(rtwdev, 0x4c, BIT(26) | BIT(25), 0x0); in rtw8822b_phy_rfe_init()
71 rtw_write32_mask(rtwdev, 0x40, BIT(2), 0x1); in rtw8822b_phy_rfe_init()
74 rtw_write32_mask(rtwdev, 0x1990, 0x3f, 0x30); in rtw8822b_phy_rfe_init()
75 rtw_write32_mask(rtwdev, 0x1990, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
78 rtw_write32_mask(rtwdev, 0x974, 0x3f, 0x3f); in rtw8822b_phy_rfe_init()
79 rtw_write32_mask(rtwdev, 0x974, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
151 rtw_write32_mask(rtwdev, 0x24, 0x7e000000, crystal_cap); in rtw8822b_phy_set_param()
152 rtw_write32_mask(rtwdev, 0x28, 0x7e, crystal_cap); in rtw8822b_phy_set_param()
457 rtw_write32_mask(rtwdev, REG_CCASEL, MASKDWORD, reg82c); in rtw8822b_set_channel_cca()
458 rtw_write32_mask(rtwdev, REG_PDMFTH, MASKDWORD, reg830); in rtw8822b_set_channel_cca()
459 rtw_write32_mask(rtwdev, REG_CCA2ND, MASKDWORD, reg838); in rtw8822b_set_channel_cca()
462 rtw_write32_mask(rtwdev, REG_L1WT, MASKDWORD, 0x9194b2b9); in rtw8822b_set_channel_cca()
465 rtw_write32_mask(rtwdev, REG_CCA2ND, 0xf0, 0x4); in rtw8822b_set_channel_cca()
559 rtw_write32_mask(rtwdev, REG_RXIGI_A, 0x7f, igi - 2); in rtw8822b_toggle_igi()
560 rtw_write32_mask(rtwdev, REG_RXIGI_A, 0x7f, igi); in rtw8822b_toggle_igi()
561 rtw_write32_mask(rtwdev, REG_RXIGI_B, 0x7f, igi - 2); in rtw8822b_toggle_igi()
562 rtw_write32_mask(rtwdev, REG_RXIGI_B, 0x7f, igi); in rtw8822b_toggle_igi()
564 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, 0x0); in rtw8822b_toggle_igi()
565 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, in rtw8822b_toggle_igi()
573 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x1); in rtw8822b_set_channel_rxdfir()
574 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x0); in rtw8822b_set_channel_rxdfir()
578 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
579 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x1); in rtw8822b_set_channel_rxdfir()
583 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
584 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
597 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1); in rtw8822b_set_channel_bb()
598 rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x0); in rtw8822b_set_channel_bb()
599 rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x0); in rtw8822b_set_channel_bb()
600 rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 15); in rtw8822b_set_channel_bb()
602 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x0); in rtw8822b_set_channel_bb()
603 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x96a); in rtw8822b_set_channel_bb()
605 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x00006577); in rtw8822b_set_channel_bb()
606 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x0000); in rtw8822b_set_channel_bb()
608 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x384f6577); in rtw8822b_set_channel_bb()
609 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x1525); in rtw8822b_set_channel_bb()
612 rtw_write32_mask(rtwdev, REG_RFEINV, 0x300, 0x2); in rtw8822b_set_channel_bb()
614 rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x1); in rtw8822b_set_channel_bb()
615 rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x1); in rtw8822b_set_channel_bb()
616 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0); in rtw8822b_set_channel_bb()
617 rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 34); in rtw8822b_set_channel_bb()
620 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x1); in rtw8822b_set_channel_bb()
622 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x2); in rtw8822b_set_channel_bb()
624 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x3); in rtw8822b_set_channel_bb()
627 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x494); in rtw8822b_set_channel_bb()
629 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x453); in rtw8822b_set_channel_bb()
631 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x452); in rtw8822b_set_channel_bb()
633 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x412); in rtw8822b_set_channel_bb()
635 rtw_write32_mask(rtwdev, 0xcbc, 0x300, 0x1); in rtw8822b_set_channel_bb()
644 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
646 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
657 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
659 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
665 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
667 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
670 rtw_write32_mask(rtwdev, REG_L1PKWT, 0x0000f000, 0x6); in rtw8822b_set_channel_bb()
671 rtw_write32_mask(rtwdev, REG_ADC40, BIT(10), 0x1); in rtw8822b_set_channel_bb()
678 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
680 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0); in rtw8822b_set_channel_bb()
681 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8822b_set_channel_bb()
687 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
689 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0); in rtw8822b_set_channel_bb()
690 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8822b_set_channel_bb()
732 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x3231); in rtw8822b_config_trx_mode()
734 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x1111); in rtw8822b_config_trx_mode()
737 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x3231); in rtw8822b_config_trx_mode()
739 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x1111); in rtw8822b_config_trx_mode()
741 rtw_write32_mask(rtwdev, REG_CDDTXP, (BIT(19) | BIT(18)), 0x3); in rtw8822b_config_trx_mode()
742 rtw_write32_mask(rtwdev, REG_TXPSEL, (BIT(29) | BIT(28)), 0x1); in rtw8822b_config_trx_mode()
743 rtw_write32_mask(rtwdev, REG_TXPSEL, BIT(30), 0x1); in rtw8822b_config_trx_mode()
746 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x001); in rtw8822b_config_trx_mode()
747 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0x8); in rtw8822b_config_trx_mode()
749 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x002); in rtw8822b_config_trx_mode()
750 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0x4); in rtw8822b_config_trx_mode()
754 rtw_write32_mask(rtwdev, REG_TXPSEL1, 0xfff0, 0x01); in rtw8822b_config_trx_mode()
756 rtw_write32_mask(rtwdev, REG_TXPSEL1, 0xfff0, 0x43); in rtw8822b_config_trx_mode()
759 rtw_write32_mask(rtwdev, REG_TXPSEL, MASKBYTE0, tx_path_sel); in rtw8822b_config_trx_mode()
763 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x043); in rtw8822b_config_trx_mode()
764 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0xc); in rtw8822b_config_trx_mode()
768 rtw_write32_mask(rtwdev, REG_RXDESC, BIT(22), 0x0); in rtw8822b_config_trx_mode()
769 rtw_write32_mask(rtwdev, REG_RXDESC, BIT(18), 0x0); in rtw8822b_config_trx_mode()
772 rtw_write32_mask(rtwdev, REG_ADCINI, 0x0f000000, 0x0); in rtw8822b_config_trx_mode()
774 rtw_write32_mask(rtwdev, REG_ADCINI, 0x0f000000, 0x5); in rtw8822b_config_trx_mode()
777 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, rx_path_sel); in rtw8822b_config_trx_mode()
780 rtw_write32_mask(rtwdev, REG_ANTWT, BIT(16), 0x0); in rtw8822b_config_trx_mode()
781 rtw_write32_mask(rtwdev, REG_HTSTFWT, BIT(28), 0x0); in rtw8822b_config_trx_mode()
782 rtw_write32_mask(rtwdev, REG_MRC, BIT(23), 0x0); in rtw8822b_config_trx_mode()
784 rtw_write32_mask(rtwdev, REG_ANTWT, BIT(16), 0x1); in rtw8822b_config_trx_mode()
785 rtw_write32_mask(rtwdev, REG_HTSTFWT, BIT(28), 0x1); in rtw8822b_config_trx_mode()
786 rtw_write32_mask(rtwdev, REG_MRC, BIT(23), 0x1); in rtw8822b_config_trx_mode()
1426 rtw_write32_mask(rtwdev, reg1, GENMASK(29, 25), txagc_idx); in rtw8822b_pwrtrack_set_pwr()
1427 rtw_write32_mask(rtwdev, reg2, GENMASK(31, 21), in rtw8822b_pwrtrack_set_pwr()