141 	rtw_write32_mask(rtwdev, REG_AFE_XTAL_CTRL, 0x7e000000, crystal_cap);  in rtw8821c_phy_set_param()
142 	rtw_write32_mask(rtwdev, REG_AFE_PLL_CTRL, 0x7e, crystal_cap);  in rtw8821c_phy_set_param()
143 	rtw_write32_mask(rtwdev, REG_CCK0_FAREPORT, BIT(18) | BIT(22), 0);  in rtw8821c_phy_set_param()
276 		rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2);  in rtw8821c_set_channel_rxdfir()
277 		rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2);  in rtw8821c_set_channel_rxdfir()
278 		rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0);  in rtw8821c_set_channel_rxdfir()
279 		rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x0);  in rtw8821c_set_channel_rxdfir()
282 		rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2);  in rtw8821c_set_channel_rxdfir()
283 		rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x1);  in rtw8821c_set_channel_rxdfir()
284 		rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0);  in rtw8821c_set_channel_rxdfir()
285 		rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x1);  in rtw8821c_set_channel_rxdfir()
288 		rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2);  in rtw8821c_set_channel_rxdfir()
289 		rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2);  in rtw8821c_set_channel_rxdfir()
290 		rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x1);  in rtw8821c_set_channel_rxdfir()
291 		rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x0);  in rtw8821c_set_channel_rxdfir()
301 		rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1);  in rtw8821c_set_channel_bb()
302 		rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x0);  in rtw8821c_set_channel_bb()
303 		rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x0);  in rtw8821c_set_channel_bb()
304 		rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 15);  in rtw8821c_set_channel_bb()
306 		rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x0);  in rtw8821c_set_channel_bb()
307 		rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x96a);  in rtw8821c_set_channel_bb()
309 			rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x0000b81c);  in rtw8821c_set_channel_bb()
310 			rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x0000);  in rtw8821c_set_channel_bb()
311 			rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, 0x00003667);  in rtw8821c_set_channel_bb()
313 			rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD,  in rtw8821c_set_channel_bb()
315 			rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD,  in rtw8821c_set_channel_bb()
317 			rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD,  in rtw8821c_set_channel_bb()
321 		rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x1);  in rtw8821c_set_channel_bb()
322 		rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x1);  in rtw8821c_set_channel_bb()
323 		rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0);  in rtw8821c_set_channel_bb()
324 		rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 15);  in rtw8821c_set_channel_bb()
327 			rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x1);  in rtw8821c_set_channel_bb()
329 			rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x2);  in rtw8821c_set_channel_bb()
331 			rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x3);  in rtw8821c_set_channel_bb()
334 			rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x494);  in rtw8821c_set_channel_bb()
336 			rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x453);  in rtw8821c_set_channel_bb()
338 			rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x452);  in rtw8821c_set_channel_bb()
340 			rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x412);  in rtw8821c_set_channel_bb()
349 		rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32);  in rtw8821c_set_channel_bb()
351 		rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1);  in rtw8821c_set_channel_bb()
363 		rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32);  in rtw8821c_set_channel_bb()
365 		rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1);  in rtw8821c_set_channel_bb()
372 		rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32);  in rtw8821c_set_channel_bb()
374 		rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1);  in rtw8821c_set_channel_bb()
380 		rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32);  in rtw8821c_set_channel_bb()
382 		rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0);  in rtw8821c_set_channel_bb()
383 		rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1);  in rtw8821c_set_channel_bb()
389 		rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32);  in rtw8821c_set_channel_bb()
391 		rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0);  in rtw8821c_set_channel_bb()
392 		rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1);  in rtw8821c_set_channel_bb()
414 	rtw_write32_mask(rtwdev, REG_TXSCALE_A, GENMASK(31, 21),  in rtw8821c_set_channel_bb_swing()
902 	rtw_write32_mask(rtwdev, REG_TXAGCIDX, GENMASK(6, 1), txagc_idx);  in rtw8821c_pwrtrack_set_pwr()
903 	rtw_write32_mask(rtwdev, REG_TXSCALE_A, GENMASK(31, 21),  in rtw8821c_pwrtrack_set_pwr()
1038 	rtw_write32_mask(rtwdev, REG_PWRTH, 0x3f0000, pd[new_lvl]);  in rtw8821c_phy_cck_pd_set()
1039 	rtw_write32_mask(rtwdev, REG_PWRTH2, 0x1f0000,  in rtw8821c_phy_cck_pd_set()