Lines Matching refs:hal

149 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_dig_write()  local
158 for (path = 0; path < hal->rf_path_num; path++) { in rtw_phy_dig_write()
536 if (rtwdev->hal.current_band_type != RTW_BAND_2G) in rtw_phy_cck_pd()
690 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_read_rf() local
695 if (rf_path >= hal->rf_phy_num) { in rtw_phy_read_rf()
713 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_read_rf_sipi() local
722 if (rf_path >= hal->rf_phy_num) { in rtw_phy_read_rf_sipi()
762 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_write_rf_reg_sipi() local
769 if (rf_path >= hal->rf_phy_num) { in rtw_phy_write_rf_reg_sipi()
802 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_write_rf_reg() local
807 if (rf_path >= hal->rf_phy_num) { in rtw_phy_write_rf_reg()
835 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_setup_phy_cond() local
839 cond.cut = hal->cut_version ? hal->cut_version : 15; in rtw_phy_setup_phy_cond()
857 hal->phy_cond = cond; in rtw_phy_setup_phy_cond()
859 rtw_dbg(rtwdev, RTW_DBG_PHY, "phy cond=0x%08x\n", *((u32 *)&hal->phy_cond)); in rtw_phy_setup_phy_cond()
864 struct rtw_hal *hal = &rtwdev->hal; in check_positive() local
865 struct rtw_phy_cond drv_cond = hal->phy_cond; in check_positive()
1245 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_store_tx_power_by_rate() local
1265 hal->tx_pwr_by_rate_offset_2g[rfpath][rate] = offset; in rtw_phy_store_tx_power_by_rate()
1267 hal->tx_pwr_by_rate_offset_5g[rfpath][rate] = offset; in rtw_phy_store_tx_power_by_rate()
1325 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_set_tx_power_limit() local
1343 hal->tx_pwr_limit_2g[regd][bw][rs][ch_idx] = pwr_limit; in rtw_phy_set_tx_power_limit()
1344 ww = hal->tx_pwr_limit_2g[RTW_REGD_WW][bw][rs][ch_idx]; in rtw_phy_set_tx_power_limit()
1346 hal->tx_pwr_limit_2g[RTW_REGD_WW][bw][rs][ch_idx] = ww; in rtw_phy_set_tx_power_limit()
1348 hal->tx_pwr_limit_5g[regd][bw][rs][ch_idx] = pwr_limit; in rtw_phy_set_tx_power_limit()
1349 ww = hal->tx_pwr_limit_5g[RTW_REGD_WW][bw][rs][ch_idx]; in rtw_phy_set_tx_power_limit()
1351 hal->tx_pwr_limit_5g[RTW_REGD_WW][bw][rs][ch_idx] = ww; in rtw_phy_set_tx_power_limit()
1360 struct rtw_hal *hal = &rtwdev->hal; in rtw_xref_5g_txpwr_lmt() local
1362 s8 lmt_ht = hal->tx_pwr_limit_5g[regd][bw][rs_ht][ch_idx]; in rtw_xref_5g_txpwr_lmt()
1363 s8 lmt_vht = hal->tx_pwr_limit_5g[regd][bw][rs_vht][ch_idx]; in rtw_xref_5g_txpwr_lmt()
1369 hal->tx_pwr_limit_5g[regd][bw][rs_ht][ch_idx] = lmt_vht; in rtw_xref_5g_txpwr_lmt()
1372 hal->tx_pwr_limit_5g[regd][bw][rs_vht][ch_idx] = lmt_ht; in rtw_xref_5g_txpwr_lmt()
1512 for (rf_path = 0; rf_path < rtwdev->hal.rf_path_num; rf_path++) { in rtw_phy_load_tables()
1746 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_get_tx_power_limit() local
1747 u8 *cch_by_bw = hal->cch_by_bw; in rtw_phy_get_tx_power_limit()
1789 hal->tx_pwr_limit_2g[regd][cur_bw][rs][ch_idx] : in rtw_phy_get_tx_power_limit()
1790 hal->tx_pwr_limit_5g[regd][cur_bw][rs][ch_idx]; in rtw_phy_get_tx_power_limit()
1806 struct rtw_hal *hal = &rtwdev->hal; in rtw_get_tx_power_params() local
1824 *offset = hal->tx_pwr_by_rate_offset_2g[path][rate]; in rtw_get_tx_power_params()
1830 *offset = hal->tx_pwr_by_rate_offset_5g[path][rate]; in rtw_get_tx_power_params()
1868 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_set_tx_power_index_by_rs() local
1882 bw = hal->current_band_width; in rtw_phy_set_tx_power_index_by_rs()
1887 hal->tx_pwr_tbl[path][rate] = pwr_idx; in rtw_phy_set_tx_power_index_by_rs()
1899 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_set_tx_power_level_by_path() local
1903 if (hal->current_band_type == RTW_BAND_2G) in rtw_phy_set_tx_power_level_by_path()
1915 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_set_tx_power_level() local
1918 mutex_lock(&hal->tx_power_mutex); in rtw_phy_set_tx_power_level()
1920 for (path = 0; path < hal->rf_path_num; path++) in rtw_phy_set_tx_power_level()
1924 mutex_unlock(&hal->tx_power_mutex); in rtw_phy_set_tx_power_level()
1929 rtw_phy_tx_power_by_rate_config_by_path(struct rtw_hal *hal, u8 path, in rtw_phy_tx_power_by_rate_config_by_path() argument
1940 base_2g = hal->tx_pwr_by_rate_offset_2g[path][base_idx]; in rtw_phy_tx_power_by_rate_config_by_path()
1941 base_5g = hal->tx_pwr_by_rate_offset_5g[path][base_idx]; in rtw_phy_tx_power_by_rate_config_by_path()
1942 hal->tx_pwr_by_rate_base_2g[path][rs] = base_2g; in rtw_phy_tx_power_by_rate_config_by_path()
1943 hal->tx_pwr_by_rate_base_5g[path][rs] = base_5g; in rtw_phy_tx_power_by_rate_config_by_path()
1946 hal->tx_pwr_by_rate_offset_2g[path][rate_idx] -= base_2g; in rtw_phy_tx_power_by_rate_config_by_path()
1947 hal->tx_pwr_by_rate_offset_5g[path][rate_idx] -= base_5g; in rtw_phy_tx_power_by_rate_config_by_path()
1951 void rtw_phy_tx_power_by_rate_config(struct rtw_hal *hal) in rtw_phy_tx_power_by_rate_config() argument
1956 rtw_phy_tx_power_by_rate_config_by_path(hal, path, in rtw_phy_tx_power_by_rate_config()
1959 rtw_phy_tx_power_by_rate_config_by_path(hal, path, in rtw_phy_tx_power_by_rate_config()
1962 rtw_phy_tx_power_by_rate_config_by_path(hal, path, in rtw_phy_tx_power_by_rate_config()
1965 rtw_phy_tx_power_by_rate_config_by_path(hal, path, in rtw_phy_tx_power_by_rate_config()
1968 rtw_phy_tx_power_by_rate_config_by_path(hal, path, in rtw_phy_tx_power_by_rate_config()
1971 rtw_phy_tx_power_by_rate_config_by_path(hal, path, in rtw_phy_tx_power_by_rate_config()
1978 __rtw_phy_tx_power_limit_config(struct rtw_hal *hal, u8 regd, u8 bw, u8 rs) in __rtw_phy_tx_power_limit_config() argument
1984 base = hal->tx_pwr_by_rate_base_2g[0][rs]; in __rtw_phy_tx_power_limit_config()
1985 hal->tx_pwr_limit_2g[regd][bw][rs][ch] -= base; in __rtw_phy_tx_power_limit_config()
1989 base = hal->tx_pwr_by_rate_base_5g[0][rs]; in __rtw_phy_tx_power_limit_config()
1990 hal->tx_pwr_limit_5g[regd][bw][rs][ch] -= base; in __rtw_phy_tx_power_limit_config()
1994 void rtw_phy_tx_power_limit_config(struct rtw_hal *hal) in rtw_phy_tx_power_limit_config() argument
1999 hal->cch_by_bw[RTW_CHANNEL_WIDTH_20] = 1; in rtw_phy_tx_power_limit_config()
2004 __rtw_phy_tx_power_limit_config(hal, regd, bw, rs); in rtw_phy_tx_power_limit_config()
2010 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_init_tx_power_limit() local
2016 hal->tx_pwr_limit_2g[regd][bw][rs][ch] = max_power_index; in rtw_phy_init_tx_power_limit()
2020 hal->tx_pwr_limit_5g[regd][bw][rs][ch] = max_power_index; in rtw_phy_init_tx_power_limit()
2025 struct rtw_hal *hal = &rtwdev->hal; in rtw_phy_init_tx_power() local
2031 hal->tx_pwr_by_rate_offset_2g[path][rate] = 0; in rtw_phy_init_tx_power()
2032 hal->tx_pwr_by_rate_offset_5g[path][rate] = 0; in rtw_phy_init_tx_power()
2048 u8 channel = rtwdev->hal.current_channel; in rtw_phy_config_swing_table()