Lines Matching +full:0 +full:x80040000
36 {0x02f, 0x30}, {0x035, 0x00}, {0x039, 0x08}, {0x04e, 0xe0},
37 {0x064, 0x00}, {0x067, 0x20}, {0x428, 0x0a}, {0x429, 0x10},
38 {0x430, 0x00}, {0x431, 0x00},
39 {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05},
40 {0x436, 0x07}, {0x437, 0x08}, {0x43c, 0x04}, {0x43d, 0x05},
41 {0x43e, 0x07}, {0x43f, 0x08}, {0x440, 0x5d}, {0x441, 0x01},
42 {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, {0x446, 0x00},
43 {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xf0}, {0x44a, 0x0f},
44 {0x44b, 0x3e}, {0x44c, 0x10}, {0x44d, 0x00}, {0x44e, 0x00},
45 {0x44f, 0x00}, {0x450, 0x00}, {0x451, 0xf0}, {0x452, 0x0f},
46 {0x453, 0x00}, {0x456, 0x5e}, {0x460, 0x66}, {0x461, 0x66},
47 {0x4c8, 0xff}, {0x4c9, 0x08}, {0x4cc, 0xff},
48 {0x4cd, 0xff}, {0x4ce, 0x01}, {0x500, 0x26}, {0x501, 0xa2},
49 {0x502, 0x2f}, {0x503, 0x00}, {0x504, 0x28}, {0x505, 0xa3},
50 {0x506, 0x5e}, {0x507, 0x00}, {0x508, 0x2b}, {0x509, 0xa4},
51 {0x50a, 0x5e}, {0x50b, 0x00}, {0x50c, 0x4f}, {0x50d, 0xa4},
52 {0x50e, 0x00}, {0x50f, 0x00}, {0x512, 0x1c}, {0x514, 0x0a},
53 {0x516, 0x0a}, {0x525, 0x4f},
54 {0x550, 0x10}, {0x551, 0x10}, {0x559, 0x02}, {0x55c, 0x50},
55 {0x55d, 0xff}, {0x605, 0x30}, {0x608, 0x0e}, {0x609, 0x2a},
56 {0x620, 0xff}, {0x621, 0xff}, {0x622, 0xff}, {0x623, 0xff},
57 {0x624, 0xff}, {0x625, 0xff}, {0x626, 0xff}, {0x627, 0xff},
58 {0x638, 0x50}, {0x63c, 0x0a}, {0x63d, 0x0a}, {0x63e, 0x0e},
59 {0x63f, 0x0e}, {0x640, 0x40}, {0x642, 0x40}, {0x643, 0x00},
60 {0x652, 0xc8}, {0x66e, 0x05}, {0x700, 0x21}, {0x701, 0x43},
61 {0x702, 0x65}, {0x703, 0x87}, {0x708, 0x21}, {0x709, 0x43},
62 {0x70a, 0x65}, {0x70b, 0x87}, {0x765, 0x18}, {0x76e, 0x04},
63 {0xffff, 0xff},
67 {0x800, 0x80040000}, {0x804, 0x00000003},
68 {0x808, 0x0000fc00}, {0x80c, 0x0000000a},
69 {0x810, 0x10001331}, {0x814, 0x020c3d10},
70 {0x818, 0x02200385}, {0x81c, 0x00000000},
71 {0x820, 0x01000100}, {0x824, 0x00190204},
72 {0x828, 0x00000000}, {0x82c, 0x00000000},
73 {0x830, 0x00000000}, {0x834, 0x00000000},
74 {0x838, 0x00000000}, {0x83c, 0x00000000},
75 {0x840, 0x00010000}, {0x844, 0x00000000},
76 {0x848, 0x00000000}, {0x84c, 0x00000000},
77 {0x850, 0x00000000}, {0x854, 0x00000000},
78 {0x858, 0x569a11a9}, {0x85c, 0x01000014},
79 {0x860, 0x66f60110}, {0x864, 0x061f0649},
80 {0x868, 0x00000000}, {0x86c, 0x27272700},
81 {0x870, 0x07000760}, {0x874, 0x25004000},
82 {0x878, 0x00000808}, {0x87c, 0x00000000},
83 {0x880, 0xb0000c1c}, {0x884, 0x00000001},
84 {0x888, 0x00000000}, {0x88c, 0xccc000c0},
85 {0x890, 0x00000800}, {0x894, 0xfffffffe},
86 {0x898, 0x40302010}, {0x89c, 0x00706050},
87 {0x900, 0x00000000}, {0x904, 0x00000023},
88 {0x908, 0x00000000}, {0x90c, 0x81121111},
89 {0x910, 0x00000002}, {0x914, 0x00000201},
90 {0xa00, 0x00d047c8}, {0xa04, 0x80ff800c},
91 {0xa08, 0x8c838300}, {0xa0c, 0x2e7f120f},
92 {0xa10, 0x9500bb78}, {0xa14, 0x1114d028},
93 {0xa18, 0x00881117}, {0xa1c, 0x89140f00},
94 {0xa20, 0x1a1b0000}, {0xa24, 0x090e1317},
95 {0xa28, 0x00000204}, {0xa2c, 0x00d30000},
96 {0xa70, 0x101fbf00}, {0xa74, 0x00000007},
97 {0xa78, 0x00000900}, {0xa7c, 0x225b0606},
98 {0xa80, 0x21806490}, {0xb2c, 0x00000000},
99 {0xc00, 0x48071d40}, {0xc04, 0x03a05611},
100 {0xc08, 0x000000e4}, {0xc0c, 0x6c6c6c6c},
101 {0xc10, 0x08800000}, {0xc14, 0x40000100},
102 {0xc18, 0x08800000}, {0xc1c, 0x40000100},
103 {0xc20, 0x00000000}, {0xc24, 0x00000000},
104 {0xc28, 0x00000000}, {0xc2c, 0x00000000},
105 {0xc30, 0x69e9ac44}, {0xc34, 0x469652af},
106 {0xc38, 0x49795994}, {0xc3c, 0x0a97971c},
107 {0xc40, 0x1f7c403f}, {0xc44, 0x000100b7},
108 {0xc48, 0xec020107}, {0xc4c, 0x007f037f},
109 {0xc50, 0x69553420}, {0xc54, 0x43bc0094},
110 {0xc58, 0x00013149}, {0xc5c, 0x00250492},
111 {0xc60, 0x00000000}, {0xc64, 0x7112848b},
112 {0xc68, 0x47c00bff}, {0xc6c, 0x00000036},
113 {0xc70, 0x2c7f000d}, {0xc74, 0x020610db},
114 {0xc78, 0x0000001f}, {0xc7c, 0x00b91612},
115 {0xc80, 0x390000e4}, {0xc84, 0x20f60000},
116 {0xc88, 0x40000100}, {0xc8c, 0x20200000},
117 {0xc90, 0x00020e1a}, {0xc94, 0x00000000},
118 {0xc98, 0x00020e1a}, {0xc9c, 0x00007f7f},
119 {0xca0, 0x00000000}, {0xca4, 0x000300a0},
120 {0xca8, 0x00000000}, {0xcac, 0x00000000},
121 {0xcb0, 0x00000000}, {0xcb4, 0x00000000},
122 {0xcb8, 0x00000000}, {0xcbc, 0x28000000},
123 {0xcc0, 0x00000000}, {0xcc4, 0x00000000},
124 {0xcc8, 0x00000000}, {0xccc, 0x00000000},
125 {0xcd0, 0x00000000}, {0xcd4, 0x00000000},
126 {0xcd8, 0x64b22427}, {0xcdc, 0x00766932},
127 {0xce0, 0x00222222}, {0xce4, 0x00000000},
128 {0xce8, 0x37644302}, {0xcec, 0x2f97d40c},
129 {0xd00, 0x00000740}, {0xd04, 0x40020401},
130 {0xd08, 0x0000907f}, {0xd0c, 0x20010201},
131 {0xd10, 0xa0633333}, {0xd14, 0x3333bc53},
132 {0xd18, 0x7a8f5b6f}, {0xd2c, 0xcc979975},
133 {0xd30, 0x00000000}, {0xd34, 0x80608000},
134 {0xd38, 0x00000000}, {0xd3c, 0x00127353},
135 {0xd40, 0x00000000}, {0xd44, 0x00000000},
136 {0xd48, 0x00000000}, {0xd4c, 0x00000000},
137 {0xd50, 0x6437140a}, {0xd54, 0x00000000},
138 {0xd58, 0x00000282}, {0xd5c, 0x30032064},
139 {0xd60, 0x4653de68}, {0xd64, 0x04518a3c},
140 {0xd68, 0x00002101}, {0xd6c, 0x2a201c16},
141 {0xd70, 0x1812362e}, {0xd74, 0x322c2220},
142 {0xd78, 0x000e3c24}, {0xe00, 0x2d2d2d2d},
143 {0xe04, 0x2d2d2d2d}, {0xe08, 0x0390272d},
144 {0xe10, 0x2d2d2d2d}, {0xe14, 0x2d2d2d2d},
145 {0xe18, 0x2d2d2d2d}, {0xe1c, 0x2d2d2d2d},
146 {0xe28, 0x00000000}, {0xe30, 0x1000dc1f},
147 {0xe34, 0x10008c1f}, {0xe38, 0x02140102},
148 {0xe3c, 0x681604c2}, {0xe40, 0x01007c00},
149 {0xe44, 0x01004800}, {0xe48, 0xfb000000},
150 {0xe4c, 0x000028d1}, {0xe50, 0x1000dc1f},
151 {0xe54, 0x10008c1f}, {0xe58, 0x02140102},
152 {0xe5c, 0x28160d05}, {0xe60, 0x00000008},
153 {0xe68, 0x001b2556}, {0xe6c, 0x00c00096},
154 {0xe70, 0x00c00096}, {0xe74, 0x01000056},
155 {0xe78, 0x01000014}, {0xe7c, 0x01000056},
156 {0xe80, 0x01000014}, {0xe84, 0x00c00096},
157 {0xe88, 0x01000056}, {0xe8c, 0x00c00096},
158 {0xed0, 0x00c00096}, {0xed4, 0x00c00096},
159 {0xed8, 0x00c00096}, {0xedc, 0x000000d6},
160 {0xee0, 0x000000d6}, {0xeec, 0x01c00016},
161 {0xf14, 0x00000003}, {0xf4c, 0x00000000},
162 {0xf00, 0x00000300},
163 {0x820, 0x01000100}, {0x800, 0x83040000},
164 {0xffff, 0xffffffff},
168 {0xc78, 0xfd000001}, {0xc78, 0xfc010001},
169 {0xc78, 0xfb020001}, {0xc78, 0xfa030001},
170 {0xc78, 0xf9040001}, {0xc78, 0xf8050001},
171 {0xc78, 0xf7060001}, {0xc78, 0xf6070001},
172 {0xc78, 0xf5080001}, {0xc78, 0xf4090001},
173 {0xc78, 0xf30a0001}, {0xc78, 0xf20b0001},
174 {0xc78, 0xf10c0001}, {0xc78, 0xf00d0001},
175 {0xc78, 0xef0e0001}, {0xc78, 0xee0f0001},
176 {0xc78, 0xed100001}, {0xc78, 0xec110001},
177 {0xc78, 0xeb120001}, {0xc78, 0xea130001},
178 {0xc78, 0xe9140001}, {0xc78, 0xe8150001},
179 {0xc78, 0xe7160001}, {0xc78, 0xe6170001},
180 {0xc78, 0xe5180001}, {0xc78, 0xe4190001},
181 {0xc78, 0xe31a0001}, {0xc78, 0xa51b0001},
182 {0xc78, 0xa41c0001}, {0xc78, 0xa31d0001},
183 {0xc78, 0x671e0001}, {0xc78, 0x661f0001},
184 {0xc78, 0x65200001}, {0xc78, 0x64210001},
185 {0xc78, 0x63220001}, {0xc78, 0x4a230001},
186 {0xc78, 0x49240001}, {0xc78, 0x48250001},
187 {0xc78, 0x47260001}, {0xc78, 0x46270001},
188 {0xc78, 0x45280001}, {0xc78, 0x44290001},
189 {0xc78, 0x432a0001}, {0xc78, 0x422b0001},
190 {0xc78, 0x292c0001}, {0xc78, 0x282d0001},
191 {0xc78, 0x272e0001}, {0xc78, 0x262f0001},
192 {0xc78, 0x0a300001}, {0xc78, 0x09310001},
193 {0xc78, 0x08320001}, {0xc78, 0x07330001},
194 {0xc78, 0x06340001}, {0xc78, 0x05350001},
195 {0xc78, 0x04360001}, {0xc78, 0x03370001},
196 {0xc78, 0x02380001}, {0xc78, 0x01390001},
197 {0xc78, 0x013a0001}, {0xc78, 0x013b0001},
198 {0xc78, 0x013c0001}, {0xc78, 0x013d0001},
199 {0xc78, 0x013e0001}, {0xc78, 0x013f0001},
200 {0xc78, 0xfc400001}, {0xc78, 0xfb410001},
201 {0xc78, 0xfa420001}, {0xc78, 0xf9430001},
202 {0xc78, 0xf8440001}, {0xc78, 0xf7450001},
203 {0xc78, 0xf6460001}, {0xc78, 0xf5470001},
204 {0xc78, 0xf4480001}, {0xc78, 0xf3490001},
205 {0xc78, 0xf24a0001}, {0xc78, 0xf14b0001},
206 {0xc78, 0xf04c0001}, {0xc78, 0xef4d0001},
207 {0xc78, 0xee4e0001}, {0xc78, 0xed4f0001},
208 {0xc78, 0xec500001}, {0xc78, 0xeb510001},
209 {0xc78, 0xea520001}, {0xc78, 0xe9530001},
210 {0xc78, 0xe8540001}, {0xc78, 0xe7550001},
211 {0xc78, 0xe6560001}, {0xc78, 0xe5570001},
212 {0xc78, 0xe4580001}, {0xc78, 0xe3590001},
213 {0xc78, 0xa65a0001}, {0xc78, 0xa55b0001},
214 {0xc78, 0xa45c0001}, {0xc78, 0xa35d0001},
215 {0xc78, 0x675e0001}, {0xc78, 0x665f0001},
216 {0xc78, 0x65600001}, {0xc78, 0x64610001},
217 {0xc78, 0x63620001}, {0xc78, 0x62630001},
218 {0xc78, 0x61640001}, {0xc78, 0x48650001},
219 {0xc78, 0x47660001}, {0xc78, 0x46670001},
220 {0xc78, 0x45680001}, {0xc78, 0x44690001},
221 {0xc78, 0x436a0001}, {0xc78, 0x426b0001},
222 {0xc78, 0x286c0001}, {0xc78, 0x276d0001},
223 {0xc78, 0x266e0001}, {0xc78, 0x256f0001},
224 {0xc78, 0x24700001}, {0xc78, 0x09710001},
225 {0xc78, 0x08720001}, {0xc78, 0x07730001},
226 {0xc78, 0x06740001}, {0xc78, 0x05750001},
227 {0xc78, 0x04760001}, {0xc78, 0x03770001},
228 {0xc78, 0x02780001}, {0xc78, 0x01790001},
229 {0xc78, 0x017a0001}, {0xc78, 0x017b0001},
230 {0xc78, 0x017c0001}, {0xc78, 0x017d0001},
231 {0xc78, 0x017e0001}, {0xc78, 0x017f0001},
232 {0xc50, 0x69553422},
233 {0xc50, 0x69553420},
234 {0x824, 0x00390204},
235 {0xffff, 0xffffffff}
239 {0x00, 0x00010000}, {0xb0, 0x000dffe0},
240 {0xfe, 0x00000000}, {0xfe, 0x00000000},
241 {0xfe, 0x00000000}, {0xb1, 0x00000018},
242 {0xfe, 0x00000000}, {0xfe, 0x00000000},
243 {0xfe, 0x00000000}, {0xb2, 0x00084c00},
244 {0xb5, 0x0000d2cc}, {0xb6, 0x000925aa},
245 {0xb7, 0x00000010}, {0xb8, 0x0000907f},
246 {0x5c, 0x00000002}, {0x7c, 0x00000002},
247 {0x7e, 0x00000005}, {0x8b, 0x0006fc00},
248 {0xb0, 0x000ff9f0}, {0x1c, 0x000739d2},
249 {0x1e, 0x00000000}, {0xdf, 0x00000780},
250 {0x50, 0x00067435},
253 * 0x51 for package types TFBGA90, TFBGA80, and TFBGA79. However
257 {0x51, 0x0006b04e},
258 {0x52, 0x000007d2}, {0x53, 0x00000000},
259 {0x54, 0x00050400}, {0x55, 0x0004026e},
260 {0xdd, 0x0000004c}, {0x70, 0x00067435},
262 * 0x71 has same package type condition as for register 0x51
264 {0x71, 0x0006b04e},
265 {0x72, 0x000007d2}, {0x73, 0x00000000},
266 {0x74, 0x00050400}, {0x75, 0x0004026e},
267 {0xef, 0x00000100}, {0x34, 0x0000add7},
268 {0x35, 0x00005c00}, {0x34, 0x00009dd4},
269 {0x35, 0x00005000}, {0x34, 0x00008dd1},
270 {0x35, 0x00004400}, {0x34, 0x00007dce},
271 {0x35, 0x00003800}, {0x34, 0x00006cd1},
272 {0x35, 0x00004400}, {0x34, 0x00005cce},
273 {0x35, 0x00003800}, {0x34, 0x000048ce},
274 {0x35, 0x00004400}, {0x34, 0x000034ce},
275 {0x35, 0x00003800}, {0x34, 0x00002451},
276 {0x35, 0x00004400}, {0x34, 0x0000144e},
277 {0x35, 0x00003800}, {0x34, 0x00000051},
278 {0x35, 0x00004400}, {0xef, 0x00000000},
279 {0xef, 0x00000100}, {0xed, 0x00000010},
280 {0x44, 0x0000add7}, {0x44, 0x00009dd4},
281 {0x44, 0x00008dd1}, {0x44, 0x00007dce},
282 {0x44, 0x00006cc1}, {0x44, 0x00005cce},
283 {0x44, 0x000044d1}, {0x44, 0x000034ce},
284 {0x44, 0x00002451}, {0x44, 0x0000144e},
285 {0x44, 0x00000051}, {0xef, 0x00000000},
286 {0xed, 0x00000000}, {0x7f, 0x00020080},
287 {0xef, 0x00002000}, {0x3b, 0x000380ef},
288 {0x3b, 0x000302fe}, {0x3b, 0x00028ce6},
289 {0x3b, 0x000200bc}, {0x3b, 0x000188a5},
290 {0x3b, 0x00010fbc}, {0x3b, 0x00008f71},
291 {0x3b, 0x00000900}, {0xef, 0x00000000},
292 {0xed, 0x00000001}, {0x40, 0x000380ef},
293 {0x40, 0x000302fe}, {0x40, 0x00028ce6},
294 {0x40, 0x000200bc}, {0x40, 0x000188a5},
295 {0x40, 0x00010fbc}, {0x40, 0x00008f71},
296 {0x40, 0x00000900}, {0xed, 0x00000000},
297 {0x82, 0x00080000}, {0x83, 0x00008000},
298 {0x84, 0x00048d80}, {0x85, 0x00068000},
299 {0xa2, 0x00080000}, {0xa3, 0x00008000},
300 {0xa4, 0x00048d80}, {0xa5, 0x00068000},
301 {0xed, 0x00000002}, {0xef, 0x00000002},
302 {0x56, 0x00000032}, {0x76, 0x00000032},
303 {0x01, 0x00000780},
304 {0xff, 0xffffffff}
310 int reqnum = 0; in rtl8723bu_write_btreg()
312 memset(&h2c, 0, sizeof(struct h2c_cmd)); in rtl8723bu_write_btreg()
314 h2c.bt_mp_oper.operreq = 0 | (reqnum << 4); in rtl8723bu_write_btreg()
320 memset(&h2c, 0, sizeof(struct h2c_cmd)); in rtl8723bu_write_btreg()
322 h2c.bt_mp_oper.operreq = 0 | (reqnum << 4); in rtl8723bu_write_btreg()
338 val8 &= ~BIT(0); in rtl8723bu_reset_8051()
350 val8 |= BIT(0); in rtl8723bu_reset_8051()
364 tx_idx = 0; in rtl8723b_set_tx_power()
369 val32 &= 0xffff00ff; in rtl8723b_set_tx_power()
374 val32 &= 0xff; in rtl8723b_set_tx_power()
401 if (efuse->rtl_id != cpu_to_le16(0x8129)) in rtl8723bu_parse_efuse()
418 priv->ofdm_tx_power_diff[0].a = in rtl8723bu_parse_efuse()
420 priv->ofdm_tx_power_diff[0].b = in rtl8723bu_parse_efuse()
423 priv->ht20_tx_power_diff[0].a = in rtl8723bu_parse_efuse()
425 priv->ht20_tx_power_diff[0].b = in rtl8723bu_parse_efuse()
428 priv->ht40_tx_power_diff[0].a = 0; in rtl8723bu_parse_efuse()
429 priv->ht40_tx_power_diff[0].b = 0; in rtl8723bu_parse_efuse()
449 priv->xtalk = priv->efuse_wifi.efuse8723bu.xtal_k & 0x3f; in rtl8723bu_parse_efuse()
459 "%s: dumping efuse (0x%02zx bytes):\n", in rtl8723bu_parse_efuse()
461 for (i = 0; i < sizeof(struct rtl8723bu_efuse); i += 8) in rtl8723bu_parse_efuse()
465 return 0; in rtl8723bu_parse_efuse()
491 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00); in rtl8723bu_init_phy_bb()
493 /* 6. 0x1f[7:0] = 0x07 */ in rtl8723bu_init_phy_bb()
498 rtl8xxxu_write8(priv, REG_SYS_FUNC, 0xe3); in rtl8723bu_init_phy_bb()
499 rtl8xxxu_write8(priv, REG_AFE_XTAL_CTRL + 1, 0x80); in rtl8723bu_init_phy_bb()
513 rtl8xxxu_write_rfreg(priv, RF_A, 0xb0, 0xdfbe0); in rtl8723bu_init_phy_rf()
514 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, 0x8c01); in rtl8723bu_init_phy_rf()
516 rtl8xxxu_write_rfreg(priv, RF_A, 0xb0, 0xdffe0); in rtl8723bu_init_phy_rf()
546 val32 |= (BIT(0) | BIT(1)); in rtl8723bu_phy_init_antenna_selection()
550 val32 &= 0xffffff00; in rtl8723bu_phy_init_antenna_selection()
551 val32 |= 0x77; in rtl8723bu_phy_init_antenna_selection()
562 int result = 0; in rtl8723bu_iqk_path_a()
570 val32 &= 0x000000ff; in rtl8723bu_iqk_path_a()
577 val32 |= 0x80000; in rtl8723bu_iqk_path_a()
579 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x20000); in rtl8723bu_iqk_path_a()
580 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0003f); in rtl8723bu_iqk_path_a()
581 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xc7f87); in rtl8723bu_iqk_path_a()
586 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8723bu_iqk_path_a()
587 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8723bu_iqk_path_a()
590 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c); in rtl8723bu_iqk_path_a()
591 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c); in rtl8723bu_iqk_path_a()
592 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c); in rtl8723bu_iqk_path_a()
593 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c); in rtl8723bu_iqk_path_a()
595 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x821403ea); in rtl8723bu_iqk_path_a()
596 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28110000); in rtl8723bu_iqk_path_a()
597 rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82110000); in rtl8723bu_iqk_path_a()
598 rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x28110000); in rtl8723bu_iqk_path_a()
601 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911); in rtl8723bu_iqk_path_a()
607 val32 &= 0x000000ff; in rtl8723bu_iqk_path_a()
608 val32 |= 0x80800000; in rtl8723bu_iqk_path_a()
616 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000000); in rtl8723bu_iqk_path_a()
618 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000280); in rtl8723bu_iqk_path_a()
624 rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00000800); in rtl8723bu_iqk_path_a()
627 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8723bu_iqk_path_a()
628 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8723bu_iqk_path_a()
636 rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00001800); in rtl8723bu_iqk_path_a()
643 val32 &= 0x000000ff; in rtl8723bu_iqk_path_a()
651 val32 = (reg_e9c >> 16) & 0x3ff; in rtl8723bu_iqk_path_a()
652 if (val32 & 0x200) in rtl8723bu_iqk_path_a()
653 val32 = 0x400 - val32; in rtl8723bu_iqk_path_a()
656 ((reg_e94 & 0x03ff0000) != 0x01420000) && in rtl8723bu_iqk_path_a()
657 ((reg_e9c & 0x03ff0000) != 0x00420000) && in rtl8723bu_iqk_path_a()
658 ((reg_e94 & 0x03ff0000) < 0x01100000) && in rtl8723bu_iqk_path_a()
659 ((reg_e94 & 0x03ff0000) > 0x00f00000) && in rtl8723bu_iqk_path_a()
660 val32 < 0xf) in rtl8723bu_iqk_path_a()
661 result |= 0x01; in rtl8723bu_iqk_path_a()
672 int result = 0; in rtl8723bu_rx_iqk_path_a()
680 val32 &= 0x000000ff; in rtl8723bu_rx_iqk_path_a()
687 val32 |= 0x80000; in rtl8723bu_rx_iqk_path_a()
689 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8723bu_rx_iqk_path_a()
690 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0001f); in rtl8723bu_rx_iqk_path_a()
691 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf7fb7); in rtl8723bu_rx_iqk_path_a()
696 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8723bu_rx_iqk_path_a()
697 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8723bu_rx_iqk_path_a()
700 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c); in rtl8723bu_rx_iqk_path_a()
701 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c); in rtl8723bu_rx_iqk_path_a()
702 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c); in rtl8723bu_rx_iqk_path_a()
703 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c); in rtl8723bu_rx_iqk_path_a()
705 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160ff0); in rtl8723bu_rx_iqk_path_a()
706 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28110000); in rtl8723bu_rx_iqk_path_a()
707 rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82110000); in rtl8723bu_rx_iqk_path_a()
708 rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x28110000); in rtl8723bu_rx_iqk_path_a()
711 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911); in rtl8723bu_rx_iqk_path_a()
717 val32 &= 0x000000ff; in rtl8723bu_rx_iqk_path_a()
718 val32 |= 0x80800000; in rtl8723bu_rx_iqk_path_a()
726 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000000); in rtl8723bu_rx_iqk_path_a()
728 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000280); in rtl8723bu_rx_iqk_path_a()
734 rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00000800); in rtl8723bu_rx_iqk_path_a()
737 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8723bu_rx_iqk_path_a()
738 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8723bu_rx_iqk_path_a()
746 rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00001800); in rtl8723bu_rx_iqk_path_a()
753 val32 &= 0x000000ff; in rtl8723bu_rx_iqk_path_a()
761 val32 = (reg_e9c >> 16) & 0x3ff; in rtl8723bu_rx_iqk_path_a()
762 if (val32 & 0x200) in rtl8723bu_rx_iqk_path_a()
763 val32 = 0x400 - val32; in rtl8723bu_rx_iqk_path_a()
766 ((reg_e94 & 0x03ff0000) != 0x01420000) && in rtl8723bu_rx_iqk_path_a()
767 ((reg_e9c & 0x03ff0000) != 0x00420000) && in rtl8723bu_rx_iqk_path_a()
768 ((reg_e94 & 0x03ff0000) < 0x01100000) && in rtl8723bu_rx_iqk_path_a()
769 ((reg_e94 & 0x03ff0000) > 0x00f00000) && in rtl8723bu_rx_iqk_path_a()
770 val32 < 0xf) in rtl8723bu_rx_iqk_path_a()
771 result |= 0x01; in rtl8723bu_rx_iqk_path_a()
775 val32 = 0x80007c00 | (reg_e94 &0x3ff0000) | in rtl8723bu_rx_iqk_path_a()
776 ((reg_e9c & 0x3ff0000) >> 16); in rtl8723bu_rx_iqk_path_a()
783 val32 &= 0x000000ff; in rtl8723bu_rx_iqk_path_a()
786 val32 |= 0x80000; in rtl8723bu_rx_iqk_path_a()
788 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8723bu_rx_iqk_path_a()
789 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0001f); in rtl8723bu_rx_iqk_path_a()
790 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf7d77); in rtl8723bu_rx_iqk_path_a()
795 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_DF, 0xf80); in rtl8723bu_rx_iqk_path_a()
796 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_55, 0x4021f); in rtl8723bu_rx_iqk_path_a()
801 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8723bu_rx_iqk_path_a()
804 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c); in rtl8723bu_rx_iqk_path_a()
805 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x18008c1c); in rtl8723bu_rx_iqk_path_a()
806 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c); in rtl8723bu_rx_iqk_path_a()
807 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c); in rtl8723bu_rx_iqk_path_a()
809 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82110000); in rtl8723bu_rx_iqk_path_a()
810 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x2816001f); in rtl8723bu_rx_iqk_path_a()
811 rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82110000); in rtl8723bu_rx_iqk_path_a()
812 rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x28110000); in rtl8723bu_rx_iqk_path_a()
815 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a8d1); in rtl8723bu_rx_iqk_path_a()
821 val32 &= 0x000000ff; in rtl8723bu_rx_iqk_path_a()
822 val32 |= 0x80800000; in rtl8723bu_rx_iqk_path_a()
826 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000000); in rtl8723bu_rx_iqk_path_a()
828 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000280); in rtl8723bu_rx_iqk_path_a()
833 rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00000800); in rtl8723bu_rx_iqk_path_a()
836 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8723bu_rx_iqk_path_a()
837 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8723bu_rx_iqk_path_a()
845 rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00001800); in rtl8723bu_rx_iqk_path_a()
852 val32 &= 0x000000ff; in rtl8723bu_rx_iqk_path_a()
859 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_DF, 0x780); in rtl8723bu_rx_iqk_path_a()
861 val32 = (reg_eac >> 16) & 0x3ff; in rtl8723bu_rx_iqk_path_a()
862 if (val32 & 0x200) in rtl8723bu_rx_iqk_path_a()
863 val32 = 0x400 - val32; in rtl8723bu_rx_iqk_path_a()
866 ((reg_ea4 & 0x03ff0000) != 0x01320000) && in rtl8723bu_rx_iqk_path_a()
867 ((reg_eac & 0x03ff0000) != 0x00360000) && in rtl8723bu_rx_iqk_path_a()
868 ((reg_ea4 & 0x03ff0000) < 0x01100000) && in rtl8723bu_rx_iqk_path_a()
869 ((reg_ea4 & 0x03ff0000) > 0x00f00000) && in rtl8723bu_rx_iqk_path_a()
870 val32 < 0xf) in rtl8723bu_rx_iqk_path_a()
871 result |= 0x02; in rtl8723bu_rx_iqk_path_a()
905 u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff; in rtl8723bu_phy_iqcalibrate()
906 u8 xb_agc = rtl8xxxu_read32(priv, REG_OFDM0_XB_AGC_CORE1) & 0xff; in rtl8723bu_phy_iqcalibrate()
913 if (t == 0) { in rtl8723bu_phy_iqcalibrate()
928 val32 |= 0x0f000000; in rtl8723bu_phy_iqcalibrate()
931 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8723bu_phy_iqcalibrate()
932 rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4); in rtl8723bu_phy_iqcalibrate()
933 rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_SW_CTRL, 0x22204000); in rtl8723bu_phy_iqcalibrate()
940 val32 &= 0x000000ff; in rtl8723bu_phy_iqcalibrate()
944 val32 |= 0x80000; in rtl8723bu_phy_iqcalibrate()
947 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8723bu_phy_iqcalibrate()
948 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0001f); in rtl8723bu_phy_iqcalibrate()
949 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf7fb7); in rtl8723bu_phy_iqcalibrate()
952 val32 |= 0x20; in rtl8723bu_phy_iqcalibrate()
955 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_43, 0x60fbd); in rtl8723bu_phy_iqcalibrate()
957 for (i = 0; i < retry; i++) { in rtl8723bu_phy_iqcalibrate()
959 if (path_a_ok == 0x01) { in rtl8723bu_phy_iqcalibrate()
961 val32 &= 0x000000ff; in rtl8723bu_phy_iqcalibrate()
966 result[t][0] = (val32 >> 16) & 0x3ff; in rtl8723bu_phy_iqcalibrate()
969 result[t][1] = (val32 >> 16) & 0x3ff; in rtl8723bu_phy_iqcalibrate()
978 for (i = 0; i < retry; i++) { in rtl8723bu_phy_iqcalibrate()
980 if (path_a_ok == 0x03) { in rtl8723bu_phy_iqcalibrate()
983 result[t][2] = (val32 >> 16) & 0x3ff; in rtl8723bu_phy_iqcalibrate()
986 result[t][3] = (val32 >> 16) & 0x3ff; in rtl8723bu_phy_iqcalibrate()
1004 val32 &= 0x000000ff; in rtl8723bu_phy_iqcalibrate()
1006 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_AC, 0x10000); in rtl8723bu_phy_iqcalibrate()
1009 val32 &= 0x000000ff; in rtl8723bu_phy_iqcalibrate()
1010 val32 |= 0x80800000; in rtl8723bu_phy_iqcalibrate()
1016 for (i = 0; i < retry; i++) { in rtl8723bu_phy_iqcalibrate()
1018 if (path_b_ok == 0x03) { in rtl8723bu_phy_iqcalibrate()
1020 result[t][4] = (val32 >> 16) & 0x3ff; in rtl8723bu_phy_iqcalibrate()
1022 result[t][5] = (val32 >> 16) & 0x3ff; in rtl8723bu_phy_iqcalibrate()
1030 for (i = 0; i < retry; i++) { in rtl8723bu_phy_iqcalibrate()
1032 if (path_a_ok == 0x03) { in rtl8723bu_phy_iqcalibrate()
1035 result[t][6] = (val32 >> 16) & 0x3ff; in rtl8723bu_phy_iqcalibrate()
1038 result[t][7] = (val32 >> 16) & 0x3ff; in rtl8723bu_phy_iqcalibrate()
1050 val32 &= 0x000000ff; in rtl8723bu_phy_iqcalibrate()
1067 val32 &= 0xffffff00; in rtl8723bu_phy_iqcalibrate()
1068 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | 0x50); in rtl8723bu_phy_iqcalibrate()
1073 val32 &= 0xffffff00; in rtl8723bu_phy_iqcalibrate()
1075 val32 | 0x50); in rtl8723bu_phy_iqcalibrate()
1080 /* Load 0xe30 IQC default value */ in rtl8723bu_phy_iqcalibrate()
1081 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x01008c00); in rtl8723bu_phy_iqcalibrate()
1082 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x01008c00); in rtl8723bu_phy_iqcalibrate()
1095 s32 reg_tmp = 0; in rtl8723bu_phy_iq_calibrate()
1100 memset(result, 0, sizeof(result)); in rtl8723bu_phy_iq_calibrate()
1108 for (i = 0; i < 3; i++) { in rtl8723bu_phy_iq_calibrate()
1113 result, 0, 1); in rtl8723bu_phy_iq_calibrate()
1115 candidate = 0; in rtl8723bu_phy_iq_calibrate()
1122 result, 0, 2); in rtl8723bu_phy_iq_calibrate()
1124 candidate = 0; in rtl8723bu_phy_iq_calibrate()
1133 for (i = 0; i < 8; i++) in rtl8723bu_phy_iq_calibrate()
1144 for (i = 0; i < 4; i++) { in rtl8723bu_phy_iq_calibrate()
1145 reg_e94 = result[i][0]; in rtl8723bu_phy_iq_calibrate()
1155 if (candidate >= 0) { in rtl8723bu_phy_iq_calibrate()
1156 reg_e94 = result[candidate][0]; in rtl8723bu_phy_iq_calibrate()
1176 reg_e94 = reg_eb4 = priv->rege94 = priv->regeb4 = 0x100; in rtl8723bu_phy_iq_calibrate()
1177 reg_e9c = reg_ebc = priv->rege9c = priv->regebc = 0x0; in rtl8723bu_phy_iq_calibrate()
1180 if (reg_e94 && candidate >= 0) in rtl8723bu_phy_iq_calibrate()
1182 candidate, (reg_ea4 == 0)); in rtl8723bu_phy_iq_calibrate()
1186 candidate, (reg_ec4 == 0)); in rtl8723bu_phy_iq_calibrate()
1194 val32 |= 0x80000; in rtl8723bu_phy_iq_calibrate()
1196 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x18000); in rtl8723bu_phy_iq_calibrate()
1197 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0001f); in rtl8723bu_phy_iq_calibrate()
1198 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xe6177); in rtl8723bu_phy_iq_calibrate()
1200 val32 |= 0x20; in rtl8723bu_phy_iq_calibrate()
1202 rtl8xxxu_write_rfreg(priv, RF_A, 0x43, 0x300bd); in rtl8723bu_phy_iq_calibrate()
1207 rtl8xxxu_gen2_prepare_calibrate(priv, 0); in rtl8723bu_phy_iq_calibrate()
1215 int count, ret = 0; in rtl8723bu_active_to_emu()
1218 rtl8xxxu_write8(priv, REG_RF_CTRL, 0); in rtl8723bu_active_to_emu()
1225 /* Release WLON reset 0x04[16]= 1*/ in rtl8723bu_active_to_emu()
1230 /* 0x0005[1] = 1 turn off MAC by HW state machine*/ in rtl8723bu_active_to_emu()
1237 if ((val8 & BIT(1)) == 0) in rtl8723bu_active_to_emu()
1254 /* 0x0000[5] = 1 analog Ips to digital, 1:isolation */ in rtl8723bu_active_to_emu()
1259 /* 0x0020[0] = 0 disable LDOA12 MACRO block*/ in rtl8723bu_active_to_emu()
1272 int count, ret = 0; in rtl8723b_emu_to_active()
1274 /* 0x20[0] = 1 enable LDOA12 MACRO block for all interface */ in rtl8723b_emu_to_active()
1279 /* 0x67[0] = 0 to disable BT_GPS_SEL pins*/ in rtl8723b_emu_to_active()
1280 val8 = rtl8xxxu_read8(priv, 0x0067); in rtl8723b_emu_to_active()
1282 rtl8xxxu_write8(priv, 0x0067, val8); in rtl8723b_emu_to_active()
1286 /* 0x00[5] = 0 release analog Ips to digital, 1:isolation */ in rtl8723b_emu_to_active()
1291 /* Disable SW LPS 0x04[10]= 0 */ in rtl8723b_emu_to_active()
1296 /* Wait until 0x04[17] = 1 power ready */ in rtl8723b_emu_to_active()
1312 /* Release WLON reset 0x04[16]= 1*/ in rtl8723b_emu_to_active()
1317 /* Disable HWPDN 0x04[15]= 0*/ in rtl8723b_emu_to_active()
1327 /* Set, then poll until 0 */ in rtl8723b_emu_to_active()
1334 if ((val32 & APS_FSMCO_MAC_ENABLE) == 0) { in rtl8723b_emu_to_active()
1335 ret = 0; in rtl8723b_emu_to_active()
1366 /* Enable HSISR GPIO[C:0] interrupt */ in rtl8723b_emu_to_active()
1368 val8 |= BIT(0); in rtl8723b_emu_to_active()
1418 rtl8xxxu_write8(priv, REG_PAD_CTRL1 + 3, 0x20); in rtl8723bu_power_on()
1424 rtl8xxxu_write8(priv, REG_BT_CONTROL_8723BU + 1, 0x18); in rtl8723bu_power_on()
1425 rtl8xxxu_write8(priv, REG_WLAN_ACT_CONTROL_8723B, 0x04); in rtl8723bu_power_on()
1426 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00); in rtl8723bu_power_on()
1428 rtl8xxxu_write8(priv, 0xfe08, 0x01); in rtl8723bu_power_on()
1459 rtl8xxxu_write8(priv, REG_CR, 0x0000); in rtl8723bu_power_off()
1473 rtl8xxxu_write8(priv, REG_MCU_FW_DL, 0x00); in rtl8723bu_power_off()
1481 /* 0x48[16] = 1 to enable GPIO9 as EXT wakeup */ in rtl8723bu_power_off()
1483 val8 |= BIT(0); in rtl8723bu_power_off()
1498 * No indication anywhere as to what 0x0790 does. The 2 antenna in rtl8723b_enable_rf()
1501 rtl8xxxu_write8(priv, 0x0790, 0x05); in rtl8723b_enable_rf()
1503 * 0x0778 seems to be related to enabling the number of antennas in rtl8723b_enable_rf()
1505 * to 0x03, while halbtc8723b1ant_InitHwConfig() sets it to 0x01 in rtl8723b_enable_rf()
1507 rtl8xxxu_write8(priv, 0x0778, 0x01); in rtl8723b_enable_rf()
1513 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_IQADJ_G1, 0x780); in rtl8723b_enable_rf()
1515 rtl8723bu_write_btreg(priv, 0x3c, 0x15); /* BT TRx Mask on */ in rtl8723b_enable_rf()
1520 memset(&h2c, 0, sizeof(struct h2c_cmd)); in rtl8723b_enable_rf()
1522 h2c.bt_grant.data = 0; in rtl8723b_enable_rf()
1528 rtl8xxxu_write8(priv, REG_WLAN_ACT_CONTROL_8723B, 0x0c); in rtl8723b_enable_rf()
1533 val8 = rtl8xxxu_read8(priv, 0x0067); in rtl8723b_enable_rf()
1535 rtl8xxxu_write8(priv, 0x0067, val8); in rtl8723b_enable_rf()
1544 rtl8xxxu_write8(priv, 0x0974, 0xff); in rtl8723b_enable_rf()
1547 val32 |= (BIT(0) | BIT(1)); in rtl8723b_enable_rf()
1550 rtl8xxxu_write8(priv, REG_RFE_CTRL_ANTA_SRC, 0x77); in rtl8723b_enable_rf()
1561 val8 &= ~BIT(0); in rtl8723b_enable_rf()
1564 memset(&h2c, 0, sizeof(struct h2c_cmd)); in rtl8723b_enable_rf()
1567 h2c.ant_sel_rsv.int_switch_type = 0; in rtl8723b_enable_rf()
1574 * Antenna switch to BT: | 0x280, 0x00 in rtl8723b_enable_rf()
1575 * Antenna switch to WiFi: | 0x0, 0x280 in rtl8723b_enable_rf()
1576 * Antenna switch to PTA: | 0x200, 0x80 in rtl8723b_enable_rf()
1578 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x80); in rtl8723b_enable_rf()
1583 rtl8723bu_set_ps_tdma(priv, 0x08, 0x00, 0x00, 0x00, 0x00); in rtl8723b_enable_rf()
1585 rtl8xxxu_write32(priv, REG_BT_COEX_TABLE1, 0x55555555); in rtl8723b_enable_rf()
1586 rtl8xxxu_write32(priv, REG_BT_COEX_TABLE2, 0x55555555); in rtl8723b_enable_rf()
1587 rtl8xxxu_write32(priv, REG_BT_COEX_TABLE3, 0x00ffffff); in rtl8723b_enable_rf()
1588 rtl8xxxu_write8(priv, REG_BT_COEX_TABLE4, 0x03); in rtl8723b_enable_rf()
1590 memset(&h2c, 0, sizeof(struct h2c_cmd)); in rtl8723b_enable_rf()
1592 h2c.bt_info.data = BIT(0); in rtl8723b_enable_rf()
1595 memset(&h2c, 0, sizeof(struct h2c_cmd)); in rtl8723b_enable_rf()
1597 h2c.ignore_wlan.data = 0; in rtl8723b_enable_rf()
1614 agg_rx &= ~0xff0f; in rtl8723bu_init_aggregation()
1624 /* Time duration for NHM unit: 4us, 0x2710=40ms */ in rtl8723bu_init_statistics()
1625 rtl8xxxu_write16(priv, REG_NHM_TIMER_8723B + 2, 0x2710); in rtl8723bu_init_statistics()
1626 rtl8xxxu_write16(priv, REG_NHM_TH9_TH10_8723B + 2, 0xffff); in rtl8723bu_init_statistics()
1627 rtl8xxxu_write32(priv, REG_NHM_TH3_TO_TH0_8723B, 0xffffff52); in rtl8723bu_init_statistics()
1628 rtl8xxxu_write32(priv, REG_NHM_TH7_TO_TH4_8723B, 0xffffffff); in rtl8723bu_init_statistics()
1631 val32 |= 0xff; in rtl8723bu_init_statistics()
1672 .adda_1t_init = 0x01c00014,
1673 .adda_1t_path_on = 0x01c00014,
1674 .adda_2t_path_on_a = 0x01c00014,
1675 .adda_2t_path_on_b = 0x01c00014,
1676 .trxff_boundary = 0x3f7f,