77 #include "iwl-trans.h"
248 static inline __le16 iwl_get_closed_rb_stts(struct iwl_trans *trans,  in iwl_get_closed_rb_stts()  argument
251 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {  in iwl_get_closed_rb_stts()
339  * @trans: pointer to the generic transport area
395 	struct iwl_trans *trans;  member
472 IWL_TRANS_GET_PCIE_TRANS(struct iwl_trans *trans)  in IWL_TRANS_GET_PCIE_TRANS()  argument
474 	return (void *)trans->trans_specific;  in IWL_TRANS_GET_PCIE_TRANS()
477 static inline void iwl_pcie_clear_irq(struct iwl_trans *trans,  in iwl_pcie_clear_irq()  argument
488 	iwl_write32(trans, CSR_MSIX_AUTOMASK_ST_AD, BIT(entry->entry));  in iwl_pcie_clear_irq()
499  * Convention: trans API functions: iwl_trans_pcie_XXX
506 void iwl_trans_pcie_free(struct iwl_trans *trans);
511 int iwl_pcie_rx_init(struct iwl_trans *trans);
512 int iwl_pcie_gen2_rx_init(struct iwl_trans *trans);
517 int iwl_pcie_rx_stop(struct iwl_trans *trans);
518 void iwl_pcie_rx_free(struct iwl_trans *trans);
519 void iwl_pcie_free_rbs_pool(struct iwl_trans *trans);
522 void iwl_pcie_rxq_alloc_rbs(struct iwl_trans *trans, gfp_t priority,
529 int iwl_pcie_alloc_ict(struct iwl_trans *trans);
530 void iwl_pcie_free_ict(struct iwl_trans *trans);
531 void iwl_pcie_reset_ict(struct iwl_trans *trans);
532 void iwl_pcie_disable_ict(struct iwl_trans *trans);
537 int iwl_pcie_tx_init(struct iwl_trans *trans);
538 void iwl_pcie_tx_start(struct iwl_trans *trans, u32 scd_base_addr);
539 int iwl_pcie_tx_stop(struct iwl_trans *trans);
540 void iwl_pcie_tx_free(struct iwl_trans *trans);
541 bool iwl_trans_pcie_txq_enable(struct iwl_trans *trans, int queue, u16 ssn,
544 void iwl_trans_pcie_txq_disable(struct iwl_trans *trans, int queue,
546 void iwl_trans_pcie_txq_set_shared_mode(struct iwl_trans *trans, u32 txq_id,
548 int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,
550 void iwl_pcie_txq_check_wrptrs(struct iwl_trans *trans);
551 int iwl_trans_pcie_send_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd);
552 void iwl_pcie_hcmd_complete(struct iwl_trans *trans,
554 void iwl_trans_pcie_reclaim(struct iwl_trans *trans, int txq_id, int ssn,
556 void iwl_trans_pcie_set_q_ptrs(struct iwl_trans *trans, int txq_id, int ptr);
557 void iwl_trans_pcie_tx_reset(struct iwl_trans *trans);
562 void iwl_pcie_dump_csr(struct iwl_trans *trans);
567 static inline void _iwl_disable_interrupts(struct iwl_trans *trans)  in _iwl_disable_interrupts()  argument
569 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in _iwl_disable_interrupts()
571 	clear_bit(STATUS_INT_ENABLED, &trans->status);  in _iwl_disable_interrupts()
574 		iwl_write32(trans, CSR_INT_MASK, 0x00000000);  in _iwl_disable_interrupts()
578 		iwl_write32(trans, CSR_INT, 0xffffffff);  in _iwl_disable_interrupts()
579 		iwl_write32(trans, CSR_FH_INT_STATUS, 0xffffffff);  in _iwl_disable_interrupts()
582 		iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD,  in _iwl_disable_interrupts()
584 		iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD,  in _iwl_disable_interrupts()
587 	IWL_DEBUG_ISR(trans, "Disabled interrupts\n");  in _iwl_disable_interrupts()
608 static inline void iwl_pcie_ctxt_info_free_fw_img(struct iwl_trans *trans)  in iwl_pcie_ctxt_info_free_fw_img()  argument
610 	struct iwl_self_init_dram *dram = &trans->init_dram;  in iwl_pcie_ctxt_info_free_fw_img()
619 		dma_free_coherent(trans->dev, dram->fw[i].size,  in iwl_pcie_ctxt_info_free_fw_img()
627 static inline void iwl_disable_interrupts(struct iwl_trans *trans)  in iwl_disable_interrupts()  argument
629 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_disable_interrupts()
632 	_iwl_disable_interrupts(trans);  in iwl_disable_interrupts()
636 static inline void _iwl_enable_interrupts(struct iwl_trans *trans)  in _iwl_enable_interrupts()  argument
638 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in _iwl_enable_interrupts()
640 	IWL_DEBUG_ISR(trans, "Enabling interrupts\n");  in _iwl_enable_interrupts()
641 	set_bit(STATUS_INT_ENABLED, &trans->status);  in _iwl_enable_interrupts()
644 		iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask);  in _iwl_enable_interrupts()
652 		iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD,  in _iwl_enable_interrupts()
654 		iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD,  in _iwl_enable_interrupts()
659 static inline void iwl_enable_interrupts(struct iwl_trans *trans)  in iwl_enable_interrupts()  argument
661 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_enable_interrupts()
664 	_iwl_enable_interrupts(trans);  in iwl_enable_interrupts()
667 static inline void iwl_enable_hw_int_msk_msix(struct iwl_trans *trans, u32 msk)  in iwl_enable_hw_int_msk_msix()  argument
669 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_enable_hw_int_msk_msix()
671 	iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, ~msk);  in iwl_enable_hw_int_msk_msix()
675 static inline void iwl_enable_fh_int_msk_msix(struct iwl_trans *trans, u32 msk)  in iwl_enable_fh_int_msk_msix()  argument
677 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_enable_fh_int_msk_msix()
679 	iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, ~msk);  in iwl_enable_fh_int_msk_msix()
683 static inline void iwl_enable_fw_load_int(struct iwl_trans *trans)  in iwl_enable_fw_load_int()  argument
685 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_enable_fw_load_int()
687 	IWL_DEBUG_ISR(trans, "Enabling FW load interrupt\n");  in iwl_enable_fw_load_int()
690 		iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask);  in iwl_enable_fw_load_int()
692 		iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD,  in iwl_enable_fw_load_int()
694 		iwl_enable_fh_int_msk_msix(trans,  in iwl_enable_fw_load_int()
699 static inline void iwl_enable_fw_load_int_ctx_info(struct iwl_trans *trans)  in iwl_enable_fw_load_int_ctx_info()  argument
701 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_enable_fw_load_int_ctx_info()
703 	IWL_DEBUG_ISR(trans, "Enabling ALIVE interrupt only\n");  in iwl_enable_fw_load_int_ctx_info()
714 		iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask);  in iwl_enable_fw_load_int_ctx_info()
716 		iwl_enable_hw_int_msk_msix(trans,  in iwl_enable_fw_load_int_ctx_info()
722 		iwl_enable_fh_int_msk_msix(trans, trans_pcie->fh_init_mask);  in iwl_enable_fw_load_int_ctx_info()
749 static inline void iwl_enable_rfkill_int(struct iwl_trans *trans)  in iwl_enable_rfkill_int()  argument
751 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_enable_rfkill_int()
753 	IWL_DEBUG_ISR(trans, "Enabling rfkill interrupt\n");  in iwl_enable_rfkill_int()
756 		iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask);  in iwl_enable_rfkill_int()
758 		iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD,  in iwl_enable_rfkill_int()
760 		iwl_enable_hw_int_msk_msix(trans,  in iwl_enable_rfkill_int()
764 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_9000) {  in iwl_enable_rfkill_int()
770 		iwl_set_bit(trans, CSR_GP_CNTRL,  in iwl_enable_rfkill_int()
775 void iwl_pcie_handle_rfkill_irq(struct iwl_trans *trans);
777 static inline bool iwl_is_rfkill_set(struct iwl_trans *trans)  in iwl_is_rfkill_set()  argument
779 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_is_rfkill_set()
786 	return !(iwl_read32(trans, CSR_GP_CNTRL) &  in iwl_is_rfkill_set()
790 static inline void __iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans,  in __iwl_trans_pcie_set_bits_mask()  argument
799 	v = iwl_read32(trans, reg);  in __iwl_trans_pcie_set_bits_mask()
802 	iwl_write32(trans, reg, v);  in __iwl_trans_pcie_set_bits_mask()
805 static inline void __iwl_trans_pcie_clear_bit(struct iwl_trans *trans,  in __iwl_trans_pcie_clear_bit()  argument
808 	__iwl_trans_pcie_set_bits_mask(trans, reg, mask, 0);  in __iwl_trans_pcie_clear_bit()
811 static inline void __iwl_trans_pcie_set_bit(struct iwl_trans *trans,  in __iwl_trans_pcie_set_bit()  argument
814 	__iwl_trans_pcie_set_bits_mask(trans, reg, mask, mask);  in __iwl_trans_pcie_set_bit()
817 static inline bool iwl_pcie_dbg_on(struct iwl_trans *trans)  in iwl_pcie_dbg_on()  argument
819 	return (trans->dbg.dest_tlv || iwl_trans_dbg_ini_valid(trans));  in iwl_pcie_dbg_on()
822 void iwl_trans_pcie_rf_kill(struct iwl_trans *trans, bool state);
823 void iwl_trans_pcie_dump_regs(struct iwl_trans *trans);
824 void iwl_trans_pcie_sync_nmi(struct iwl_trans *trans);
827 void iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans);
829 static inline void iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans) { }  in iwl_trans_pcie_dbgfs_register()  argument
835 int iwl_pcie_gen2_apm_init(struct iwl_trans *trans);
836 void iwl_pcie_apm_config(struct iwl_trans *trans);
837 int iwl_pcie_prepare_card_hw(struct iwl_trans *trans);
838 void iwl_pcie_synchronize_irqs(struct iwl_trans *trans);
839 bool iwl_pcie_check_hw_rf_kill(struct iwl_trans *trans);
840 void iwl_trans_pcie_handle_stop_rfkill(struct iwl_trans *trans,
842 void iwl_pcie_txq_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq);
843 void iwl_pcie_apm_stop_master(struct iwl_trans *trans);
845 int iwl_pcie_alloc_dma_ptr(struct iwl_trans *trans,
847 void iwl_pcie_free_dma_ptr(struct iwl_trans *trans, struct iwl_dma_ptr *ptr);
848 void iwl_pcie_apply_destination(struct iwl_trans *trans);
851 void iwl_pcie_alloc_fw_monitor(struct iwl_trans *trans, u8 max_power);
854 int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans,
856 void iwl_trans_pcie_gen2_fw_alive(struct iwl_trans *trans, u32 scd_addr);
857 int iwl_trans_pcie_gen2_send_hcmd(struct iwl_trans *trans,
859 void iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans);
860 void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans);
861 void iwl_pcie_d3_complete_suspend(struct iwl_trans *trans,