Lines Matching full:trans
52 #include "iwl-trans.h"
59 iwl_pcie_ctxt_info_dbg_enable(struct iwl_trans *trans, in iwl_pcie_ctxt_info_dbg_enable() argument
67 if (!iwl_trans_dbg_ini_valid(trans)) { in iwl_pcie_ctxt_info_dbg_enable()
68 struct iwl_dram_data *fw_mon = &trans->dbg.fw_mon; in iwl_pcie_ctxt_info_dbg_enable()
70 iwl_pcie_alloc_fw_monitor(trans, 0); in iwl_pcie_ctxt_info_dbg_enable()
75 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
85 fw_mon_cfg = &trans->dbg.fw_mon_cfg[alloc_id]; in iwl_pcie_ctxt_info_dbg_enable()
90 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
96 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
101 if (trans->dbg.fw_mon_ini[alloc_id].num_frags) { in iwl_pcie_ctxt_info_dbg_enable()
103 &trans->dbg.fw_mon_ini[alloc_id].frags[0]; in iwl_pcie_ctxt_info_dbg_enable()
107 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
110 trans->dbg.fw_mon_ini[alloc_id].num_frags); in iwl_pcie_ctxt_info_dbg_enable()
114 IWL_ERR(trans, "WRT: Invalid buffer destination\n"); in iwl_pcie_ctxt_info_dbg_enable()
121 int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, in iwl_pcie_ctxt_info_gen3_init() argument
124 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_gen3_init()
133 trans->cfg->min_txq_size); in iwl_pcie_ctxt_info_gen3_init()
156 prph_scratch = dma_alloc_coherent(trans->dev, sizeof(*prph_scratch), in iwl_pcie_ctxt_info_gen3_init()
166 cpu_to_le16((u16)iwl_read32(trans, CSR_HW_REV)); in iwl_pcie_ctxt_info_gen3_init()
176 iwl_pcie_ctxt_info_dbg_enable(trans, &prph_sc_ctrl->hwm_cfg, in iwl_pcie_ctxt_info_gen3_init()
181 ret = iwl_pcie_init_fw_sec(trans, fw, &prph_scratch->dram); in iwl_pcie_ctxt_info_gen3_init()
189 prph_info = dma_alloc_coherent(trans->dev, sizeof(*prph_info), in iwl_pcie_ctxt_info_gen3_init()
198 ctxt_info_gen3 = dma_alloc_coherent(trans->dev, in iwl_pcie_ctxt_info_gen3_init()
224 cpu_to_le64(trans->txqs.txq[trans->txqs.cmd.q_id]->dma_addr); in iwl_pcie_ctxt_info_gen3_init()
230 cpu_to_le16(RX_QUEUE_CB_SIZE(trans->cfg->num_rbds)); in iwl_pcie_ctxt_info_gen3_init()
237 iml_img = dma_alloc_coherent(trans->dev, trans->iml_len, in iwl_pcie_ctxt_info_gen3_init()
242 memcpy(iml_img, trans->iml, trans->iml_len); in iwl_pcie_ctxt_info_gen3_init()
244 iwl_enable_fw_load_int_ctx_info(trans); in iwl_pcie_ctxt_info_gen3_init()
247 iwl_write64(trans, CSR_CTXT_INFO_ADDR, in iwl_pcie_ctxt_info_gen3_init()
249 iwl_write64(trans, CSR_IML_DATA_ADDR, in iwl_pcie_ctxt_info_gen3_init()
251 iwl_write32(trans, CSR_IML_SIZE_ADDR, trans->iml_len); in iwl_pcie_ctxt_info_gen3_init()
253 iwl_set_bit(trans, CSR_CTXT_INFO_BOOT_CTRL, in iwl_pcie_ctxt_info_gen3_init()
256 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) { in iwl_pcie_ctxt_info_gen3_init()
272 iwl_write32(trans, CSR_LTR_LONG_VAL_AD, val); in iwl_pcie_ctxt_info_gen3_init()
275 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) in iwl_pcie_ctxt_info_gen3_init()
276 iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1); in iwl_pcie_ctxt_info_gen3_init()
278 iwl_set_bit(trans, CSR_GP_CNTRL, CSR_AUTO_FUNC_INIT); in iwl_pcie_ctxt_info_gen3_init()
283 dma_free_coherent(trans->dev, in iwl_pcie_ctxt_info_gen3_init()
289 dma_free_coherent(trans->dev, in iwl_pcie_ctxt_info_gen3_init()
297 void iwl_pcie_ctxt_info_gen3_free(struct iwl_trans *trans) in iwl_pcie_ctxt_info_gen3_free() argument
299 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_gen3_free()
304 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3), in iwl_pcie_ctxt_info_gen3_free()
310 iwl_pcie_ctxt_info_free_fw_img(trans); in iwl_pcie_ctxt_info_gen3_free()
312 dma_free_coherent(trans->dev, sizeof(*trans_pcie->prph_scratch), in iwl_pcie_ctxt_info_gen3_free()
318 dma_free_coherent(trans->dev, sizeof(*trans_pcie->prph_info), in iwl_pcie_ctxt_info_gen3_free()
325 int iwl_trans_pcie_ctx_info_gen3_set_pnvm(struct iwl_trans *trans, in iwl_trans_pcie_ctx_info_gen3_set_pnvm() argument
328 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
333 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
336 ret = iwl_pcie_ctxt_info_alloc_dma(trans, data, len, in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
339 IWL_DEBUG_FW(trans, "Failed to allocate PNVM DMA %d.\n", in iwl_trans_pcie_ctx_info_gen3_set_pnvm()