Lines Matching +full:host2reo +full:- +full:re +full:- +full:injection
1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
33 * 4K - 32 = 0xFE0
66 "mhi-er0",
67 "mhi-er1",
80 "host2wbm-desc-feed",
81 "host2reo-re-injection",
82 "host2reo-command",
83 "host2rxdma-monitor-ring3",
84 "host2rxdma-monitor-ring2",
85 "host2rxdma-monitor-ring1",
86 "reo2ost-exception",
87 "wbm2host-rx-release",
88 "reo2host-status",
89 "reo2host-destination-ring4",
90 "reo2host-destination-ring3",
91 "reo2host-destination-ring2",
92 "reo2host-destination-ring1",
93 "rxdma2host-monitor-destination-mac3",
94 "rxdma2host-monitor-destination-mac2",
95 "rxdma2host-monitor-destination-mac1",
96 "ppdu-end-interrupts-mac3",
97 "ppdu-end-interrupts-mac2",
98 "ppdu-end-interrupts-mac1",
99 "rxdma2host-monitor-status-ring-mac3",
100 "rxdma2host-monitor-status-ring-mac2",
101 "rxdma2host-monitor-status-ring-mac1",
102 "host2rxdma-host-buf-ring-mac3",
103 "host2rxdma-host-buf-ring-mac2",
104 "host2rxdma-host-buf-ring-mac1",
105 "rxdma2host-destination-ring-mac3",
106 "rxdma2host-destination-ring-mac2",
107 "rxdma2host-destination-ring-mac1",
108 "host2tcl-input-ring4",
109 "host2tcl-input-ring3",
110 "host2tcl-input-ring2",
111 "host2tcl-input-ring1",
112 "wbm2host-tx-completions-ring3",
113 "wbm2host-tx-completions-ring2",
114 "wbm2host-tx-completions-ring1",
115 "tcl2host-status-ring",
120 struct ath11k_base *ab = ab_pci->ab; in ath11k_pci_select_window()
124 lockdep_assert_held(&ab_pci->window_lock); in ath11k_pci_select_window()
126 if (window != ab_pci->register_window) { in ath11k_pci_select_window()
128 ab->mem + WINDOW_REG_ADDRESS); in ath11k_pci_select_window()
129 ab_pci->register_window = window; in ath11k_pci_select_window()
137 /* for offset beyond BAR + 4K - 32, may in ath11k_pci_write32()
140 if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) && in ath11k_pci_write32()
142 mhi_device_get_sync(ab_pci->mhi_ctrl->mhi_dev); in ath11k_pci_write32()
145 iowrite32(value, ab->mem + offset); in ath11k_pci_write32()
147 spin_lock_bh(&ab_pci->window_lock); in ath11k_pci_write32()
149 iowrite32(value, ab->mem + WINDOW_START + (offset & WINDOW_RANGE_MASK)); in ath11k_pci_write32()
150 spin_unlock_bh(&ab_pci->window_lock); in ath11k_pci_write32()
153 if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) && in ath11k_pci_write32()
155 mhi_device_put(ab_pci->mhi_ctrl->mhi_dev); in ath11k_pci_write32()
163 /* for offset beyond BAR + 4K - 32, may in ath11k_pci_read32()
166 if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) && in ath11k_pci_read32()
168 mhi_device_get_sync(ab_pci->mhi_ctrl->mhi_dev); in ath11k_pci_read32()
171 val = ioread32(ab->mem + offset); in ath11k_pci_read32()
173 spin_lock_bh(&ab_pci->window_lock); in ath11k_pci_read32()
175 val = ioread32(ab->mem + WINDOW_START + (offset & WINDOW_RANGE_MASK)); in ath11k_pci_read32()
176 spin_unlock_bh(&ab_pci->window_lock); in ath11k_pci_read32()
179 if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) && in ath11k_pci_read32()
181 mhi_device_put(ab_pci->mhi_ctrl->mhi_dev); in ath11k_pci_read32()
267 struct pci_dev *pci_dev = to_pci_dev(ab->dev); in ath11k_pci_get_msi_address()
269 pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_LO, in ath11k_pci_get_msi_address()
272 pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_HI, in ath11k_pci_get_msi_address()
280 struct ath11k_base *ab = ab_pci->ab; in ath11k_pci_get_user_msi_assignment()
287 + ab_pci->msi_ep_base_data; in ath11k_pci_get_user_msi_assignment()
300 return -EINVAL; in ath11k_pci_get_user_msi_assignment()
319 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i]; in ath11k_pci_free_ext_irq()
321 for (j = 0; j < irq_grp->num_irq; j++) in ath11k_pci_free_ext_irq()
322 free_irq(ab->irq_num[irq_grp->irqs[j]], irq_grp); in ath11k_pci_free_ext_irq()
324 netif_napi_del(&irq_grp->napi); in ath11k_pci_free_ext_irq()
332 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_pci_free_irq()
336 free_irq(ab->irq_num[irq_idx], &ab->ce.ce_pipe[i]); in ath11k_pci_free_irq()
347 enable_irq(ab->irq_num[irq_idx]); in ath11k_pci_ce_irq_enable()
355 disable_irq_nosync(ab->irq_num[irq_idx]); in ath11k_pci_ce_irq_disable()
362 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_pci_ce_irqs_disable()
374 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_pci_sync_ce_irqs()
379 synchronize_irq(ab->irq_num[irq_idx]); in ath11k_pci_sync_ce_irqs()
387 ath11k_ce_per_engine_service(ce_pipe->ab, ce_pipe->pipe_num); in ath11k_pci_ce_tasklet()
389 ath11k_pci_ce_irq_enable(ce_pipe->ab, ce_pipe->pipe_num); in ath11k_pci_ce_tasklet()
396 ath11k_pci_ce_irq_disable(ce_pipe->ab, ce_pipe->pipe_num); in ath11k_pci_ce_interrupt_handler()
397 tasklet_schedule(&ce_pipe->intr_tq); in ath11k_pci_ce_interrupt_handler()
406 for (i = 0; i < irq_grp->num_irq; i++) in ath11k_pci_ext_grp_disable()
407 disable_irq_nosync(irq_grp->ab->irq_num[irq_grp->irqs[i]]); in ath11k_pci_ext_grp_disable()
415 struct ath11k_ext_irq_grp *irq_grp = &sc->ext_irq_grp[i]; in __ath11k_pci_ext_irq_disable()
419 napi_synchronize(&irq_grp->napi); in __ath11k_pci_ext_irq_disable()
420 napi_disable(&irq_grp->napi); in __ath11k_pci_ext_irq_disable()
428 for (i = 0; i < irq_grp->num_irq; i++) in ath11k_pci_ext_grp_enable()
429 enable_irq(irq_grp->ab->irq_num[irq_grp->irqs[i]]); in ath11k_pci_ext_grp_enable()
437 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i]; in ath11k_pci_ext_irq_enable()
439 napi_enable(&irq_grp->napi); in ath11k_pci_ext_irq_enable()
449 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i]; in ath11k_pci_sync_ext_irqs()
451 for (j = 0; j < irq_grp->num_irq; j++) { in ath11k_pci_sync_ext_irqs()
452 irq_idx = irq_grp->irqs[j]; in ath11k_pci_sync_ext_irqs()
453 synchronize_irq(ab->irq_num[irq_idx]); in ath11k_pci_sync_ext_irqs()
469 struct ath11k_base *ab = irq_grp->ab; in ath11k_pci_ext_grp_napi_poll()
488 ath11k_dbg(irq_grp->ab, ATH11K_DBG_PCI, "ext irq:%d\n", irq); in ath11k_pci_ext_interrupt_handler()
492 napi_schedule(&irq_grp->napi); in ath11k_pci_ext_interrupt_handler()
510 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i]; in ath11k_pci_ext_irq_config()
513 irq_grp->ab = ab; in ath11k_pci_ext_irq_config()
514 irq_grp->grp_id = i; in ath11k_pci_ext_irq_config()
515 init_dummy_netdev(&irq_grp->napi_ndev); in ath11k_pci_ext_irq_config()
516 netif_napi_add(&irq_grp->napi_ndev, &irq_grp->napi, in ath11k_pci_ext_irq_config()
519 if (ab->hw_params.ring_mask->tx[i] || in ath11k_pci_ext_irq_config()
520 ab->hw_params.ring_mask->rx[i] || in ath11k_pci_ext_irq_config()
521 ab->hw_params.ring_mask->rx_err[i] || in ath11k_pci_ext_irq_config()
522 ab->hw_params.ring_mask->rx_wbm_rel[i] || in ath11k_pci_ext_irq_config()
523 ab->hw_params.ring_mask->reo_status[i] || in ath11k_pci_ext_irq_config()
524 ab->hw_params.ring_mask->rxdma2host[i] || in ath11k_pci_ext_irq_config()
525 ab->hw_params.ring_mask->host2rxdma[i] || in ath11k_pci_ext_irq_config()
526 ab->hw_params.ring_mask->rx_mon_status[i]) { in ath11k_pci_ext_irq_config()
530 irq_grp->num_irq = num_irq; in ath11k_pci_ext_irq_config()
531 irq_grp->irqs[0] = base_vector + i; in ath11k_pci_ext_irq_config()
533 for (j = 0; j < irq_grp->num_irq; j++) { in ath11k_pci_ext_irq_config()
534 int irq_idx = irq_grp->irqs[j]; in ath11k_pci_ext_irq_config()
536 int irq = ath11k_pci_get_msi_irq(ab->dev, vector); in ath11k_pci_ext_irq_config()
538 ab->irq_num[irq_idx] = irq; in ath11k_pci_ext_irq_config()
551 disable_irq_nosync(ab->irq_num[irq_idx]); in ath11k_pci_ext_irq_config()
574 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_pci_config_irq()
576 irq = ath11k_pci_get_msi_irq(ab->dev, msi_data); in ath11k_pci_config_irq()
577 ce_pipe = &ab->ce.ce_pipe[i]; in ath11k_pci_config_irq()
584 tasklet_init(&ce_pipe->intr_tq, ath11k_pci_ce_tasklet, in ath11k_pci_config_irq()
596 ab->irq_num[irq_idx] = irq; in ath11k_pci_config_irq()
609 struct ath11k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg; in ath11k_pci_init_qmi_ce_config()
611 cfg->tgt_ce = ab->hw_params.target_ce_config; in ath11k_pci_init_qmi_ce_config()
612 cfg->tgt_ce_len = ab->hw_params.target_ce_count; in ath11k_pci_init_qmi_ce_config()
614 cfg->svc_to_ce_map = ab->hw_params.svc_to_ce_map; in ath11k_pci_init_qmi_ce_config()
615 cfg->svc_to_ce_map_len = ab->hw_params.svc_to_ce_map_len; in ath11k_pci_init_qmi_ce_config()
616 ab->qmi.service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390; in ath11k_pci_init_qmi_ce_config()
618 ath11k_ce_get_shadow_config(ab, &cfg->shadow_reg_v2, in ath11k_pci_init_qmi_ce_config()
619 &cfg->shadow_reg_v2_len); in ath11k_pci_init_qmi_ce_config()
626 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_pci_ce_irqs_enable()
635 struct ath11k_base *ab = ab_pci->ab; in ath11k_pci_enable_msi()
640 num_vectors = pci_alloc_irq_vectors(ab_pci->pdev, in ath11k_pci_enable_msi()
649 return -EINVAL; in ath11k_pci_enable_msi()
654 msi_desc = irq_get_msi_desc(ab_pci->pdev->irq); in ath11k_pci_enable_msi()
657 ret = -EINVAL; in ath11k_pci_enable_msi()
661 ab_pci->msi_ep_base_data = msi_desc->msg.data; in ath11k_pci_enable_msi()
663 ath11k_dbg(ab, ATH11K_DBG_PCI, "msi base data is %d\n", ab_pci->msi_ep_base_data); in ath11k_pci_enable_msi()
668 pci_free_irq_vectors(ab_pci->pdev); in ath11k_pci_enable_msi()
675 pci_free_irq_vectors(ab_pci->pdev); in ath11k_pci_disable_msi()
680 struct ath11k_base *ab = ab_pci->ab; in ath11k_pci_claim()
685 if (device_id != ab_pci->dev_id) { in ath11k_pci_claim()
687 device_id, ab_pci->dev_id); in ath11k_pci_claim()
688 ret = -EIO; in ath11k_pci_claim()
726 ab->mem_len = pci_resource_len(pdev, ATH11K_PCI_BAR_NUM); in ath11k_pci_claim()
727 ab->mem = pci_iomap(pdev, ATH11K_PCI_BAR_NUM, 0); in ath11k_pci_claim()
728 if (!ab->mem) { in ath11k_pci_claim()
730 ret = -EIO; in ath11k_pci_claim()
734 ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot pci_mem 0x%pK\n", ab->mem); in ath11k_pci_claim()
749 struct ath11k_base *ab = ab_pci->ab; in ath11k_pci_free_region()
750 struct pci_dev *pci_dev = ab_pci->pdev; in ath11k_pci_free_region()
752 pci_iounmap(pci_dev, ab->mem); in ath11k_pci_free_region()
753 ab->mem = NULL; in ath11k_pci_free_region()
765 ab_pci->register_window = 0; in ath11k_pci_power_up()
766 clear_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags); in ath11k_pci_power_up()
767 ath11k_pci_sw_reset(ab_pci->ab); in ath11k_pci_power_up()
783 clear_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags); in ath11k_pci_power_down()
784 ath11k_pci_force_wake(ab_pci->ab); in ath11k_pci_power_down()
785 ath11k_pci_sw_reset(ab_pci->ab); in ath11k_pci_power_down()
792 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_pci_kill_tasklets()
793 struct ath11k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i]; in ath11k_pci_kill_tasklets()
798 tasklet_kill(&ce_pipe->intr_tq); in ath11k_pci_kill_tasklets()
814 set_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags); in ath11k_pci_start()
829 for (i = 0; i < ab->hw_params.svc_to_ce_map_len; i++) { in ath11k_pci_map_service_to_pipe()
830 entry = &ab->hw_params.svc_to_ce_map[i]; in ath11k_pci_map_service_to_pipe()
832 if (__le32_to_cpu(entry->service_id) != service_id) in ath11k_pci_map_service_to_pipe()
835 switch (__le32_to_cpu(entry->pipedir)) { in ath11k_pci_map_service_to_pipe()
840 *dl_pipe = __le32_to_cpu(entry->pipenum); in ath11k_pci_map_service_to_pipe()
845 *ul_pipe = __le32_to_cpu(entry->pipenum); in ath11k_pci_map_service_to_pipe()
851 *dl_pipe = __le32_to_cpu(entry->pipenum); in ath11k_pci_map_service_to_pipe()
852 *ul_pipe = __le32_to_cpu(entry->pipenum); in ath11k_pci_map_service_to_pipe()
860 return -ENOENT; in ath11k_pci_map_service_to_pipe()
887 dev_warn(&pdev->dev, "WARNING: ath11k PCI support is experimental!\n"); in ath11k_pci_probe()
889 ab = ath11k_core_alloc(&pdev->dev, sizeof(*ab_pci), ATH11K_BUS_PCI, in ath11k_pci_probe()
892 dev_err(&pdev->dev, "failed to allocate ath11k base\n"); in ath11k_pci_probe()
893 return -ENOMEM; in ath11k_pci_probe()
896 ab->dev = &pdev->dev; in ath11k_pci_probe()
899 ab_pci->dev_id = pci_dev->device; in ath11k_pci_probe()
900 ab_pci->ab = ab; in ath11k_pci_probe()
901 ab_pci->pdev = pdev; in ath11k_pci_probe()
902 ab->hif.ops = &ath11k_pci_hif_ops; in ath11k_pci_probe()
904 spin_lock_init(&ab_pci->window_lock); in ath11k_pci_probe()
912 switch (pci_dev->device) { in ath11k_pci_probe()
925 ab->hw_rev = ATH11K_HW_QCA6390_HW20; in ath11k_pci_probe()
928 dev_err(&pdev->dev, "Unsupported QCA6390 SOC hardware version: %d %d\n", in ath11k_pci_probe()
930 ret = -EOPNOTSUPP; in ath11k_pci_probe()
935 dev_err(&pdev->dev, "Unknown PCI device found: 0x%x\n", in ath11k_pci_probe()
936 pci_dev->device); in ath11k_pci_probe()
937 ret = -EOPNOTSUPP; in ath11k_pci_probe()
1011 set_bit(ATH11K_FLAG_UNREGISTERING, &ab->dev_flags); in ath11k_pci_remove()