3028 		    arvif->rate_ctrl[i] || arvif->rtscts[i]) {  in ath10k_new_peer_tid_config()
3034 			arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_new_peer_tid_config()
3048 			arg.rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_DEFAULT_LOWEST_RATE;  in ath10k_new_peer_tid_config()
6815 			      u32 *rate_ctrl_flag, u8 *rate_ctrl,  in ath10k_mac_tid_bitrate_config()  argument
6828 		*rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_AUTO;  in ath10k_mac_tid_bitrate_config()
6854 		*rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_FIXED_RATE;  in ath10k_mac_tid_bitrate_config()
6858 		*rate_ctrl = WMI_PEER_TID_CONFIG_RATE_UPPER_CAP;  in ath10k_mac_tid_bitrate_config()
6888 				arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
6905 				arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
6921 			arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
6937 			arsta->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
6938 			arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
6957 				arvif->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
6981 				arvif->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
7022 				arg->rate_ctrl =  in ath10k_mac_parse_tid_config()
7029 				arg->rate_ctrl =  in ath10k_mac_parse_tid_config()
7050 							    &arg->rate_ctrl,  in ath10k_mac_parse_tid_config()
7057 				arg->rate_ctrl = 0;  in ath10k_mac_parse_tid_config()
7096 		arg.rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_AUTO;  in ath10k_mac_reset_tid_config()
7112 			arsta->rate_ctrl[i] = 0;  in ath10k_mac_reset_tid_config()
7119 			arvif->rate_ctrl[i] = 0;  in ath10k_mac_reset_tid_config()
7167 				arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_sta_tid_cfg_wk()
7200 			    arvif->rate_ctrl[i] > WMI_TID_CONFIG_RATE_CONTROL_AUTO) {  in ath10k_sta_tid_cfg_wk()
7201 				arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()
7205 			if (arsta->rate_ctrl[i] >  in ath10k_sta_tid_cfg_wk()
7209 				arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()
7212 				arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_sta_tid_cfg_wk()
7242 		arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()