Lines Matching +full:s +full:- +full:ahb
1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2016-2017 Qualcomm Atheros, Inc. All rights reserved.
14 #include "ahb.h"
17 { .compatible = "qcom,ipq4019-wifi",
30 return &((struct ath10k_pci *)ar->drv_priv)->ahb[0]; in ath10k_ahb_priv()
37 iowrite32(value, ar_ahb->mem + offset); in ath10k_ahb_write32()
44 return ioread32(ar_ahb->mem + offset); in ath10k_ahb_read32()
51 return ioread32(ar_ahb->gcc_mem + offset); in ath10k_ahb_gcc_read32()
58 iowrite32(value, ar_ahb->tcsr_mem + offset); in ath10k_ahb_tcsr_write32()
65 return ioread32(ar_ahb->tcsr_mem + offset); in ath10k_ahb_tcsr_read32()
75 if (ar->hw_rev == ATH10K_HW_QCA4019) in ath10k_ahb_get_num_banks()
87 dev = &ar_ahb->pdev->dev; in ath10k_ahb_clock_init()
89 ar_ahb->cmd_clk = devm_clk_get(dev, "wifi_wcss_cmd"); in ath10k_ahb_clock_init()
90 if (IS_ERR_OR_NULL(ar_ahb->cmd_clk)) { in ath10k_ahb_clock_init()
92 PTR_ERR(ar_ahb->cmd_clk)); in ath10k_ahb_clock_init()
93 return ar_ahb->cmd_clk ? PTR_ERR(ar_ahb->cmd_clk) : -ENODEV; in ath10k_ahb_clock_init()
96 ar_ahb->ref_clk = devm_clk_get(dev, "wifi_wcss_ref"); in ath10k_ahb_clock_init()
97 if (IS_ERR_OR_NULL(ar_ahb->ref_clk)) { in ath10k_ahb_clock_init()
99 PTR_ERR(ar_ahb->ref_clk)); in ath10k_ahb_clock_init()
100 return ar_ahb->ref_clk ? PTR_ERR(ar_ahb->ref_clk) : -ENODEV; in ath10k_ahb_clock_init()
103 ar_ahb->rtc_clk = devm_clk_get(dev, "wifi_wcss_rtc"); in ath10k_ahb_clock_init()
104 if (IS_ERR_OR_NULL(ar_ahb->rtc_clk)) { in ath10k_ahb_clock_init()
106 PTR_ERR(ar_ahb->rtc_clk)); in ath10k_ahb_clock_init()
107 return ar_ahb->rtc_clk ? PTR_ERR(ar_ahb->rtc_clk) : -ENODEV; in ath10k_ahb_clock_init()
117 ar_ahb->cmd_clk = NULL; in ath10k_ahb_clock_deinit()
118 ar_ahb->ref_clk = NULL; in ath10k_ahb_clock_deinit()
119 ar_ahb->rtc_clk = NULL; in ath10k_ahb_clock_deinit()
127 if (IS_ERR_OR_NULL(ar_ahb->cmd_clk) || in ath10k_ahb_clock_enable()
128 IS_ERR_OR_NULL(ar_ahb->ref_clk) || in ath10k_ahb_clock_enable()
129 IS_ERR_OR_NULL(ar_ahb->rtc_clk)) { in ath10k_ahb_clock_enable()
130 ath10k_err(ar, "clock(s) is/are not initialized\n"); in ath10k_ahb_clock_enable()
131 ret = -EIO; in ath10k_ahb_clock_enable()
135 ret = clk_prepare_enable(ar_ahb->cmd_clk); in ath10k_ahb_clock_enable()
141 ret = clk_prepare_enable(ar_ahb->ref_clk); in ath10k_ahb_clock_enable()
147 ret = clk_prepare_enable(ar_ahb->rtc_clk); in ath10k_ahb_clock_enable()
156 clk_disable_unprepare(ar_ahb->ref_clk); in ath10k_ahb_clock_enable()
159 clk_disable_unprepare(ar_ahb->cmd_clk); in ath10k_ahb_clock_enable()
169 clk_disable_unprepare(ar_ahb->cmd_clk); in ath10k_ahb_clock_disable()
171 clk_disable_unprepare(ar_ahb->ref_clk); in ath10k_ahb_clock_disable()
173 clk_disable_unprepare(ar_ahb->rtc_clk); in ath10k_ahb_clock_disable()
181 dev = &ar_ahb->pdev->dev; in ath10k_ahb_rst_ctrl_init()
183 ar_ahb->core_cold_rst = devm_reset_control_get_exclusive(dev, in ath10k_ahb_rst_ctrl_init()
185 if (IS_ERR(ar_ahb->core_cold_rst)) { in ath10k_ahb_rst_ctrl_init()
187 PTR_ERR(ar_ahb->core_cold_rst)); in ath10k_ahb_rst_ctrl_init()
188 return PTR_ERR(ar_ahb->core_cold_rst); in ath10k_ahb_rst_ctrl_init()
191 ar_ahb->radio_cold_rst = devm_reset_control_get_exclusive(dev, in ath10k_ahb_rst_ctrl_init()
193 if (IS_ERR(ar_ahb->radio_cold_rst)) { in ath10k_ahb_rst_ctrl_init()
195 PTR_ERR(ar_ahb->radio_cold_rst)); in ath10k_ahb_rst_ctrl_init()
196 return PTR_ERR(ar_ahb->radio_cold_rst); in ath10k_ahb_rst_ctrl_init()
199 ar_ahb->radio_warm_rst = devm_reset_control_get_exclusive(dev, in ath10k_ahb_rst_ctrl_init()
201 if (IS_ERR(ar_ahb->radio_warm_rst)) { in ath10k_ahb_rst_ctrl_init()
203 PTR_ERR(ar_ahb->radio_warm_rst)); in ath10k_ahb_rst_ctrl_init()
204 return PTR_ERR(ar_ahb->radio_warm_rst); in ath10k_ahb_rst_ctrl_init()
207 ar_ahb->radio_srif_rst = devm_reset_control_get_exclusive(dev, in ath10k_ahb_rst_ctrl_init()
209 if (IS_ERR(ar_ahb->radio_srif_rst)) { in ath10k_ahb_rst_ctrl_init()
211 PTR_ERR(ar_ahb->radio_srif_rst)); in ath10k_ahb_rst_ctrl_init()
212 return PTR_ERR(ar_ahb->radio_srif_rst); in ath10k_ahb_rst_ctrl_init()
215 ar_ahb->cpu_init_rst = devm_reset_control_get_exclusive(dev, in ath10k_ahb_rst_ctrl_init()
217 if (IS_ERR(ar_ahb->cpu_init_rst)) { in ath10k_ahb_rst_ctrl_init()
219 PTR_ERR(ar_ahb->cpu_init_rst)); in ath10k_ahb_rst_ctrl_init()
220 return PTR_ERR(ar_ahb->cpu_init_rst); in ath10k_ahb_rst_ctrl_init()
230 ar_ahb->core_cold_rst = NULL; in ath10k_ahb_rst_ctrl_deinit()
231 ar_ahb->radio_cold_rst = NULL; in ath10k_ahb_rst_ctrl_deinit()
232 ar_ahb->radio_warm_rst = NULL; in ath10k_ahb_rst_ctrl_deinit()
233 ar_ahb->radio_srif_rst = NULL; in ath10k_ahb_rst_ctrl_deinit()
234 ar_ahb->cpu_init_rst = NULL; in ath10k_ahb_rst_ctrl_deinit()
242 if (IS_ERR_OR_NULL(ar_ahb->radio_cold_rst) || in ath10k_ahb_release_reset()
243 IS_ERR_OR_NULL(ar_ahb->radio_warm_rst) || in ath10k_ahb_release_reset()
244 IS_ERR_OR_NULL(ar_ahb->radio_srif_rst) || in ath10k_ahb_release_reset()
245 IS_ERR_OR_NULL(ar_ahb->cpu_init_rst)) { in ath10k_ahb_release_reset()
246 ath10k_err(ar, "rst ctrl(s) is/are not initialized\n"); in ath10k_ahb_release_reset()
247 return -EINVAL; in ath10k_ahb_release_reset()
250 ret = reset_control_deassert(ar_ahb->radio_cold_rst); in ath10k_ahb_release_reset()
256 ret = reset_control_deassert(ar_ahb->radio_warm_rst); in ath10k_ahb_release_reset()
262 ret = reset_control_deassert(ar_ahb->radio_srif_rst); in ath10k_ahb_release_reset()
268 ret = reset_control_deassert(ar_ahb->cpu_init_rst); in ath10k_ahb_release_reset()
313 if (IS_ERR_OR_NULL(ar_ahb->core_cold_rst) || in ath10k_ahb_halt_chip()
314 IS_ERR_OR_NULL(ar_ahb->radio_cold_rst) || in ath10k_ahb_halt_chip()
315 IS_ERR_OR_NULL(ar_ahb->radio_warm_rst) || in ath10k_ahb_halt_chip()
316 IS_ERR_OR_NULL(ar_ahb->radio_srif_rst) || in ath10k_ahb_halt_chip()
317 IS_ERR_OR_NULL(ar_ahb->cpu_init_rst)) { in ath10k_ahb_halt_chip()
318 ath10k_err(ar, "rst ctrl(s) is/are not initialized\n"); in ath10k_ahb_halt_chip()
347 ret = reset_control_assert(ar_ahb->core_cold_rst); in ath10k_ahb_halt_chip()
352 ret = reset_control_assert(ar_ahb->radio_cold_rst); in ath10k_ahb_halt_chip()
357 ret = reset_control_assert(ar_ahb->radio_warm_rst); in ath10k_ahb_halt_chip()
362 ret = reset_control_assert(ar_ahb->radio_srif_rst); in ath10k_ahb_halt_chip()
367 ret = reset_control_assert(ar_ahb->cpu_init_rst); in ath10k_ahb_halt_chip()
383 ret = reset_control_deassert(ar_ahb->core_cold_rst); in ath10k_ahb_halt_chip()
399 napi_schedule(&ar->napi); in ath10k_ahb_interrupt_handler()
410 ret = request_irq(ar_ahb->irq, in ath10k_ahb_request_irq_legacy()
415 ar_ahb->irq, ret); in ath10k_ahb_request_irq_legacy()
418 ar_pci->oper_irq_mode = ATH10K_PCI_IRQ_LEGACY; in ath10k_ahb_request_irq_legacy()
427 free_irq(ar_ahb->irq, ar); in ath10k_ahb_release_irq_legacy()
443 pdev = ar_ahb->pdev; in ath10k_ahb_resource_init()
448 ret = -ENXIO; in ath10k_ahb_resource_init()
452 ar_ahb->mem = devm_ioremap_resource(&pdev->dev, res); in ath10k_ahb_resource_init()
453 if (IS_ERR(ar_ahb->mem)) { in ath10k_ahb_resource_init()
455 ret = PTR_ERR(ar_ahb->mem); in ath10k_ahb_resource_init()
459 ar_ahb->mem_len = resource_size(res); in ath10k_ahb_resource_init()
461 ar_ahb->gcc_mem = ioremap(ATH10K_GCC_REG_BASE, in ath10k_ahb_resource_init()
463 if (!ar_ahb->gcc_mem) { in ath10k_ahb_resource_init()
465 ret = -ENOMEM; in ath10k_ahb_resource_init()
469 ar_ahb->tcsr_mem = ioremap(ATH10K_TCSR_REG_BASE, in ath10k_ahb_resource_init()
471 if (!ar_ahb->tcsr_mem) { in ath10k_ahb_resource_init()
473 ret = -ENOMEM; in ath10k_ahb_resource_init()
477 ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); in ath10k_ahb_resource_init()
479 ath10k_err(ar, "failed to set 32-bit dma mask: %d\n", ret); in ath10k_ahb_resource_init()
483 ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); in ath10k_ahb_resource_init()
485 ath10k_err(ar, "failed to set 32-bit consistent dma: %d\n", in ath10k_ahb_resource_init()
498 ar_ahb->irq = platform_get_irq_byname(pdev, "legacy"); in ath10k_ahb_resource_init()
499 if (ar_ahb->irq < 0) { in ath10k_ahb_resource_init()
500 ath10k_err(ar, "failed to get irq number: %d\n", ar_ahb->irq); in ath10k_ahb_resource_init()
501 ret = ar_ahb->irq; in ath10k_ahb_resource_init()
505 ath10k_dbg(ar, ATH10K_DBG_BOOT, "irq: %d\n", ar_ahb->irq); in ath10k_ahb_resource_init()
508 ar_ahb->mem, ar_ahb->mem_len, in ath10k_ahb_resource_init()
509 ar_ahb->gcc_mem, ar_ahb->tcsr_mem); in ath10k_ahb_resource_init()
516 iounmap(ar_ahb->tcsr_mem); in ath10k_ahb_resource_init()
519 ar_ahb->tcsr_mem = NULL; in ath10k_ahb_resource_init()
520 iounmap(ar_ahb->gcc_mem); in ath10k_ahb_resource_init()
523 ar_ahb->gcc_mem = NULL; in ath10k_ahb_resource_init()
524 devm_iounmap(&pdev->dev, ar_ahb->mem); in ath10k_ahb_resource_init()
527 ar_ahb->mem = NULL; in ath10k_ahb_resource_init()
536 dev = &ar_ahb->pdev->dev; in ath10k_ahb_resource_deinit()
538 if (ar_ahb->mem) in ath10k_ahb_resource_deinit()
539 devm_iounmap(dev, ar_ahb->mem); in ath10k_ahb_resource_deinit()
541 if (ar_ahb->gcc_mem) in ath10k_ahb_resource_deinit()
542 iounmap(ar_ahb->gcc_mem); in ath10k_ahb_resource_deinit()
544 if (ar_ahb->tcsr_mem) in ath10k_ahb_resource_deinit()
545 iounmap(ar_ahb->tcsr_mem); in ath10k_ahb_resource_deinit()
547 ar_ahb->mem = NULL; in ath10k_ahb_resource_deinit()
548 ar_ahb->gcc_mem = NULL; in ath10k_ahb_resource_deinit()
549 ar_ahb->tcsr_mem = NULL; in ath10k_ahb_resource_deinit()
570 * gcc register and write into target's scratch register where in ath10k_ahb_prepare_device()
627 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot ahb hif start\n"); in ath10k_ahb_hif_start()
629 napi_enable(&ar->napi); in ath10k_ahb_hif_start()
642 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot ahb hif stop\n"); in ath10k_ahb_hif_stop()
645 synchronize_irq(ar_ahb->irq); in ath10k_ahb_hif_stop()
647 napi_synchronize(&ar->napi); in ath10k_ahb_hif_stop()
648 napi_disable(&ar->napi); in ath10k_ahb_hif_stop()
658 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot ahb hif power up\n"); in ath10k_ahb_hif_power_up()
745 of_id = of_match_device(ath10k_ahb_of_match, &pdev->dev); in ath10k_ahb_probe()
747 dev_err(&pdev->dev, "failed to find matching device tree id\n"); in ath10k_ahb_probe()
748 return -EINVAL; in ath10k_ahb_probe()
751 hw_rev = (enum ath10k_hw_rev)of_id->data; in ath10k_ahb_probe()
754 ar = ath10k_core_create(size, &pdev->dev, ATH10K_BUS_AHB, in ath10k_ahb_probe()
757 dev_err(&pdev->dev, "failed to allocate core\n"); in ath10k_ahb_probe()
758 return -ENOMEM; in ath10k_ahb_probe()
761 ath10k_dbg(ar, ATH10K_DBG_BOOT, "ahb probe\n"); in ath10k_ahb_probe()
766 ar_ahb->pdev = pdev; in ath10k_ahb_probe()
773 ar->dev_id = 0; in ath10k_ahb_probe()
774 ar_pci->mem = ar_ahb->mem; in ath10k_ahb_probe()
775 ar_pci->mem_len = ar_ahb->mem_len; in ath10k_ahb_probe()
776 ar_pci->ar = ar; in ath10k_ahb_probe()
777 ar_pci->ce.bus_ops = &ath10k_ahb_bus_ops; in ath10k_ahb_probe()
778 ar_pci->targ_cpu_to_ce_addr = ath10k_ahb_qca4019_targ_cpu_to_ce_addr; in ath10k_ahb_probe()
779 ar->ce_priv = &ar_pci->ce; in ath10k_ahb_probe()
803 ret = -ENODEV; in ath10k_ahb_probe()
841 return -EINVAL; in ath10k_ahb_remove()
846 return -EINVAL; in ath10k_ahb_remove()
848 ath10k_dbg(ar, ATH10K_DBG_AHB, "ahb remove\n"); in ath10k_ahb_remove()
879 printk(KERN_ERR "failed to register ath10k ahb driver: %d\n", in ath10k_ahb_init()