Lines Matching +full:sync +full:- +full:mode

1 /* SPDX-License-Identifier: GPL-2.0 */
19 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
78 #define	SYNC_L_INH	0x2	/* Sync Character Load Inhibit */
79 #define	ADD_SM		0x4	/* Address Search Mode (SDLC) */
81 #define	ENT_HM		0x10	/* Enter Hunt Mode */
93 #define	SYNC_ENAB	0	/* Sync Modes Enable */
98 #define	MONSYNC		0	/* 8 Bit Sync character */
99 #define	BISYNC		0x10	/* 16 bit sync character */
100 #define	SDLC		0x20	/* SDLC Mode (01111110 Sync Flag) */
101 #define	EXTSYNC		0x30	/* External Sync Mode */
103 #define	X1CLK		0x0	/* x1 clock mode */
104 #define	X16CLK		0x40	/* x16 clock mode */
105 #define	X32CLK		0x80	/* x32 clock mode */
106 #define	X64CLK		0xC0	/* x64 clock mode */
112 #define	SDLC_CRC	0x4	/* SDLC/CRC-16 */
121 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
123 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
139 #define	BIT6	1	/* 6 bit/8bit sync */
140 #define	LOOPMODE 2	/* SDLC Loop mode */
144 #define	NRZ	0	/* NRZ mode */
145 #define	NRZI	0x20	/* NRZI mode */
150 /* Write Register 11 (Clock Mode control) */
176 #define	SEARCH	0x20	/* Enter search mode */
181 #define	SFMM	0xc0	/* Set FM mode */
182 #define	SNRZI	0xe0	/* Set NRZI mode */
189 #define	SYNCIE	0x10	/* Sync/hunt IE */
200 #define	SYNC_HUNT	0x10	/* Sync/hunt */
222 /* Read Register 2 (channel b only) - Interrupt vector */
278 	u8		sync;		/* Set if in sync mode */  member
294 	 *	Sync DMA
320 	u32		rx_overrun;		/* Overruns - not done yet */
383 #define Z85C30	1	/* CMOS - better */
386 	int active;	/* Soft interrupt enable - the Mac doesn't 
432  * Events are used to schedule things to happen at timer-interrupt