611 	u32 read_buf;  in smsc95xx_set_features()  local
614 	ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);  in smsc95xx_set_features()
619 		read_buf |= Tx_COE_EN_;  in smsc95xx_set_features()
621 		read_buf &= ~Tx_COE_EN_;  in smsc95xx_set_features()
624 		read_buf |= Rx_COE_EN_;  in smsc95xx_set_features()
626 		read_buf &= ~Rx_COE_EN_;  in smsc95xx_set_features()
628 	ret = smsc95xx_write_reg(dev, COE_CR, read_buf);  in smsc95xx_set_features()
632 	netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);  in smsc95xx_set_features()
833 	u32 read_buf, write_buf, burst_cap;  in smsc95xx_reset()  local
845 		ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
849 	} while ((read_buf & HW_CFG_LRST_) && (timeout < 100));  in smsc95xx_reset()
863 		ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);  in smsc95xx_reset()
867 	} while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));  in smsc95xx_reset()
881 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
886 		  read_buf);  in smsc95xx_reset()
888 	read_buf |= HW_CFG_BIR_;  in smsc95xx_reset()
890 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
894 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
900 		  read_buf);  in smsc95xx_reset()
920 	ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);  in smsc95xx_reset()
926 		  read_buf);  in smsc95xx_reset()
932 	ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);  in smsc95xx_reset()
938 		  read_buf);  in smsc95xx_reset()
940 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
945 		  read_buf);  in smsc95xx_reset()
948 		read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);  in smsc95xx_reset()
950 	read_buf &= ~HW_CFG_RXDOFF_;  in smsc95xx_reset()
953 	read_buf |= NET_IP_ALIGN << 9;  in smsc95xx_reset()
955 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
959 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
964 		  "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);  in smsc95xx_reset()
970 	ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);  in smsc95xx_reset()
973 	netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);  in smsc95xx_reset()
1011 	ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);  in smsc95xx_reset()
1016 	read_buf |= INT_EP_CTL_PHY_INT_;  in smsc95xx_reset()
1018 	ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);  in smsc95xx_reset()