308 #define GetByte(reg)	   ((unsigned)inb(ioaddr + (reg)))  macro
325 	    pr_cont(" %2.2x", GetByte(i));
331 		pr_cont(" %2.2x", GetByte(i));
341 		pr_cont(" %2.2x", GetByte(i));
405     d = GetByte(XIRCREG2_GPR2); /* read MDIO */  in mii_getbit()
998     saved_page = GetByte(XIRCREG_PR);  in xirc2ps_interrupt()
1002     int_status = GetByte(XIRCREG_ISR);  in xirc2ps_interrupt()
1009     eth_status = GetByte(XIRCREG_ESR);  in xirc2ps_interrupt()
1012     rx_status  = GetByte(XIRCREG40_RXST0);  in xirc2ps_interrupt()
1014     tx_status = GetByte(XIRCREG40_TXST0);  in xirc2ps_interrupt()
1015     tx_status |= GetByte(XIRCREG40_TXST1) << 8;  in xirc2ps_interrupt()
1025 	rsr = GetByte(XIRCREG0_RSR);  in xirc2ps_interrupt()
1058 			    buf[i] = GetByte(XIRCREG_EDP);  in xirc2ps_interrupt()
1123 	eth_status = GetByte(XIRCREG_ESR);  in xirc2ps_interrupt()
1136 	nn = GetByte(XIRCREG0_PTR);  in xirc2ps_interrupt()
1179 	if (int_status != 0xff && (int_status = GetByte(XIRCREG_ISR)) != 0)  in xirc2ps_interrupt()
1341     value = GetByte(XIRCREG42_SWC1) & 0xC0;  in set_multicast_list()
1496     local->silicon = local->mohawk ? (GetByte(XIRCREG4_BOV) & 0x70) >> 4  in do_reset()
1497 				   : (GetByte(XIRCREG4_BOV) & 0x30) >> 4;  in do_reset()
1517 	value = GetByte(XIRCREG_ESR);	 /* read the ESR */  in do_reset()
1526     value = GetByte(XIRCREG1_ECR);  in do_reset()
1570 	    PutByte(XIRCREG2_MSR, GetByte(XIRCREG2_MSR) | 0x08);  in do_reset()
1582 	    PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR | FullDuplex));  in do_reset()
1585 	value = GetByte(XIRCREG_ESR);	 /* read the ESR */  in do_reset()
1613 	if (!(GetByte(0x10) & 0x01))  in do_reset()
1685 		dev->if_port = (GetByte(XIRCREG_ESR) & MediaSelect) ? 1 : 2;  in init_mii()