Lines Matching refs:base_addr
338 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD); in tlan_stop()
505 dev->base_addr = pci_io_base; in tlan_probe1()
522 dev->base_addr = ioaddr; in tlan_probe1()
580 (int)dev->base_addr, in tlan_probe1()
615 release_region(dev->base_addr, 0x10); in tlan_eisa_cleanup()
896 priv->tlan_rev = tlan_dio_read8(dev->base_addr, TLAN_DEF_REVISION); in tlan_open()
1085 outl(tail_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_start_tx()
1086 outl(TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD); in tlan_start_tx()
1139 host_int = inw(dev->base_addr + TLAN_HOST_INT); in tlan_handle_interrupt()
1145 outw(host_int, dev->base_addr + TLAN_HOST_INT); in tlan_handle_interrupt()
1150 outl(host_cmd, dev->base_addr + TLAN_HOST_CMD); in tlan_handle_interrupt()
1220 tlan_print_dio(dev->base_addr); in tlan_get_stats()
1267 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD); in tlan_set_multicast_list()
1268 tlan_dio_write8(dev->base_addr, in tlan_set_multicast_list()
1271 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD); in tlan_set_multicast_list()
1272 tlan_dio_write8(dev->base_addr, in tlan_set_multicast_list()
1277 tlan_dio_write32(dev->base_addr, TLAN_HASH_1, in tlan_set_multicast_list()
1279 tlan_dio_write32(dev->base_addr, TLAN_HASH_2, in tlan_set_multicast_list()
1299 tlan_dio_write32(dev->base_addr, TLAN_HASH_1, hash1); in tlan_set_multicast_list()
1300 tlan_dio_write32(dev->base_addr, TLAN_HASH_2, hash2); in tlan_set_multicast_list()
1396 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_tx_eof()
1404 tlan_dio_write8(dev->base_addr, in tlan_handle_tx_eof()
1549 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_rx_eof()
1555 tlan_dio_write8(dev->base_addr, in tlan_handle_rx_eof()
1639 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_tx_eoc()
1686 error = inl(dev->base_addr + TLAN_CH_PARM); in tlan_handle_status_check()
1689 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD); in tlan_handle_status_check()
1699 net_sts = tlan_dio_read8(dev->base_addr, TLAN_NET_STS); in tlan_handle_status_check()
1701 tlan_dio_write8(dev->base_addr, TLAN_NET_STS, net_sts); in tlan_handle_status_check()
1764 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_rx_eoc()
1848 tlan_dio_write8(dev->base_addr, in tlan_timer()
2075 outw(TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2076 tx_good = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2077 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2078 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16; in tlan_read_and_clear_stats()
2079 tx_under = inb(dev->base_addr + TLAN_DIO_DATA + 3); in tlan_read_and_clear_stats()
2081 outw(TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2082 rx_good = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2083 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2084 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16; in tlan_read_and_clear_stats()
2085 rx_over = inb(dev->base_addr + TLAN_DIO_DATA + 3); in tlan_read_and_clear_stats()
2087 outw(TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2088 def_tx = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2089 def_tx += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2090 crc = inb(dev->base_addr + TLAN_DIO_DATA + 2); in tlan_read_and_clear_stats()
2091 code = inb(dev->base_addr + TLAN_DIO_DATA + 3); in tlan_read_and_clear_stats()
2093 outw(TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2094 multi_col = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2095 multi_col += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2096 single_col = inb(dev->base_addr + TLAN_DIO_DATA + 2); in tlan_read_and_clear_stats()
2097 single_col += inb(dev->base_addr + TLAN_DIO_DATA + 3) << 8; in tlan_read_and_clear_stats()
2099 outw(TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2100 excess_col = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2101 late_col = inb(dev->base_addr + TLAN_DIO_DATA + 1); in tlan_read_and_clear_stats()
2102 loss = inb(dev->base_addr + TLAN_DIO_DATA + 2); in tlan_read_and_clear_stats()
2157 data = inl(dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2159 outl(data, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2165 data = inl(dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2167 outl(data, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2172 tlan_dio_write32(dev->base_addr, (u16) i, 0); in tlan_reset_adapter()
2177 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data); in tlan_reset_adapter()
2181 outl(TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2182 outl(TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2186 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); in tlan_reset_adapter()
2187 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; in tlan_reset_adapter()
2194 tlan_dio_write8(dev->base_addr, TLAN_INT_DIS, data8); in tlan_reset_adapter()
2202 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x0a); in tlan_reset_adapter()
2204 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x00); in tlan_reset_adapter()
2207 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x08); in tlan_reset_adapter()
2215 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data); in tlan_reset_adapter()
2246 tlan_dio_write8(dev->base_addr, TLAN_NET_CMD, data); in tlan_finish_reset()
2250 tlan_dio_write8(dev->base_addr, TLAN_NET_MASK, data); in tlan_finish_reset()
2251 tlan_dio_write16(dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7); in tlan_finish_reset()
2301 sio = tlan_dio_read8(dev->base_addr, TLAN_NET_SIO); in tlan_finish_reset()
2303 tlan_dio_write8(dev->base_addr, TLAN_NET_SIO, sio); in tlan_finish_reset()
2309 outb((TLAN_HC_INT_ON >> 8), dev->base_addr + TLAN_HOST_CMD + 1); in tlan_finish_reset()
2312 dev->base_addr + TLAN_HOST_CMD + 1); in tlan_finish_reset()
2313 outl(priv->rx_list_dma, dev->base_addr + TLAN_CH_PARM); in tlan_finish_reset()
2314 outl(TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD); in tlan_finish_reset()
2315 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK); in tlan_finish_reset()
2358 tlan_dio_write8(dev->base_addr, in tlan_set_mac()
2362 tlan_dio_write8(dev->base_addr, in tlan_set_mac()
2496 tlan_mii_sync(dev->base_addr); in tlan_phy_power_down()
2502 tlan_mii_sync(dev->base_addr); in tlan_phy_power_down()
2523 tlan_mii_sync(dev->base_addr); in tlan_phy_power_up()
2526 tlan_mii_sync(dev->base_addr); in tlan_phy_power_up()
2548 tlan_mii_sync(dev->base_addr); in tlan_phy_reset()
2627 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, data); in tlan_phy_start_link()
2753 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, 0); in tlan_phy_monitor()
2760 tlan_mii_sync(dev->base_addr); in tlan_phy_monitor()
2775 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK); in tlan_phy_monitor()
2833 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); in tlan_mii_read_reg()
2834 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; in tlan_mii_read_reg()
2839 tlan_mii_sync(dev->base_addr); in tlan_mii_read_reg()
2845 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* start (01b) */ in tlan_mii_read_reg()
2846 tlan_mii_send_data(dev->base_addr, 0x2, 2); /* read (10b) */ in tlan_mii_read_reg()
2847 tlan_mii_send_data(dev->base_addr, phy, 5); /* device # */ in tlan_mii_read_reg()
2848 tlan_mii_send_data(dev->base_addr, reg, 5); /* register # */ in tlan_mii_read_reg()
3001 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); in tlan_mii_write_reg()
3002 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; in tlan_mii_write_reg()
3007 tlan_mii_sync(dev->base_addr); in tlan_mii_write_reg()
3013 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* start (01b) */ in tlan_mii_write_reg()
3014 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* write (01b) */ in tlan_mii_write_reg()
3015 tlan_mii_send_data(dev->base_addr, phy, 5); /* device # */ in tlan_mii_write_reg()
3016 tlan_mii_send_data(dev->base_addr, reg, 5); /* register # */ in tlan_mii_write_reg()
3018 tlan_mii_send_data(dev->base_addr, 0x2, 2); /* send ACK */ in tlan_mii_write_reg()
3019 tlan_mii_send_data(dev->base_addr, val, 16); /* send data */ in tlan_mii_write_reg()
3234 tlan_ee_send_start(dev->base_addr); in tlan_ee_read_byte()
3235 err = tlan_ee_send_byte(dev->base_addr, 0xa0, TLAN_EEPROM_ACK); in tlan_ee_read_byte()
3240 err = tlan_ee_send_byte(dev->base_addr, ee_addr, TLAN_EEPROM_ACK); in tlan_ee_read_byte()
3245 tlan_ee_send_start(dev->base_addr); in tlan_ee_read_byte()
3246 err = tlan_ee_send_byte(dev->base_addr, 0xa1, TLAN_EEPROM_ACK); in tlan_ee_read_byte()
3251 tlan_ee_receive_byte(dev->base_addr, data, TLAN_EEPROM_STOP); in tlan_ee_read_byte()