Lines Matching +full:rx +full:- +full:enable
1 /* SPDX-License-Identifier: GPL-2.0 */
23 dev_info(priv->dev, format, ## __VA_ARGS__); \
29 dev_err(priv->dev, format, ## __VA_ARGS__); \
35 dev_dbg(priv->dev, format, ## __VA_ARGS__); \
41 dev_notice(priv->dev, format, ## __VA_ARGS__); \
124 #define CPSW_FIFO_SHAPERS_NUM (CPSW_TC_NUM - 1)
201 #define RX_DSCP_PRI_MAP0 0x30 /* Rx DSCP Priority to Rx Packet Mapping */
202 #define RX_DSCP_PRI_MAP1 0x34 /* Rx DSCP Priority to Rx Packet Mapping */
203 #define RX_DSCP_PRI_MAP2 0x38 /* Rx DSCP Priority to Rx Packet Mapping */
204 #define RX_DSCP_PRI_MAP3 0x3c /* Rx DSCP Priority to Rx Packet Mapping */
205 #define RX_DSCP_PRI_MAP4 0x40 /* Rx DSCP Priority to Rx Packet Mapping */
206 #define RX_DSCP_PRI_MAP5 0x44 /* Rx DSCP Priority to Rx Packet Mapping */
207 #define RX_DSCP_PRI_MAP6 0x48 /* Rx DSCP Priority to Rx Packet Mapping */
208 #define RX_DSCP_PRI_MAP7 0x4c /* Rx DSCP Priority to Rx Packet Mapping */
212 #define VLAN_LTYPE2_EN BIT(21) /* VLAN LTYPE 2 enable */
213 #define VLAN_LTYPE1_EN BIT(20) /* VLAN LTYPE 1 enable */
214 #define DSCP_PRI_EN BIT(16) /* DSCP Priority Enable */
216 #define TS_320 BIT(14) /* Time Sync Dest Port 320 enable */
217 #define TS_319 BIT(13) /* Time Sync Dest Port 319 enable */
218 #define TS_132 BIT(12) /* Time Sync Dest IP Addr 132 enable */
219 #define TS_131 BIT(11) /* Time Sync Dest IP Addr 131 enable */
220 #define TS_130 BIT(10) /* Time Sync Dest IP Addr 130 enable */
221 #define TS_129 BIT(9) /* Time Sync Dest IP Addr 129 enable */
222 #define TS_TTL_NONZERO BIT(8) /* Time Sync Time To Live Non-zero enable */
223 #define TS_ANNEX_F_EN BIT(6) /* Time Sync Annex F enable */
224 #define TS_ANNEX_D_EN BIT(4) /* Time Sync Annex D enable */
225 #define TS_LTYPE2_EN BIT(3) /* Time Sync LTYPE 2 enable */
226 #define TS_LTYPE1_EN BIT(2) /* Time Sync LTYPE 1 enable */
227 #define TS_TX_EN BIT(1) /* Time Sync Transmit Enable */
228 #define TS_RX_EN BIT(0) /* Time Sync Receive Enable */
251 #define TS_MSG_TYPE_EN_SHIFT (0) /* Time Sync Message Type Enable */
254 /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */
299 bool dual_emac; /* Enable Dual EMAC mode */
315 return readl_relaxed(slave->regs + offset); in slave_read()
320 writel_relaxed(val, slave->regs + offset); in slave_write()
385 #define ndev_to_cpsw(ndev) (((struct cpsw_priv *)netdev_priv(ndev))->cpsw)