1145 		else if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_display_tx_rings()
1226 		else if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_clear_tx_descriptors()
1449 			else if (!(tx_q->tbs & STMMAC_TBS_AVAIL))  in init_dma_tx_desc_rings()
1459 			else if (tx_q->tbs & STMMAC_TBS_AVAIL)  in init_dma_tx_desc_rings()
1602 		} else if (tx_q->tbs & STMMAC_TBS_AVAIL) {  in free_dma_tx_desc_resources()
1728 		else if (tx_q->tbs & STMMAC_TBS_AVAIL)  in alloc_dma_tx_desc_resources()
1742 		else if (tx_q->tbs & STMMAC_TBS_AVAIL)  in alloc_dma_tx_desc_resources()
1984 		else if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_tx_clean()
2735 		int enable = tx_q->tbs & STMMAC_TBS_AVAIL;  in stmmac_hw_setup()
2811 		tx_q->tbs |= tbs_en ? STMMAC_TBS_AVAIL : 0;  in stmmac_open()
2813 			tx_q->tbs &= ~STMMAC_TBS_AVAIL;  in stmmac_open()
2968 	if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_vlan_insert()
3009 		if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_tso_allocator()
3106 		if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_tso_xmit()
3131 	if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_tso_xmit()
3206 		if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_tso_xmit()
3279 	if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_tso_xmit()
3358 	else if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_xmit()
3389 		else if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_xmit()
3437 		else if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_xmit()
3510 	if (tx_q->tbs & STMMAC_TBS_EN) {  in stmmac_xmit()
3531 	else if (tx_q->tbs & STMMAC_TBS_AVAIL)  in stmmac_xmit()
4349 		} else if (!(tx_q->tbs & STMMAC_TBS_AVAIL)) {  in stmmac_rings_status_show()