Lines Matching defs:stmmac_dma_ops

169 struct stmmac_dma_ops {  struct
171 	int (*reset)(void __iomem *ioaddr);
172 	void (*init)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg,
174 	void (*init_chan)(void __iomem *ioaddr,
176 	void (*init_rx_chan)(void __iomem *ioaddr,
179 	void (*init_tx_chan)(void __iomem *ioaddr,
183 	void (*axi)(void __iomem *ioaddr, struct stmmac_axi *axi);
185 	void (*dump_regs)(void __iomem *ioaddr, u32 *reg_space);
186 	void (*dma_rx_mode)(void __iomem *ioaddr, int mode, u32 channel,
188 	void (*dma_tx_mode)(void __iomem *ioaddr, int mode, u32 channel,
191 	void (*dma_diagnostic_fr) (void *data, struct stmmac_extra_stats *x,
193 	void (*enable_dma_transmission) (void __iomem *ioaddr);
194 	void (*enable_dma_irq)(void __iomem *ioaddr, u32 chan,
196 	void (*disable_dma_irq)(void __iomem *ioaddr, u32 chan,
198 	void (*start_tx)(void __iomem *ioaddr, u32 chan);
199 	void (*stop_tx)(void __iomem *ioaddr, u32 chan);
200 	void (*start_rx)(void __iomem *ioaddr, u32 chan);
201 	void (*stop_rx)(void __iomem *ioaddr, u32 chan);
202 	int (*dma_interrupt) (void __iomem *ioaddr,
205 	void (*get_hw_feature)(void __iomem *ioaddr,
208 	void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt, u32 number_chan);
209 	void (*set_tx_ring_len)(void __iomem *ioaddr, u32 len, u32 chan);
210 	void (*set_rx_ring_len)(void __iomem *ioaddr, u32 len, u32 chan);
211 	void (*set_rx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
212 	void (*set_tx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
213 	void (*enable_tso)(void __iomem *ioaddr, bool en, u32 chan);
214 	void (*qmode)(void __iomem *ioaddr, u32 channel, u8 qmode);
215 	void (*set_bfsize)(void __iomem *ioaddr, int bfsize, u32 chan);
216 	void (*enable_sph)(void __iomem *ioaddr, bool en, u32 chan);
217 	int (*enable_tbs)(void __iomem *ioaddr, bool en, u32 chan);