95 static int rgmii_readl(struct qcom_ethqos *ethqos, unsigned int offset)  in rgmii_readl()  argument
97 	return readl(ethqos->rgmii_base + offset);  in rgmii_readl()
100 static void rgmii_writel(struct qcom_ethqos *ethqos,  in rgmii_writel()  argument
103 	writel(value, ethqos->rgmii_base + offset);  in rgmii_writel()
106 static void rgmii_updatel(struct qcom_ethqos *ethqos,  in rgmii_updatel()  argument
111 	temp =  rgmii_readl(ethqos, offset);  in rgmii_updatel()
113 	rgmii_writel(ethqos, temp, offset);  in rgmii_updatel()
116 static void rgmii_dump(struct qcom_ethqos *ethqos)  in rgmii_dump()  argument
118 	dev_dbg(&ethqos->pdev->dev, "Rgmii register dump\n");  in rgmii_dump()
119 	dev_dbg(&ethqos->pdev->dev, "RGMII_IO_MACRO_CONFIG: %x\n",  in rgmii_dump()
120 		rgmii_readl(ethqos, RGMII_IO_MACRO_CONFIG));  in rgmii_dump()
121 	dev_dbg(&ethqos->pdev->dev, "SDCC_HC_REG_DLL_CONFIG: %x\n",  in rgmii_dump()
122 		rgmii_readl(ethqos, SDCC_HC_REG_DLL_CONFIG));  in rgmii_dump()
123 	dev_dbg(&ethqos->pdev->dev, "SDCC_HC_REG_DDR_CONFIG: %x\n",  in rgmii_dump()
124 		rgmii_readl(ethqos, SDCC_HC_REG_DDR_CONFIG));  in rgmii_dump()
125 	dev_dbg(&ethqos->pdev->dev, "SDCC_HC_REG_DLL_CONFIG2: %x\n",  in rgmii_dump()
126 		rgmii_readl(ethqos, SDCC_HC_REG_DLL_CONFIG2));  in rgmii_dump()
127 	dev_dbg(&ethqos->pdev->dev, "SDC4_STATUS: %x\n",  in rgmii_dump()
128 		rgmii_readl(ethqos, SDC4_STATUS));  in rgmii_dump()
129 	dev_dbg(&ethqos->pdev->dev, "SDCC_USR_CTL: %x\n",  in rgmii_dump()
130 		rgmii_readl(ethqos, SDCC_USR_CTL));  in rgmii_dump()
131 	dev_dbg(&ethqos->pdev->dev, "RGMII_IO_MACRO_CONFIG2: %x\n",  in rgmii_dump()
132 		rgmii_readl(ethqos, RGMII_IO_MACRO_CONFIG2));  in rgmii_dump()
133 	dev_dbg(&ethqos->pdev->dev, "RGMII_IO_MACRO_DEBUG1: %x\n",  in rgmii_dump()
134 		rgmii_readl(ethqos, RGMII_IO_MACRO_DEBUG1));  in rgmii_dump()
135 	dev_dbg(&ethqos->pdev->dev, "EMAC_SYSTEM_LOW_POWER_DEBUG: %x\n",  in rgmii_dump()
136 		rgmii_readl(ethqos, EMAC_SYSTEM_LOW_POWER_DEBUG));  in rgmii_dump()
145 ethqos_update_rgmii_clk(struct qcom_ethqos *ethqos, unsigned int speed)  in ethqos_update_rgmii_clk()  argument
149 		ethqos->rgmii_clk_rate =  RGMII_1000_NOM_CLK_FREQ;  in ethqos_update_rgmii_clk()
153 		ethqos->rgmii_clk_rate =  RGMII_ID_MODE_100_LOW_SVS_CLK_FREQ;  in ethqos_update_rgmii_clk()
157 		ethqos->rgmii_clk_rate =  RGMII_ID_MODE_10_LOW_SVS_CLK_FREQ;  in ethqos_update_rgmii_clk()
161 	clk_set_rate(ethqos->rgmii_clk, ethqos->rgmii_clk_rate);  in ethqos_update_rgmii_clk()
164 static void ethqos_set_func_clk_en(struct qcom_ethqos *ethqos)  in ethqos_set_func_clk_en()  argument
166 	rgmii_updatel(ethqos, RGMII_CONFIG_FUNC_CLK_EN,  in ethqos_set_func_clk_en()
184 static int ethqos_dll_configure(struct qcom_ethqos *ethqos)  in ethqos_dll_configure()  argument
190 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CDR_EN,  in ethqos_dll_configure()
194 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CDR_EXT_EN,  in ethqos_dll_configure()
198 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,  in ethqos_dll_configure()
202 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN,  in ethqos_dll_configure()
205 	rgmii_updatel(ethqos, SDCC_DLL_MCLK_GATING_EN,  in ethqos_dll_configure()
208 	rgmii_updatel(ethqos, SDCC_DLL_CDR_FINE_PHASE,  in ethqos_dll_configure()
213 		val = rgmii_readl(ethqos, SDCC_HC_REG_DLL_CONFIG);  in ethqos_dll_configure()
221 		dev_err(&ethqos->pdev->dev, "Clear CK_OUT_EN timedout\n");  in ethqos_dll_configure()
224 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,  in ethqos_dll_configure()
230 		val = rgmii_readl(ethqos, SDCC_HC_REG_DLL_CONFIG);  in ethqos_dll_configure()
238 		dev_err(&ethqos->pdev->dev, "Set CK_OUT_EN timedout\n");  in ethqos_dll_configure()
241 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_CAL_EN,  in ethqos_dll_configure()
244 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DLL_CLOCK_DIS,  in ethqos_dll_configure()
247 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_MCLK_FREQ_CALC,  in ethqos_dll_configure()
250 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SEL,  in ethqos_dll_configure()
253 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SW,  in ethqos_dll_configure()
260 static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos)  in ethqos_rgmii_macro_init()  argument
263 	rgmii_updatel(ethqos, RGMII_CONFIG2_TX_TO_RX_LOOPBACK_EN,  in ethqos_rgmii_macro_init()
267 	rgmii_updatel(ethqos, RGMII_CONFIG_INTF_SEL,  in ethqos_rgmii_macro_init()
270 	switch (ethqos->speed) {  in ethqos_rgmii_macro_init()
272 		rgmii_updatel(ethqos, RGMII_CONFIG_DDR_MODE,  in ethqos_rgmii_macro_init()
274 		rgmii_updatel(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,  in ethqos_rgmii_macro_init()
276 		rgmii_updatel(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,  in ethqos_rgmii_macro_init()
279 		rgmii_updatel(ethqos, RGMII_CONFIG_PROG_SWAP,  in ethqos_rgmii_macro_init()
281 		rgmii_updatel(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,  in ethqos_rgmii_macro_init()
283 		rgmii_updatel(ethqos, RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN,  in ethqos_rgmii_macro_init()
286 		rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,  in ethqos_rgmii_macro_init()
288 		rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,  in ethqos_rgmii_macro_init()
293 		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,  in ethqos_rgmii_macro_init()
295 		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_DLY_EN,  in ethqos_rgmii_macro_init()
298 		rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,  in ethqos_rgmii_macro_init()
303 		rgmii_updatel(ethqos, RGMII_CONFIG_DDR_MODE,  in ethqos_rgmii_macro_init()
305 		rgmii_updatel(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,  in ethqos_rgmii_macro_init()
308 		rgmii_updatel(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,  in ethqos_rgmii_macro_init()
310 		rgmii_updatel(ethqos, RGMII_CONFIG_PROG_SWAP,  in ethqos_rgmii_macro_init()
312 		rgmii_updatel(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,  in ethqos_rgmii_macro_init()
314 		rgmii_updatel(ethqos, RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN,  in ethqos_rgmii_macro_init()
317 		rgmii_updatel(ethqos, RGMII_CONFIG_MAX_SPD_PRG_2,  in ethqos_rgmii_macro_init()
319 		rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,  in ethqos_rgmii_macro_init()
321 		rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,  in ethqos_rgmii_macro_init()
324 		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_CODE,  in ethqos_rgmii_macro_init()
326 		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY,  in ethqos_rgmii_macro_init()
329 		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,  in ethqos_rgmii_macro_init()
332 		rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,  in ethqos_rgmii_macro_init()
337 		rgmii_updatel(ethqos, RGMII_CONFIG_DDR_MODE,  in ethqos_rgmii_macro_init()
339 		rgmii_updatel(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,  in ethqos_rgmii_macro_init()
342 		rgmii_updatel(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,  in ethqos_rgmii_macro_init()
344 		rgmii_updatel(ethqos, RGMII_CONFIG_PROG_SWAP,  in ethqos_rgmii_macro_init()
346 		rgmii_updatel(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,  in ethqos_rgmii_macro_init()
348 		rgmii_updatel(ethqos, RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN,  in ethqos_rgmii_macro_init()
350 		rgmii_updatel(ethqos, RGMII_CONFIG_MAX_SPD_PRG_9,  in ethqos_rgmii_macro_init()
353 		rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,  in ethqos_rgmii_macro_init()
355 		rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,  in ethqos_rgmii_macro_init()
358 		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_CODE,  in ethqos_rgmii_macro_init()
360 		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY,  in ethqos_rgmii_macro_init()
363 		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,  in ethqos_rgmii_macro_init()
366 		rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,  in ethqos_rgmii_macro_init()
370 		dev_err(&ethqos->pdev->dev,  in ethqos_rgmii_macro_init()
371 			"Invalid speed %d\n", ethqos->speed);  in ethqos_rgmii_macro_init()
378 static int ethqos_configure(struct qcom_ethqos *ethqos)  in ethqos_configure()  argument
384 	for (i = 0; i < ethqos->num_por; i++)  in ethqos_configure()
385 		rgmii_writel(ethqos, ethqos->por[i].value,  in ethqos_configure()
386 			     ethqos->por[i].offset);  in ethqos_configure()
387 	ethqos_set_func_clk_en(ethqos);  in ethqos_configure()
392 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_RST,  in ethqos_configure()
396 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_PDN,  in ethqos_configure()
400 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_RST, 0,  in ethqos_configure()
404 	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_PDN, 0,  in ethqos_configure()
407 	if (ethqos->speed != SPEED_100 && ethqos->speed != SPEED_10) {  in ethqos_configure()
409 		rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN,  in ethqos_configure()
413 		rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,  in ethqos_configure()
418 		rgmii_updatel(ethqos, GENMASK(26, 24), BIT(26), SDCC_USR_CTL);  in ethqos_configure()
423 			dll_lock = rgmii_readl(ethqos, SDC4_STATUS);  in ethqos_configure()
429 			dev_err(&ethqos->pdev->dev,  in ethqos_configure()
433 	if (ethqos->speed == SPEED_1000)  in ethqos_configure()
434 		ethqos_dll_configure(ethqos);  in ethqos_configure()
436 	ethqos_rgmii_macro_init(ethqos);  in ethqos_configure()
443 	struct qcom_ethqos *ethqos = priv;  in ethqos_fix_mac_speed()  local
445 	ethqos->speed = speed;  in ethqos_fix_mac_speed()
446 	ethqos_update_rgmii_clk(ethqos, speed);  in ethqos_fix_mac_speed()
447 	ethqos_configure(ethqos);  in ethqos_fix_mac_speed()
456 	struct qcom_ethqos *ethqos;  in qcom_ethqos_probe()  local
470 	ethqos = devm_kzalloc(&pdev->dev, sizeof(*ethqos), GFP_KERNEL);  in qcom_ethqos_probe()
471 	if (!ethqos) {  in qcom_ethqos_probe()
476 	ethqos->pdev = pdev;  in qcom_ethqos_probe()
478 	ethqos->rgmii_base = devm_ioremap_resource(&pdev->dev, res);  in qcom_ethqos_probe()
479 	if (IS_ERR(ethqos->rgmii_base)) {  in qcom_ethqos_probe()
481 		ret = PTR_ERR(ethqos->rgmii_base);  in qcom_ethqos_probe()
486 	ethqos->por = data->por;  in qcom_ethqos_probe()
487 	ethqos->num_por = data->num_por;  in qcom_ethqos_probe()
489 	ethqos->rgmii_clk = devm_clk_get(&pdev->dev, "rgmii");  in qcom_ethqos_probe()
490 	if (IS_ERR(ethqos->rgmii_clk)) {  in qcom_ethqos_probe()
491 		ret = PTR_ERR(ethqos->rgmii_clk);  in qcom_ethqos_probe()
495 	ret = clk_prepare_enable(ethqos->rgmii_clk);  in qcom_ethqos_probe()
499 	ethqos->speed = SPEED_1000;  in qcom_ethqos_probe()
500 	ethqos_update_rgmii_clk(ethqos, SPEED_1000);  in qcom_ethqos_probe()
501 	ethqos_set_func_clk_en(ethqos);  in qcom_ethqos_probe()
503 	plat_dat->bsp_priv = ethqos;  in qcom_ethqos_probe()
513 	rgmii_dump(ethqos);  in qcom_ethqos_probe()
518 	clk_disable_unprepare(ethqos->rgmii_clk);  in qcom_ethqos_probe()
528 	struct qcom_ethqos *ethqos;  in qcom_ethqos_remove()  local
531 	ethqos = get_stmmac_bsp_priv(&pdev->dev);  in qcom_ethqos_remove()
532 	if (!ethqos)  in qcom_ethqos_remove()
536 	clk_disable_unprepare(ethqos->rgmii_clk);  in qcom_ethqos_remove()